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riscv_zve32x_imply_zicsr

Tsukasa OI edited this page Aug 3, 2023 · 3 revisions

Extension: Implication from Zve32x to Zicsr

Based On

Issue Solved

Logically, Zve32x (minimum vector subset) should have implied Zicsr because of vector CSRs but we couldn't conclude at Septemper 2022.

This time, the author raised an issue to clarify the dependency and solved.

That means, implying Zicsr from Zve32x is now completely safe (although LLVM already implemented like this).

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