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Efabless

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  1. caravel_user_project caravel_user_project Public template

    https://caravel-user-project.readthedocs.io

    Verilog 192 337

  2. caravel_user_project_analog caravel_user_project_analog Public template

    Verilog 45 90

  3. mpw_precheck mpw_precheck Public

    Python 36 24

  4. caravel caravel Public

    Caravel is a standard SoC template with on chip resources to control and read/write operations from a user-dedicated space.

    Verilog 312 69

  5. caravel_board caravel_board Public

    C 33 42

  6. frigate-os frigate-os Public

    Verilog

Repositories

Showing 10 of 228 repositories
  • openlane-metrics Public

    Repository to store metric results for OpenLane 2.0.0+

    efabless/openlane-metrics’s past year of commit activity
    0 0 0 0 Updated Feb 23, 2025
  • openlane2 Public

    The next generation of OpenLane, rewritten from scratch with a modular architecture

    efabless/openlane2’s past year of commit activity
    Python 268 Apache-2.0 46 84 (1 issue needs help) 11 Updated Feb 23, 2025
  • Caravel_on_FPGA Public
    efabless/Caravel_on_FPGA’s past year of commit activity
    Verilog 4 0 1 0 Updated Feb 23, 2025
  • EF_SHA256 Public
    efabless/EF_SHA256’s past year of commit activity
    Verilog 0 0 2 1 Updated Feb 23, 2025
  • caravel_SI_testing Public
    efabless/caravel_SI_testing’s past year of commit activity
    C 2 1 3 5 Updated Feb 23, 2025
  • openlane2-ci-designs Public

    Continuous Integration Designs for OpenLane 2.0.0 or higher

    efabless/openlane2-ci-designs’s past year of commit activity
    Verilog 0 1 0 0 Updated Feb 23, 2025
  • central_CI Public
    efabless/central_CI’s past year of commit activity
    0 0 1 5 Updated Feb 22, 2025
  • openframe_timer_example Public Forked from efabless/caravel_openframe_project

    Example digital project for the Efabless Caravel "openframe" harness

    efabless/openframe_timer_example’s past year of commit activity
    Verilog 4 Apache-2.0 13 3 0 Updated Feb 21, 2025
  • ipm Public

    Open-source IPs Package Manager (IPM)

    efabless/ipm’s past year of commit activity
    Python 14 Apache-2.0 2 7 0 Updated Feb 21, 2025
  • frigate_analog Public

    The analog signal processing and timing frontend subsystems for the Frigate harness chip

    efabless/frigate_analog’s past year of commit activity
    Verilog 0 Apache-2.0 0 0 0 Updated Feb 20, 2025
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