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16 | 16 |
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17 | 17 | <CameraSettings>
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18 | 18 | <Sensor name="hm11b1-uf" description="HM11B1 sensor.">
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19 |
| - <MediaCtlConfig id="0" ConfigMode="AUTO" outputWidth="1292" outputHeight="800" format="V4L2_PIX_FMT_SGRBG10"><!-- RAW10 BE capture --> |
| 19 | + <MediaCtlConfig id="0" ConfigMode="AUTO" outputWidth="1312" outputHeight="800" format="V4L2_PIX_FMT_SGRBG10"><!-- RAW10 BE capture --> |
20 | 20 | <format name="hm11b1 $I2CBUS" pad="0" width="1292" height="800" format="V4L2_MBUS_FMT_SGRBG10_1X10"/>
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21 | 21 | <format name="Intel IPU6 CSI-2 $CSI_PORT" pad="0" width="1292" height="800" format="V4L2_MBUS_FMT_SGRBG10_1X10"/>
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22 | 22 | <format name="Intel IPU6 CSI2 BE SOC 0" pad="0" width="1292" height="800" format="V4L2_MBUS_FMT_SGRBG10_1X10"/>
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23 |
| - <format name="Intel IPU6 CSI2 BE SOC 0" pad="1" width="1292" height="800" format="V4L2_MBUS_FMT_SGRBG10_1X10"/> |
24 |
| - <selection name="Intel IPU6 CSI2 BE SOC 0" pad="1" target="V4L2_SEL_TGT_CROP" left="0" top="0" width="1292" height="800"/> |
| 23 | + <format name="Intel IPU6 CSI2 BE SOC 0" pad="1" width="1312" height="800" format="V4L2_MBUS_FMT_SGRBG10_1X10"/> |
| 24 | + <selection name="Intel IPU6 CSI2 BE SOC 0" pad="1" target="V4L2_SEL_TGT_CROP" left="0" top="0" width="1312" height="800"/> |
25 | 25 |
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26 | 26 | <link srcName="hm11b1 $I2CBUS" srcPad="0" sinkName="Intel IPU6 CSI-2 $CSI_PORT" sinkPad="0" enable="true"/>
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27 | 27 | <link srcName="Intel IPU6 CSI-2 $CSI_PORT" srcPad="1" sinkName="Intel IPU6 CSI2 BE SOC 0" sinkPad="0" enable="true"/>
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31 | 31 | <videonode name="Intel IPU6 CSI-2 $CSI_PORT" videoNodeType="VIDEO_ISYS_RECEIVER"/>
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32 | 32 | <videonode name="hm11b1 $I2CBUS" videoNodeType="VIDEO_PIXEL_ARRAY"/>
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33 | 33 | </MediaCtlConfig>
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34 |
| - <MediaCtlConfig id="0" mediaCfg="1" ConfigMode="AUTO" outputWidth="1292" outputHeight="800" format="V4L2_PIX_FMT_SGRBG10"><!-- RAW10 BE capture --> |
| 34 | + <MediaCtlConfig id="0" mediaCfg="1" ConfigMode="AUTO" outputWidth="1312" outputHeight="800" format="V4L2_PIX_FMT_SGRBG10"><!-- RAW10 BE capture --> |
35 | 35 | <format name="hm11b1 $I2CBUS" pad="0" width="1292" height="800" format="V4L2_MBUS_FMT_SGRBG10_1X10"/>
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36 | 36 | <format name="Intel IPU6 CSI2 $CSI_PORT" pad="0" width="1292" height="800" format="V4L2_MBUS_FMT_SGRBG10_1X10"/>
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| 37 | + <format name="Intel IPU6 CSI2 $CSI_PORT" pad="1" width="1312" height="800" format="V4L2_MBUS_FMT_SGRBG10_1X10"/> |
| 38 | + <selection name="Intel IPU6 CSI2 $CSI_PORT" pad="1" target="V4L2_SEL_TGT_CROP" left="0" top="0" width="1312" height="800"/> |
37 | 39 |
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38 | 40 | <link srcName="hm11b1 $I2CBUS" srcPad="0" sinkName="Intel IPU6 CSI2 $CSI_PORT" sinkPad="0" enable="true"/>
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39 | 41 | <link srcName="Intel IPU6 CSI2 $CSI_PORT" srcPad="1" sinkName="Intel IPU6 ISYS Capture $CAPTURE_ID" sinkPad="0" enable="true"/>
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74 | 76 | <!-- <TuningMode, cmc tag, aiq tag, isp tag, others tag> -->
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75 | 77 | <lardTags value="VIDEO,DFLT,DFLT,DFLT,DFLT"/>
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76 | 78 |
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77 |
| - <supportedISysSizes value="1292x800"/> <!-- ascending order request --> |
| 79 | + <supportedISysSizes value="1312x800"/> <!-- ascending order request --> |
78 | 80 | <supportedISysFormat value="V4L2_PIX_FMT_SGRBG10"/>
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79 | 81 | <enableAIQ value="true"/>
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80 | 82 | <iSysRawFormat value="V4L2_PIX_FMT_SGRBG10"/>
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