dgsudharsan · dgsudharsan · Nov 19, 2024 · Nov 19, 2024 · Nov 20, 2024 · Oct 27, 2024
diff --git a/.../arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/th5-a7060x6-64pe.config.bcm b/.../arista/x86_64-arista_7060x6_64pe/Arista-7060X6-64PE-256x200G/th5-a7060x6-64pe.config.bcm
@@ -1947,7 +1947,7 @@ device:
             THRESHOLD_MODE: LOSSY_AND_LOSSLESS
 
         TM_SCHEDULER_CONFIG:
-            NUM_MC_Q: NUM_MC_Q_2
+            NUM_MC_Q: NUM_MC_Q_4
 
 ...
 
@@ -2144,7 +2144,7 @@ device:
         TM_PORT_MC_Q_TO_SERVICE_POOL:
             ?
                 PORT_ID: [[1,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351]
-                TM_MC_Q_ID: [[0,1]]
+                TM_MC_Q_ID: [[0,3]]
             :
                 USE_QGROUP_MIN: 0
 
@@ -2161,7 +2161,7 @@ device:
             ?
                 # uplink, downlink and loopback ports, 2 MC queues
                 PORT_ID: [[1,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351]
-                TM_MC_Q_ID: [[0,1]]
+                TM_MC_Q_ID: [[0,3]]
             :
                 MIN_GUARANTEE_CELLS: 0
                 SHARED_LIMITS: 1
@@ -2622,7 +2622,7 @@ device:
         TM_PORT_UC_Q_TO_SERVICE_POOL:
             ?
                 PORT_ID: [[1,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351]
-                TM_UC_Q_ID: [0,1,2,5,6,8,9]
+                TM_UC_Q_ID: [0,1,2,5,6]
             :
                 USE_QGROUP_MIN: 0
                 TM_EGR_SERVICE_POOL_ID: 0
@@ -2648,7 +2648,7 @@ device:
                 TM_EGR_SERVICE_POOL_ID: 1
             ?
                 PORT_ID: [[1,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351]
-                TM_MC_Q_ID: [[0,1]]
+                TM_MC_Q_ID: [[0,3]]
             :
                 USE_QGROUP_MIN: 0
                 TM_EGR_SERVICE_POOL_ID: 0
@@ -2676,23 +2676,6 @@ device:
                 YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
                 RED_LIMIT_CELLS_STATIC: 0
                 RED_LIMIT_DYNAMIC: PERCENTAGE_625
-            ?
-                PORT_ID: [[1,8], [11,18], [22,29], [33,40], [44,51], [55,62], [66,73], [77,84], [88,95], [99,106], [110,117], [121,128], [132,139], [143,150], [154,161], [165,172]]
-                TM_UC_Q_ID: [8,9]
-            :
-                MIN_GUARANTEE_CELLS: 0
-                SHARED_LIMITS: 1
-                DYNAMIC_SHARED_LIMITS: 1
-                SHARED_LIMIT_CELLS_STATIC: 0
-                SHARED_LIMIT_DYNAMIC: ALPHA_1
-                DYNAMIC_GROUP: MID_PRI_GROUP
-                RESUME_OFFSET_CELLS: 2
-                COLOR_SPECIFIC_LIMITS: 0
-                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
-                YELLOW_LIMIT_CELLS_STATIC: 0
-                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
-                RED_LIMIT_CELLS_STATIC: 0
-                RED_LIMIT_DYNAMIC: PERCENTAGE_625
             ?
                 PORT_ID: [[1,8], [11,18], [22,29], [33,40], [44,51], [55,62], [66,73], [77,84], [88,95], [99,106], [110,117], [121,128], [132,139], [143,150], [154,161], [165,172]]
                 TM_UC_Q_ID: [3,4]
@@ -2724,23 +2707,6 @@ device:
                 YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
                 RED_LIMIT_CELLS_STATIC: 0
                 RED_LIMIT_DYNAMIC: PERCENTAGE_625
-            ?
-                PORT_ID: [[176,183], [187,194], [198,205], [209,216], [220,227], [231,238], [242,249], [253,260], [264,271], [275,282], [286,293], [297,304], [308,315], [319,326], [330,337], [341,348]]
-                TM_UC_Q_ID: [8,9]
-            :
-                MIN_GUARANTEE_CELLS: 0
-                SHARED_LIMITS: 1
-                DYNAMIC_SHARED_LIMITS: 1
-                SHARED_LIMIT_CELLS_STATIC: 0
-                SHARED_LIMIT_DYNAMIC: ALPHA_1
-                DYNAMIC_GROUP: MID_PRI_GROUP
-                RESUME_OFFSET_CELLS: 2
-                COLOR_SPECIFIC_LIMITS: 0
-                COLOR_SPECIFIC_DYNAMIC_LIMITS: 0
-                YELLOW_LIMIT_CELLS_STATIC: 0
-                YELLOW_LIMIT_DYNAMIC: PERCENTAGE_750
-                RED_LIMIT_CELLS_STATIC: 0
-                RED_LIMIT_DYNAMIC: PERCENTAGE_625
             ?
                 PORT_ID: [[176,183], [187,194], [198,205], [209,216], [220,227], [231,238], [242,249], [253,260], [264,271], [275,282], [286,293], [297,304], [308,315], [319,326], [330,337], [341,348]]
                 TM_UC_Q_ID: [3,4]
@@ -2778,7 +2744,7 @@ device:
                 RESUME_OFFSET_CELLS: 2
             ?
                 PORT_ID: [[1,8], [11,18], [21,29], [33,40], [43,51], [55,62], [65,73], [76,84], [87,95], [99,106], [109,117], [121,128], [131,139], [143,150], [153,161], [165,172], [175,183], [187,194], [197,205], [209,216], [219,227], [231,238], [241,249], [253,260], [263,271], [274,282], [285,293], [297,304], [307,315], [319,326], [329,337], [341,348], 351]
-                TM_MC_Q_ID: [0,1]
+                TM_MC_Q_ID: [0,3]
                 SHARED_LIMIT_DYNAMIC: ALPHA_2
             :
                 SHARED_LIMITS: 1

diff --git a/device/arista/x86_64-arista_7800r3_48cq2_lc/services.conf b/device/arista/x86_64-arista_7800r3_48cq2_lc/services.conf
@@ -0,0 +1 @@
+startup_tsa_tsb.service
diff --git a/device/arista/x86_64-arista_7800r3_48cq2_lc/startup-tsa-tsb.conf b/device/arista/x86_64-arista_7800r3_48cq2_lc/startup-tsa-tsb.conf
@@ -0,0 +1 @@
+STARTUP_TSB_TIMER=900
diff --git a/device/arista/x86_64-arista_7800r3_48cqm2_lc/services.conf b/device/arista/x86_64-arista_7800r3_48cqm2_lc/services.conf
@@ -0,0 +1 @@
+startup_tsa_tsb.service
diff --git a/device/arista/x86_64-arista_7800r3_48cqm2_lc/startup-tsa-tsb.conf b/device/arista/x86_64-arista_7800r3_48cqm2_lc/startup-tsa-tsb.conf
@@ -0,0 +1 @@
+STARTUP_TSB_TIMER=900
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/services.conf b/device/arista/x86_64-arista_7800r3a_36d2_lc/services.conf
@@ -0,0 +1 @@
+startup_tsa_tsb.service
diff --git a/device/arista/x86_64-arista_7800r3a_36d2_lc/startup-tsa-tsb.conf b/device/arista/x86_64-arista_7800r3a_36d2_lc/startup-tsa-tsb.conf
@@ -0,0 +1 @@
+STARTUP_TSB_TIMER=900
diff --git a/device/mellanox/x86_64-mlnx_msn2700-r0/pmon_daemon_control.json b/device/mellanox/x86_64-mlnx_msn2700-r0/pmon_daemon_control.json
@@ -2,6 +2,7 @@
     "skip_ledd": true,
     "skip_fancontrol": true,
     "delay_xcvrd": true,
-    "skip_xcvrd_cmis_mgr": true
+    "skip_xcvrd_cmis_mgr": true,
+    "delay_non_critical_daemon": true
 }
 
diff --git a/...r0/Mellanox-SN5600-C256X1/buffers.json.j2 → ...r0/Mellanox-SN5600-C256S1/buffers.json.j2 b/...r0/Mellanox-SN5600-C256X1/buffers.json.j2 → ...r0/Mellanox-SN5600-C256S1/buffers.json.j2
diff --git a/...SN5600-C256X1/buffers_defaults_objects.j2 → ...SN5600-C256S1/buffers_defaults_objects.j2 b/...SN5600-C256X1/buffers_defaults_objects.j2 → ...SN5600-C256S1/buffers_defaults_objects.j2
diff --git a/...anox-SN5600-C256X1/buffers_defaults_t0.j2 → ...anox-SN5600-C256S1/buffers_defaults_t0.j2 b/...anox-SN5600-C256X1/buffers_defaults_t0.j2 → ...anox-SN5600-C256S1/buffers_defaults_t0.j2
@@ -1,5 +1,6 @@
 {#
-    Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+    SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+    Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
     Apache-2.0
 
     Licensed under the Apache License, Version 2.0 (the "License");
@@ -15,10 +16,10 @@
     limitations under the License.
 #}
 {% set default_cable = '40m' %}
-{% set ingress_lossless_pool_size =  '118249472' %}
-{% set ingress_lossless_pool_xoff =  '15728640' %}
+{% set ingress_lossless_pool_size =  '115245056' %}
+{% set ingress_lossless_pool_xoff =  '14826496' %}
 {% set egress_lossless_pool_size =  '158229504' %}
-{% set egress_lossy_pool_size =  '118249472' %}
+{% set egress_lossy_pool_size =  '115245056' %}
 
 {% import 'buffers_defaults_objects.j2' as defs with context %}
 

diff --git a/...anox-SN5600-C256X1/buffers_defaults_t1.j2 → ...anox-SN5600-C256S1/buffers_defaults_t1.j2 b/...anox-SN5600-C256X1/buffers_defaults_t1.j2 → ...anox-SN5600-C256S1/buffers_defaults_t1.j2
@@ -1,5 +1,6 @@
 {#
-    Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+    SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+    Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
     Apache-2.0
 
     Licensed under the Apache License, Version 2.0 (the "License");

diff --git a/...nox-SN5600-C256X1/buffers_dynamic.json.j2 → ...nox-SN5600-C256S1/buffers_dynamic.json.j2 b/...nox-SN5600-C256X1/buffers_dynamic.json.j2 → ...nox-SN5600-C256S1/buffers_dynamic.json.j2
@@ -1,5 +1,6 @@
 {#
-    Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+    SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+    Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
     Apache-2.0
     Licensed under the Apache License, Version 2.0 (the "License");
     you may not use this file except in compliance with the License.

diff --git a/...C256X1/create_only_config_db_buffers.json → ...C256S1/create_only_config_db_buffers.json b/...C256X1/create_only_config_db_buffers.json → ...C256S1/create_only_config_db_buffers.json
diff --git a/...ellanox-SN5600-C256X1/media_settings.json → ...ellanox-SN5600-C256S1/media_settings.json b/...ellanox-SN5600-C256X1/media_settings.json → ...ellanox-SN5600-C256S1/media_settings.json
diff --git a/...nox-SN5600-C256X1/optics_si_settings.json → ...nox-SN5600-C256S1/optics_si_settings.json b/...nox-SN5600-C256X1/optics_si_settings.json → ...nox-SN5600-C256S1/optics_si_settings.json
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/pg_profile_lookup.ini b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/pg_profile_lookup.ini
@@ -0,0 +1,51 @@
+##
+## SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+## Apache-2.0
+##
+## Licensed under the Apache License, Version 2.0 (the "License");
+## you may not use this file except in compliance with the License.
+## You may obtain a copy of the License at
+##
+## http://www.apache.org/licenses/LICENSE-2.0
+##
+## Unless required by applicable law or agreed to in writing, software
+## distributed under the License is distributed on an "AS IS" BASIS,
+## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+## See the License for the specific language governing permissions and
+## limitations under the License.
+##
+#  PG lossless profiles.
+# speed cable  size   xon    xoff   threshold
+  10000    5m 19456   19456  20480         0
+  25000    5m 19456   19456  21504         0
+  40000    5m 19456   19456  24576         0
+  50000    5m 19456   19456  26624         0
+ 100000    5m 19456   19456  44032         0
+ 200000    5m 19456   19456  50176         0
+ 400000    5m 19456   19456  86016         0
+ 800000    5m 38912   38912  95232         0
+  10000   40m 19456   19456  20480         0
+  25000   40m 19456   19456  22528         0
+  40000   40m 19456   19456  25600         0
+  50000   40m 19456   19456  28672         0
+ 100000   40m 19456   19456  49152         0
+ 200000   40m 19456   19456  60416         0
+ 400000   40m 19456   19456  104448        0
+ 800000   40m 38912   38912  132096        0
+  10000  250m 43008   19456  23552         0
+  25000  250m 19456   19456  29696         0
+  40000  250m 19456   19456  36864         0
+  50000  250m 19456   19456  43008         0
+ 100000  250m 19456   19456  76800         0
+ 200000  250m 19456   19456  116736        0
+ 400000  250m 19456   19456  217088        0
+ 800000  250m 38912   38912  357376        0
+  10000  300m 19456   19456  23552         0
+  25000  300m 19456   19456  30720         0
+  40000  300m 19456   19456  39936         0
+  50000  300m 19456   19456  46080         0
+ 100000  300m 19456   19456  83968         0
+ 200000  300m 19456   19456  130048        0
+ 400000  300m 19456   19456  243712        0
+ 800000  300m 38912   38912  411648        0
diff --git a/...ox-SN5600-C256X1/pmon_daemon_control.json → ...ox-SN5600-C256S1/pmon_daemon_control.json b/...ox-SN5600-C256X1/pmon_daemon_control.json → ...ox-SN5600-C256S1/pmon_daemon_control.json
diff --git a/...r0/Mellanox-SN5600-C256X1/port_config.ini → ...r0/Mellanox-SN5600-C256S1/port_config.ini b/...r0/Mellanox-SN5600-C256X1/port_config.ini → ...r0/Mellanox-SN5600-C256S1/port_config.ini
@@ -1,5 +1,6 @@
 ##
-## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+## SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 ## Apache-2.0
 ##
 ## Licensed under the Apache License, Version 2.0 (the "License");
@@ -272,4 +273,4 @@ Ethernet500    500                                    etp63e    63       100000
 Ethernet501    501                                    etp63f    63       100000   rs    off     6
 Ethernet502    502                                    etp63g    63       100000   rs    off     7
 Ethernet503    503                                    etp63h    63       100000   rs    off     8
-Ethernet512    512                                    etp65     65        25000   rs
+Ethernet512    512                                    etp65     65        10000   rs
diff --git a/...600-r0/Mellanox-SN5600-C256X1/qos.json.j2 → ...600-r0/Mellanox-SN5600-C256S1/qos.json.j2 b/...600-r0/Mellanox-SN5600-C256X1/qos.json.j2 → ...600-r0/Mellanox-SN5600-C256S1/qos.json.j2
diff --git a/...600-r0/Mellanox-SN5600-C256X1/sai.profile → ...600-r0/Mellanox-SN5600-C256S1/sai.profile b/...600-r0/Mellanox-SN5600-C256X1/sai.profile → ...600-r0/Mellanox-SN5600-C256S1/sai.profile
diff --git a/...lanox-SN5600-C256X1/sai_5600_256x100g.xml → ...lanox-SN5600-C256S1/sai_5600_256x100g.xml b/...lanox-SN5600-C256X1/sai_5600_256x100g.xml → ...lanox-SN5600-C256S1/sai_5600_256x100g.xml
@@ -1,6 +1,7 @@
 <?xml version="1.0"?>
 <!--
-  Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
+  SPDX-FileCopyrightText: NVIDIA CORPORATION & AFFILIATES
+  Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
   Apache-2.0
 
   Licensed under the Apache License, Version 2.0 (the "License");

diff --git a/...ce/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/supporting_bulk_counter_groups b/...ce/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256S1/supporting_bulk_counter_groups
@@ -0,0 +1 @@
+QUEUE_WATERMARK_STAT_COUNTER,PG_WATERMARK_STAT_COUNTER,PFC_WD
diff --git a/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/pg_profile_lookup.ini b/device/mellanox/x86_64-nvidia_sn5600-r0/Mellanox-SN5600-C256X1/pg_profile_lookup.ini
diff --git a/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.md5 b/device/nokia/arm64-nokia_ixs7215_52xb-r0/Nokia-7215-A1/ASK-Board-AC5X-xb.md5
@@ -1 +1 @@
-f3d3345bef9c6ac4eea19c6170e92970
+7333f3669bbbd18bcc3890028d7afb39
Original file line number	Diff line number	Diff line change
		@@ -0,0 +1 @@
		QUEUE_WATERMARK_STAT_COUNTER,PG_WATERMARK_STAT_COUNTER,PFC_WD
Original file line number	Diff line number	Diff line change
		@@ -1 +1 @@
		f3d3345bef9c6ac4eea19c6170e92970
		7333f3669bbbd18bcc3890028d7afb39