Add support for RISC-V as a host #20
Open
Conversation
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
mikhaylovilya
force-pushed
the
tmp-host-riscv64
branch
9 times, most recently
from
1b56ed0 to
13b0b05
Compare
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
Add this suggestion to a batch that can be applied as a single commit.
This suggestion is invalid because no changes were made to the code.
Suggestions cannot be applied while the pull request is closed.
Suggestions cannot be applied while viewing a subset of changes.
Only one suggestion per line can be applied in a batch.
Add this suggestion to a batch that can be applied as a single commit.
Applying suggestions on deleted lines is not supported.
You must change the existing code in this line in order to create a valid suggestion.
Outdated suggestions cannot be applied.
This suggestion has been applied or marked resolved.
Suggestions cannot be applied from pending reviews.
Suggestions cannot be applied on multi-line comments.
Suggestions cannot be applied while the pull request is queued to merge.
Suggestion cannot be applied right now. Please check back later.
What
This PR adds support for running statically linked binaries with Instrew on RISC-V host.
Testing
All Instrew tests passed successfully on Sipeed Lichee PI 4A and a Debian VM, but almost all of the Rellume JIT tests didn't pass due to segfault in LLVM Runtime. I believe the reason is in poor JIT support for RISC-V in LLVM <= 18. Also I've added a few more rv64 testcases.