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HW-aware synthesis capability #116

Merged
merged 13 commits into from
Jun 6, 2024
Merged

HW-aware synthesis capability #116

merged 13 commits into from
Jun 6, 2024

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Qubit1718
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@Qubit1718 Qubit1718 commented Jun 2, 2024

  1. Created two different HW-aware synthesis preferences configurations that implements a multiple control-x (MCX) logic.
  2. Used two different devices and simulators.
  3. Optimizes the 'cx' gate count.

This will close the issue #41

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@Qubit1718 Great work!
See my comments, there are small fixes needed

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Hi @orsa-classiq,

Thank you so much for taking your time and reviewing the PR. I will work on these comments and update the notebook as soon as possible :))

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Hi @orsa-classiq,

I made all the required changes. Can you please check now? Please let me know if you still find anything inappropriate. Hope to hear from you soon :))

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@Qubit1718 That's great. There is just a small thing with the plotting that I was probably not enough clear about. I want it to be plotted (e.g. with matplotlib).

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Qubit1718 commented Jun 5, 2024

Can you please be a bit more specific, @orsa-classiq ? Should I plot the output of CX gates against the depth? or should I plot the grid connectivity using matplotlib?

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Can you please be a bit more specific, @orsa-classiq ? Should I plot the output of CX gates against the depth? or should I plot the grid connectivity using matplotlib?

plot the grid connectivity :)

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Can you please be a bit more specific, @orsa-classiq ? Should I plot the output of CX gates against the depth? or should I plot the grid connectivity using matplotlib?

plot the grid connectivity :)

Thanks for the quick reply, I will work on it and update the file soon. Thanks :))

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Hi @orsa-classiq, The new commit includes the connectivity graphs using matplotlib and networkx. Can you please review it? I look forward to seeing the PR merged :))

@Qubit1718 Qubit1718 requested a review from orsa-classiq June 5, 2024 16:00
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Hi @orsa-classiq,

Thanks for approving the changes. Could please also let me know if there anything more that i need to do from my end to get the PR merged? And the next steps if any.

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Sorry, I approved and then realized there are additional changes needed:

  1. Commit the notebook with the outputs (the graphs output cells are missing)
  2. put the notebook in a directory with the same name, i.e. in community/basic_examples/hw_aware_synthesis
  3. commit also the .qmod and .synthesis_options files that are created by the notebooks, within the same directory

Then I will take care for the merge

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Qubit1718 commented Jun 6, 2024

Hi @orsa-classiq ,

Completed the required changes. Please go through them and let me know if there are any additional changes required.
Thanks!

@Qubit1718 Qubit1718 requested a review from orsa-classiq June 6, 2024 09:06
@orsa-classiq orsa-classiq merged commit 69590b0 into Classiq:main Jun 6, 2024
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Add examples and insights that demonstrates Classiq's HW-aware synthesis capability
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