Merge pull request #131 from PalumboN/more-new-primitives

More new primitives
Alamvic · Mar 25, 2024 · 45b56ea · 45b56ea
2 parents 6f8878a + 1d650ce
commit 45b56ea
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Showing 21 changed files with 3,070 additions and 472 deletions.
diff --git a/Druid-Tests/DRCogitRegisterAllocatorTest.class.st b/Druid-Tests/DRCogitRegisterAllocatorTest.class.st
@@ -99,7 +99,7 @@ DRCogitRegisterAllocatorTest >> testAllocateRegistersForModuloIntroducesQuotient
 	self deny: r2 operand3 result equals: r2 result.
 ]
 
-{ #category : #tests }
+{ #category : #'tests - spill' }
 DRCogitRegisterAllocatorTest >> testAllocateTwoSpilledPhiFunctions [
 
 	| cfg specialRegister c1 b1 c2 b2 merge c12 c22 p1 p2 |

diff --git a/Druid-Tests/DRLinearScanRegisterAllocatorTest.class.st b/Druid-Tests/DRLinearScanRegisterAllocatorTest.class.st
@@ -2,18 +2,24 @@ Class {
 	#name : #DRLinearScanRegisterAllocatorTest,
 	#superclass : #TestCase,
 	#instVars : [
-		'registerAllocator'
+		'registerAllocator',
+		'spillRegister1',
+		'spillRegister2'
 	],
 	#category : #'Druid-Tests'
 }
 
 { #category : #tests }
 DRLinearScanRegisterAllocatorTest >> setUp [
 
-	registerAllocator := DRCogitLinearScanRegisterAllocator new
+	registerAllocator := DRCogitLinearScanRegisterAllocator new.
+
+	spillRegister1 := DRPhysicalGeneralPurposeRegister name: 'SPR1'.
+	spillRegister2 := DRPhysicalGeneralPurposeRegister name: 'SPR2'.
+
 ]
 
-{ #category : #tests }
+{ #category : #'tests - floats' }
 DRLinearScanRegisterAllocatorTest >> testAllocateFloatRegister [
 
 	| cfg basicBlock r fr |
@@ -37,7 +43,7 @@ DRLinearScanRegisterAllocatorTest >> testAllocateFloatRegister [
 	self assert: basicBlock instructions second result equals: fr.
 ]
 
-{ #category : #tests }
+{ #category : #'tests - floats' }
 DRLinearScanRegisterAllocatorTest >> testAllocateFloatRegistersAfterOperate [
 
 	| cfg basicBlock r fr fr2 r0 r1 r3 r4 r5 r6 |
@@ -63,7 +69,7 @@ DRLinearScanRegisterAllocatorTest >> testAllocateFloatRegistersAfterOperate [
 
 ]
 
-{ #category : #tests }
+{ #category : #'tests - floats' }
 DRLinearScanRegisterAllocatorTest >> testAllocateFloatRegistersAfterOperateReversed [
 
 	| cfg basicBlock r fr fr2 r0 r1 r3 r4 r5 r6 |
@@ -644,7 +650,7 @@ DRLinearScanRegisterAllocatorTest >> testLiveSetsForReturnInstruction [
 	"Kind of smoke test, should not fail"
 ]
 
-{ #category : #tests }
+{ #category : #'tests - spill' }
 DRLinearScanRegisterAllocatorTest >> testNoSpillHasNoSpillSlots [
 
 	| cfg basicBlock r |
@@ -750,7 +756,7 @@ DRLinearScanRegisterAllocatorTest >> testOverlappingPhiArguments [
 	self assert: basicBlockTrue instructions first result equals: secondRegister.
 ]
 
-{ #category : #tests }
+{ #category : #'tests - spill' }
 DRLinearScanRegisterAllocatorTest >> testSpillIntroducesLoadBeforeUse [
 
 	| cfg basicBlock firstRegister spillRegister |
@@ -784,7 +790,7 @@ DRLinearScanRegisterAllocatorTest >> testSpillIntroducesLoadBeforeUse [
 	self assert: basicBlock instructions fifth operand1 result equals: spillRegister.
 ]
 
-{ #category : #tests }
+{ #category : #'tests - spill' }
 DRLinearScanRegisterAllocatorTest >> testSpillIntroducesLoadBeforeUseWithMemoryAccess [
 
 	"From
@@ -837,7 +843,7 @@ DRLinearScanRegisterAllocatorTest >> testSpillIntroducesLoadBeforeUseWithMemoryA
 	self assert: t3 previousInstruction address stackOffset equals: 1.
 ]
 
-{ #category : #tests }
+{ #category : #'tests - spill' }
 DRLinearScanRegisterAllocatorTest >> testSpillIntroducesStore [
 
 	| cfg basicBlock firstRegister spillRegister |
@@ -871,7 +877,86 @@ DRLinearScanRegisterAllocatorTest >> testSpillIntroducesStore [
 	self assert: basicBlock instructions second operand1 equals: spillRegister.
 ]
 
-{ #category : #tests }
+{ #category : #'tests - spill' }
+DRLinearScanRegisterAllocatorTest >> testSpillOnStores [
+
+	| cfg basicBlock |
+	cfg := DRControlFlowGraph new.
+	basicBlock := cfg newBasicBlockWith: [ :block | | r0 r1 address |
+		"R0 := 2"
+		r0 := block copy: 2.
+		"R1 := 3"
+		r1 := block copy: 3.
+		"STORE R0 [R1 + 8]"
+		address := DRBaseOffsetMemoryAddress new
+			           base: r1;
+			           offset: 8 asDRValue;
+			           yourself.
+		block storeSInt64: r0 asDRValue at: address ].
+	cfg initialBasicBlock jumpTo: basicBlock.
+
+	registerAllocator
+		integerRegisters: { };
+		spillRegisters: { spillRegister1. spillRegister2 };
+		allocateRegistersIn: cfg.
+
+	"SPR1 := 2
+	Store M0 SPR1
+	SPR1 := 3
+	Store M1 SPR1
+	SPR1 := Load M0
+	SPR2 := Load M1
+	STORE SPR1 [SPR2 + 8]"
+
+	self assert: basicBlock instructions first result equals: spillRegister1.
+	self assert: basicBlock instructions second isStore.
+	self assert: basicBlock instructions third result equals: spillRegister1.
+	self assert: basicBlock instructions fourth isStore.
+	self assert: basicBlock instructions fifth result equals: spillRegister1.
+	self assert: basicBlock instructions sixth result equals: spillRegister2.
+	self 
+		assertCollection: (basicBlock instructions seventh dependencies collect: #result) 
+		includesAll: { spillRegister1. spillRegister2 }
+]
+
+{ #category : #'tests - spill' }
+DRLinearScanRegisterAllocatorTest >> testSpillReceiverAndArguments [
+
+	| cfg basicBlock |
+	cfg := DRControlFlowGraph new.
+	basicBlock := cfg newBasicBlockWith: [ :block | | r0 r1 r2 |
+		"R0 := 2"
+		r0 := block loadReceiver.
+		"R1 := 3"
+		r1 := block loadArgument: 0.
+		"R2 := 4"
+		r2 := block loadArgument: 1 ].
+	cfg initialBasicBlock jumpTo: basicBlock.
+
+	registerAllocator
+		integerRegisters: { };
+		spillRegisters: { spillRegister1 };
+		allocateRegistersIn: cfg.
+
+	"
+	SPR1 := LoadReceriver
+	Store M0 SPR1
+	SPR1 := LoadArg0
+	Store M1 SPR1
+	SPR1 := LoadArg1
+	Store M2 SPR1
+	"
+
+	self assert: basicBlock instructions first result equals: spillRegister1.
+	self assert: basicBlock instructions second isStore.
+	self assert: basicBlock instructions third result equals: spillRegister1.
+	self assert: basicBlock instructions fourth isStore.
+	self assert: basicBlock instructions fifth result equals: spillRegister1.
+	self assert: basicBlock instructions sixth isStore.
+
+]
+
+{ #category : #'tests - spill' }
 DRLinearScanRegisterAllocatorTest >> testSpillStoresAndLoadsToSameAddress [
 
 	| cfg basicBlock spillRegister1 spillRegister2 |
@@ -909,7 +994,7 @@ DRLinearScanRegisterAllocatorTest >> testSpillStoresAndLoadsToSameAddress [
 		equals: basicBlock instructions sixth operand1
 ]
 
-{ #category : #tests }
+{ #category : #'tests - spill' }
 DRLinearScanRegisterAllocatorTest >> testSpillTwice [
 
 	| cfg basicBlock spillRegister1 spillRegister2 |
@@ -947,7 +1032,7 @@ DRLinearScanRegisterAllocatorTest >> testSpillTwice [
 	self assert: basicBlock instructions sixth result equals: spillRegister2.
 ]
 
-{ #category : #tests }
+{ #category : #'tests - spill' }
 DRLinearScanRegisterAllocatorTest >> testSpillTwiceIncrementsSpillSlotsToTwo [
 
 	| cfg basicBlock spillRegister1 spillRegister2 |
@@ -972,7 +1057,7 @@ DRLinearScanRegisterAllocatorTest >> testSpillTwiceIncrementsSpillSlotsToTwo [
 	self assert: cfg numberOfSpillSlots equals: 2
 ]
 
-{ #category : #tests }
+{ #category : #'tests - spill' }
 DRLinearScanRegisterAllocatorTest >> testSpillTwiceUsesDifferentAddresses [
 
 	| cfg basicBlock spillRegister1 spillRegister2 |

diff --git a/Druid-Tests/DRPrimitiveScenarioCompilationTest.class.st b/Druid-Tests/DRPrimitiveScenarioCompilationTest.class.st
@@ -163,6 +163,62 @@ DRPrimitiveScenarioCompilationTest >> testArithmeticBitShiftRight [
 	self assert: machineSimulator receiverRegisterValue equals: 2r11 << 62
 ]
 
+{ #category : #'tests-arithmetic-floats' }
+DRPrimitiveScenarioCompilationTest >> testAsFloatAddition [
+
+	| floatRawValue |
+	self compileDruidPrimitive: #primitiveAsFloatAddition.
+	self
+		executePrimitiveWithReceiver: 17
+		withArguments: { 21 }.
+
+	floatRawValue := machineSimulator receiverRegisterValue.
+
+	self assert: (Float fromIEEE64Bit: floatRawValue) equals: 38
+]
+
+{ #category : #'tests-arithmetic-floats' }
+DRPrimitiveScenarioCompilationTest >> testAsFloatDivide [
+
+	| floatRawValue |
+	self compileDruidPrimitive: #primitiveAsFloatDivision.
+	self
+		executePrimitiveWithReceiver: 17
+		withArguments: { 21 }.
+
+	floatRawValue := machineSimulator receiverRegisterValue.
+
+	self assert: (Float fromIEEE64Bit: floatRawValue) equals: 21.0 / 17.0
+]
+
+{ #category : #'tests-arithmetic-floats' }
+DRPrimitiveScenarioCompilationTest >> testAsFloatMultiply [
+
+	| floatRawValue |
+	self compileDruidPrimitive: #primitiveAsFloatMultiply.
+	self
+		executePrimitiveWithReceiver: 17
+		withArguments: { 21 }.
+
+	floatRawValue := machineSimulator receiverRegisterValue.
+
+	self assert: (Float fromIEEE64Bit: floatRawValue) equals: 21.0 * 17.0
+]
+
+{ #category : #'tests-arithmetic-floats' }
+DRPrimitiveScenarioCompilationTest >> testAsFloatSubtract [
+
+	| floatRawValue |
+	self compileDruidPrimitive: #primitiveAsFloatSubtract.
+	self
+		executePrimitiveWithReceiver: 17
+		withArguments: { 21 }.
+
+	floatRawValue := machineSimulator receiverRegisterValue.
+
+	self assert: (Float fromIEEE64Bit: floatRawValue) equals: 4.0
+]
+
 { #category : #'tests-types' }
 DRPrimitiveScenarioCompilationTest >> testAsInteger [
 
@@ -557,6 +613,17 @@ DRPrimitiveScenarioCompilationTest >> testCompiledPrimitivePreservesStack [
 	self assert: self popAddress equals: 55
 ]
 
+{ #category : #'tests-stack' }
+DRPrimitiveScenarioCompilationTest >> testCompiledPrimitiveWithTwoArgs [
+
+	self compileDruidPrimitive: #primitiveWithTwoArgs.
+
+	self executePrimitiveWithReceiver: 42 withArguments: { 1. 2 }.
+
+	"An empty primitive does nothing and just returns, the return value is the receiver"
+	self assert: machineSimulator receiverRegisterValue equals: 2
+]
+
 { #category : #'tests-types' }
 DRPrimitiveScenarioCompilationTest >> testConstantFloatAsInteger [
 
@@ -886,62 +953,6 @@ DRPrimitiveScenarioCompilationTest >> testFloat64AtPut [
 	self assert: (Float fromIEEE64BitWord: result) equals: 1234.0
 ]
 
-{ #category : #'tests-arithmetic-floats' }
-DRPrimitiveScenarioCompilationTest >> testFloatAdd [
-
-	| floatRawValue |
-	self compileDruidPrimitive: #primitiveFloatAdd.
-	self
-		executePrimitiveWithReceiver: 17
-		withArguments: { 21 }.
-
-	floatRawValue := machineSimulator receiverRegisterValue.
-
-	self assert: (Float fromIEEE64Bit: floatRawValue) equals: 38
-]
-
-{ #category : #'tests-arithmetic-floats' }
-DRPrimitiveScenarioCompilationTest >> testFloatDivide [
-
-	| floatRawValue |
-	self compileDruidPrimitive: #primitiveFloatDivide.
-	self
-		executePrimitiveWithReceiver: 17
-		withArguments: { 21 }.
-
-	floatRawValue := machineSimulator receiverRegisterValue.
-
-	self assert: (Float fromIEEE64Bit: floatRawValue) equals: 21.0 / 17.0
-]
-
-{ #category : #'tests-arithmetic-floats' }
-DRPrimitiveScenarioCompilationTest >> testFloatMultiply [
-
-	| floatRawValue |
-	self compileDruidPrimitive: #primitiveFloatMultiply.
-	self
-		executePrimitiveWithReceiver: 17
-		withArguments: { 21 }.
-
-	floatRawValue := machineSimulator receiverRegisterValue.
-
-	self assert: (Float fromIEEE64Bit: floatRawValue) equals: 21.0 * 17.0
-]
-
-{ #category : #'tests-arithmetic-floats' }
-DRPrimitiveScenarioCompilationTest >> testFloatSubtract [
-
-	| floatRawValue |
-	self compileDruidPrimitive: #primitiveFloatSubtract.
-	self
-		executePrimitiveWithReceiver: 17
-		withArguments: { 21 }.
-
-	floatRawValue := machineSimulator receiverRegisterValue.
-
-	self assert: (Float fromIEEE64Bit: floatRawValue) equals: 4.0
-]
-
 { #category : #'tests-deadcode' }
 DRPrimitiveScenarioCompilationTest >> testFourDeadBranchesFourBranches1 [