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Commit 6babac5

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committedDec 6, 2016
Started to refactor SVD parser kblomqvist#10
- Fixed all but one except - Fixed some issues raised by PyLintBear
1 parent 2a55bf4 commit 6babac5

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2 files changed

+81
-31
lines changed

2 files changed

+81
-31
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‎.coafile

+1-1
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
[Default]
22
bears = PEP8Bear
3-
default_actions = *: ApplyPatchAction
3+
default_actions = PEP8Bear: ApplyPatchAction
44
files = **/*.py
55
no_orig = True

‎yasha/parsers/svd.py

+80-30
Original file line numberDiff line numberDiff line change
@@ -27,42 +27,48 @@
2727

2828

2929
class SvdParser(parser.Parser):
30-
"""
31-
CMSIS System View Description format (CMSIS-SVD)
32-
http://www.keil.com/pack/doc/CMSIS/SVD/html/index.html
33-
"""
30+
"""Yasha parser for CMSIS-SVD files"""
3431
file_extension = [".svd"]
3532

3633
def parse(self, file):
37-
f = SvdFile(file)
38-
f.parse()
39-
40-
vars = {
41-
"cpu": f.cpu,
42-
"device": f.device,
43-
"peripherals": [f.peripherals[name] for name in f.peripherals_order],
34+
svd = SvdFile(file)
35+
svd.parse()
36+
37+
variables = {
38+
"cpu": svd.cpu,
39+
"device": svd.device,
40+
"peripherals": [svd.peripherals[name] for
41+
name in svd.peripherals_order],
4442
}
45-
return vars
43+
return variables
4644

4745

4846
class SvdFile():
47+
"""SVD File: Entry class to parse CMSIS-SVD file
48+
49+
SVD = System View Description format
50+
CMSIS = Cortex Microcontroller Software Interface Standard
51+
Read more from http://www.keil.com/pack/doc/CMSIS/SVD/html/
52+
"""
4953

5054
def __init__(self, file):
51-
if type(file) is str:
55+
if isinstance(file, str):
5256
self.root = ET.fromstring(file)
5357
else:
5458
tree = ET.parse(file)
5559
self.root = tree.getroot()
5660

57-
def parse(self):
58-
self.cpu = Cpu(self.root.find("cpu"))
59-
self.device = Device(self.root)
60-
61+
self.cpu = None
62+
self.device = None
6163
self.peripherals = {}
6264
self.peripherals_order = []
6365
self.derived_peripherals = []
6466
self.peripheral_groups = {}
6567

68+
def parse(self):
69+
self.cpu = Cpu(self.root.find("cpu"))
70+
self.device = Device(self.root)
71+
6672
for e in self.root.iter("peripheral"):
6773
p = Peripheral(e, self.device)
6874
self.peripherals[p.name] = p
@@ -74,7 +80,7 @@ def parse(self):
7480
if p.groupName:
7581
try:
7682
self.peripheral_groups[p.groupName].append(p.name)
77-
except:
83+
except KeyError:
7884
self.peripheral_groups[p.groupName] = [p.name]
7985

8086
for p in [self.peripherals[name] for name in self.derived_peripherals]:
@@ -123,14 +129,14 @@ def to_mixed_case(snake_case):
123129
continue
124130
try:
125131
value = element.find(to_mixed_case(key)).text
126-
except: # Maybe it's attribute?
132+
except AttributeError: # Maybe it's attribute?
127133
default = defaults[key] if key in defaults else None
128134
value = element.get(to_mixed_case(key), default)
129135

130136
if value and key in self.cast_to_integer:
131137
try:
132138
value = int(value)
133-
except: # It has to be hex
139+
except ValueError: # It has to be hex
134140
value = int(value, 16)
135141

136142
setattr(self, key, value)
@@ -152,6 +158,8 @@ def to_dict(self):
152158

153159

154160
class Device(SvdElement):
161+
"""SVD Devices element"""
162+
155163
type = "device"
156164
cast_to_integer = ["size"]
157165
props = [
@@ -178,6 +186,8 @@ def init(self):
178186

179187

180188
class Cpu(SvdElement):
189+
"""SVD CPU section"""
190+
181191
type = "cpu"
182192
props = [
183193
"name", "revision", "endian", "mpuPresent", "fpuPresent", "fpuDP",
@@ -201,6 +211,17 @@ def init(self):
201211

202212

203213
class Peripheral(SvdElement):
214+
"""SVD Peripherals Level
215+
216+
A peripheral is a named collection of registers. A peripheral is mapped
217+
to a defined base address within the device's address space. A peripheral
218+
allocates one or more exclusive address blocks relative to its base
219+
address, such that all described registers fit into the allocated address
220+
blocks. Allocated addresses without an associated register description
221+
are automatically considered reserved. The peripheral can be assigned to
222+
a group of peripherals and may be associated with one or more interrupts.
223+
"""
224+
204225
type = "peripheral"
205226
cast_to_integer = ["size", "baseAddress"]
206227
props = [
@@ -237,17 +258,27 @@ def from_element(self, element, defaults={}):
237258
elif r.tag == "register":
238259
r = Register(r, self, parent=self)
239260
self.registers.extend(r.to_array())
240-
except:
261+
except TypeError:
241262
pass
242263

243264
try: # Because interrupt may be None
244265
for i in element.findall("interrupt"):
245266
self.interrupts.append(Interrupt(i))
246-
except:
267+
except TypeError:
247268
pass
248269

249270

250271
class Register(SvdElement):
272+
"""SVD Registers Level
273+
274+
A register is a named, programmable resource that belongs to a
275+
peripheral. Registers are mapped to a defined address in the address
276+
space of the device. An address is specified relative to the peripheral
277+
base address. The description of a register documents the purpose and
278+
function of the resource. A debugger requires information about the
279+
permitted access to a resource as well as side effects triggered by
280+
read and write accesses respectively.
281+
"""
251282
type = "register"
252283
cast_to_integer = ["size", "addressOffset", "dim",
253284
"dimIncrement", "resetValue", "resetMask"]
@@ -283,19 +314,19 @@ def from_element(self, element, defaults={}):
283314
if self.dim:
284315
try:
285316
self.dimIndex = int(self.dimIndex)
286-
except:
317+
except ValueError:
287318
try:
288319
start, stop = self.dimIndex.split("-")
289320
start, stop = (int(start), int(stop)+1)
290321
self.dimIndex = list(range(start, stop))
291-
except:
322+
except ValueError:
292323
self.dimIndex = self.dimIndex.split(",")
293324

294325
try: # Because fields may be None
295326
for e in element.find("fields"):
296327
field = Field(e, self, parent=self)
297328
self.fields.append(field)
298-
except:
329+
except TypeError:
299330
pass
300331

301332
def to_array(self):
@@ -331,6 +362,13 @@ def to_array(self):
331362

332363

333364
class Cluster(SvdElement):
365+
"""SVD Cluster extension level
366+
367+
Cluster adds an optional sub-level within the CMSIS SVD registers level.
368+
A cluster describes a sequence of neighboring registers within
369+
a peripheral.
370+
"""
371+
334372
type = "cluster"
335373
cast_to_integer = ["addressOffset", "dim", "dimIncrement"]
336374
props = [
@@ -355,18 +393,24 @@ def from_element(self, element, defaults={}):
355393
# TODO: Should work like Register.to_array(), if there's self.dim
356394
self.name = self.name.replace("%s", str(self.dim))
357395

358-
try:
396+
try: # findall() may return None
359397
for e in element.findall("*"):
360398
if e.tag == "cluster": # Cluster may include yet another cluster
361399
self.registers.append(Cluster(e, defaults, parent=self))
362400
elif e.tag == "register":
363401
r = Register(e, defaults, parent=self)
364402
self.registers.extend(r.to_array())
365-
except:
403+
except TypeError:
366404
pass
367405

368406

369407
class Field(SvdElement):
408+
"""SVD Fields level
409+
410+
All fields of a register are enclosed between the <fields>
411+
opening and closing tags.
412+
"""
413+
370414
type = "field"
371415
cast_to_integer = ["bitOffset", "bitWidth", "lsb", "msb"]
372416
props = [
@@ -407,20 +451,26 @@ def from_element(self, element, defaults={}):
407451
self.bitWidth = self.msb - self.lsb + 1
408452
self.bitRange = "[{}:{}]".format(self.msb, self.lsb)
409453

410-
try: # Because enumeratedValues may be None
454+
try: # Because findall() may return None
411455
for e in element.findall("enumeratedValues"):
412456
try:
413457
usage = e.find("usage").text
414-
except:
458+
except AttributeError:
415459
usage = "read-write"
416460
for e in e.findall("enumeratedValue"):
417461
enum = EnumeratedValue(e, {}, parent=self)
418462
self.enumeratedValues[usage].append(enum)
419-
except:
463+
except TypeError:
420464
pass
421465

422466

423467
class EnumeratedValue(SvdElement):
468+
"""SVD Enumerated values Level
469+
470+
The concept of enumerated values creates a map between unsigned
471+
integers and an identifier string.
472+
"""
473+
424474
type = "enumeratedValue"
425475
cast_to_integer = ["value"]
426476
props = ["derivedFrom", "name", "description", "value", "isDefault"]

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