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pr: Introduce var decl lowering.
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lib/vast/Conversion/Parser/ToParser.cpp

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Original file line numberDiff line numberDiff line change
@@ -526,6 +526,47 @@ namespace vast::conv {
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}
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};
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struct VarDeclConversion
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: parser_conversion_pattern_base< hl::VarDeclOp >
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{
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using op_t = hl::VarDeclOp;
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using base = parser_conversion_pattern_base< op_t >;
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using base::base;
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using adaptor_t = typename op_t::Adaptor;
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logical_result matchAndRewrite(
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op_t op, adaptor_t adaptor, conversion_rewriter &rewriter
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) const override {
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auto maybe = to_mlir_type(data_type::maybedata, rewriter.getContext());
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/* auto decl = */ rewriter.create< pr::Decl >(op.getLoc(), op.getSymName(), maybe);
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if (auto &init_region = op.getInitializer(); !init_region.empty()) {
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VAST_PATTERN_CHECK(init_region.getBlocks().size() == 1, "Expected single block in: {0}", op);
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auto &init_block = init_region.back();
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auto yield = terminator< hl::ValueYieldOp >::get(init_block);
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VAST_PATTERN_CHECK(yield, "Expected yield in: {0}", op);
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rewriter.inlineBlockBefore(&init_block, op);
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rewriter.setInsertionPointAfter(op);
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auto ref = rewriter.create< pr::Ref >(op.getLoc(), maybe, op.getSymName());
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auto value = rewriter.create< mlir::UnrealizedConversionCastOp >(
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yield.op().getLoc(), maybe, yield.op().getResult()
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);
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rewriter.create< pr::Assign >(yield.op().getLoc(), value.getResult(0), ref);
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rewriter.eraseOp(yield.op());
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}
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rewriter.eraseOp(op);
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return mlir::success();
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}
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static void legalize(parser_conversion_config &cfg) {
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cfg.target.addLegalOp< pr::Decl, pr::Ref, pr::Assign >();
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cfg.target.addLegalOp< mlir::UnrealizedConversionCastOp >();
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}
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};
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using operation_conversions = util::type_list<
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ToNoParse< hl::ConstantOp >,
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ToNoParse< hl::ImplicitCastOp >,
@@ -543,6 +584,7 @@ namespace vast::conv {
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FuncConversion,
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ParamConversion,
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DeclRefConversion,
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VarDeclConversion,
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ReturnConversion,
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CallConversion
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>;

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