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[Mellanox] update buffers and align QoS to add support for DSCP remapping (for Dual-Tor on t1) for Mellanox-SN4700-O8C48 (#19999)
* [Mellanox] update buffers and align QoS to add support for DSCP remapping (for Dual-Tor on t1) for Mellanox-SN4700-O8C48 Signed-off-by: Andriy Yurkiv <ayurkiv@nvidia.com>
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‎device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/buffers_defaults_t0.j2

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{#
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Copyright (c) 2022-2023 NVIDIA CORPORATION & AFFILIATES.
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Copyright (c) 2022-2024 NVIDIA CORPORATION & AFFILIATES.
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Apache-2.0
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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limitations under the License.
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#}
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{% set default_cable = '5m' %}
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{% set ingress_lossless_pool_size = '44433408' %}
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{% set ingress_lossless_pool_xoff = '9576448' %}
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{%- if ((SYSTEM_DEFAULTS is defined) and ('tunnel_qos_remap' in SYSTEM_DEFAULTS) and (SYSTEM_DEFAULTS['tunnel_qos_remap']['status'] == 'enabled')) -%}
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{% set ingress_lossless_pool_size = '50397184' %}
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{% set ingress_lossless_pool_xoff = '2990080' %}
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{% set egress_lossless_pool_size = '60817392' %}
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{% set egress_lossy_pool_size = '44433408' %}
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{% set egress_lossy_pool_size = '50397184' %}
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{%- else -%}
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{% set ingress_lossless_pool_size = '51748864' %}
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{% set ingress_lossless_pool_xoff = '2260992' %}
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{% set egress_lossless_pool_size = '60817392' %}
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{% set egress_lossy_pool_size = '51748864' %}
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{%- endif -%}
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{% import 'buffers_defaults_objects.j2' as defs with context %}
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{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %}
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{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }}
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{%- endmacro %}
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{%- macro generate_queue_buffers_with_extra_lossless_queues_with_inactive_ports(port_names_active, port_names_extra_queues, port_names_inactive) %}
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{{ defs.generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) }}
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{%- endmacro %}
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{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %}
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{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }}
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{%- endmacro %}
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{%- macro generate_pg_profiles_with_extra_lossless_pgs_with_inactive_ports(port_names_active, port_names_extra_pgs, port_names_inactive) %}
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{{ defs.generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) }}
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{%- endmacro %}
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{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %}
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{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }}
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{%- endmacro %}

‎device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/buffers_defaults_t1.j2

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{#
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Copyright (c) 2022-2023 NVIDIA CORPORATION & AFFILIATES.
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Copyright (c) 2022-2024 NVIDIA CORPORATION & AFFILIATES.
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Apache-2.0
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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limitations under the License.
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#}
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{% set default_cable = '300m' %}
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{% set ingress_lossless_pool_size = '44089344' %}
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{% set ingress_lossless_pool_xoff = '9920512' %}
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{%- if ((SYSTEM_DEFAULTS is defined) and ('tunnel_qos_remap' in SYSTEM_DEFAULTS) and (SYSTEM_DEFAULTS['tunnel_qos_remap']['status'] == 'enabled')) -%}
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{% set ingress_lossless_pool_size = '43859968' %}
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{% set ingress_lossless_pool_xoff = '8282112' %}
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{% set egress_lossless_pool_size = '60817392' %}
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{% set egress_lossy_pool_size = '44089344' %}
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{% set egress_lossy_pool_size = '43859968' %}
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{%- else -%}
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{% set ingress_lossless_pool_size = '47792128' %}
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{% set ingress_lossless_pool_xoff = '6217728 ' %}
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{% set egress_lossless_pool_size = '60817392' %}
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{% set egress_lossy_pool_size = '47792128 ' %}
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{%- endif -%}
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{% import 'buffers_defaults_objects.j2' as defs with context %}
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{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }}
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{%- endmacro %}
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{%- macro generate_queue_buffers_with_extra_lossless_queues_with_inactive_ports(port_names_active, port_names_extra_queues, port_names_inactive) %}
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{{ defs.generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) }}
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{%- endmacro %}
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{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %}
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{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }}
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{%- endmacro %}
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{%- macro generate_pg_profiles_with_extra_lossless_pgs_with_inactive_ports(port_names_active, port_names_extra_pgs, port_names_inactive) %}
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{{ defs.generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) }}
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{%- endmacro %}
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{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %}
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{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }}
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{%- endmacro %}

‎device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/pg_profile_lookup.ini

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‎device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/pg_profile_lookup.ini

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##
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## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES.
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## Apache-2.0
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##
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## Licensed under the Apache License, Version 2.0 (the "License");
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## you may not use this file except in compliance with the License.
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## You may obtain a copy of the License at
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##
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## http://www.apache.org/licenses/LICENSE-2.0
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##
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## Unless required by applicable law or agreed to in writing, software
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## distributed under the License is distributed on an "AS IS" BASIS,
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## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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## See the License for the specific language governing permissions and
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## limitations under the License.
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##
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# PG lossless profiles.
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# speed cable size xon xoff threshold
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10000 5m 19456 19456 16384 0
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‎device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O8C48/qos.json.j2

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../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/qos.json.j2
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../../x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-C64/qos.json.j2

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