style: format missing files

smartobjectoriented · Feb 6, 2025 · f8fe808 · f8fe808
1 parent ed557f3
commit f8fe808
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Showing 19 changed files with 365 additions and 368 deletions.
diff --git a/so3/arch/arm32/context.S b/so3/arch/arm32/context.S
@@ -55,13 +55,14 @@
 	@Enable VFP __enable_vfp :
 
 	mov r1,
-	#0x40000000 vmsr fpexc, r1;
-fpexc = r1 bx lr
+# 0x40000000 vmsr fpexc, r1;
+	fpexc = r1 bx lr
 
-	@Get the additional arguments linked to the
-		syscall.@The ABI convention is described in crt0.S of the libc.
-	@r7 contains the syscall number
-	@r10 contains the address of the errno variable __get_syscall_args_ext :
+		@Get the additional arguments linked to the syscall
+			.@The ABI convention is described in crt0.S of the libc.
+		@r7 contains the syscall number
+		@r10 contains the address of the errno variable
+		__get_syscall_args_ext :
 
 	str r7,
 	[r0] str r10,
@@ -74,24 +75,24 @@ fpexc = r1 bx lr
 	@Called once per thread __thread_prologue_kernel :
 
 	@Prepare to jump into C code mov r0,
-	r4 @tcb->th_fn mov r1,
+	r4 @tcb -> th_fn mov r1,
 	r5 @tcb->th_arg
 
-		cpsie i
+	cpsie i
 
-			bl thread_prologue
+	bl thread_prologue
 
 	@User thread initial entry point @Called once per thread @r4 : th_fn,
 	r5 : th_arg,
-	     r6 : user stack __thread_prologue_user :
+	r6 : user stack __thread_prologue_user :
 
 	@Prepare to jump into C code mov r0,
 	r4 @tcb->th_fn mov r1,
 	r5 @tcb->th_arg
 
 #ifdef CONFIG_MMU
-		@Check if the thread must stopped because of ptrace /
-		tracee stmfd sp !,
+		@Check if the thread must stopped because of ptrace
+		/ tracee stmfd sp !,
 	{ r0, r1 } bl __check_ptrace_traceme ldmfd sp !,
 {
 	r0, r1
@@ -144,9 +145,9 @@ dsb sy // WFI may enter a low-power mode
 
 		add ip,
 	r1,
-	#(OFFSET_CPU_REGS + OFFSET_R4)
+#(OFFSET_CPU_REGS + OFFSET_R4)
 
-		ldmia ip,
+	ldmia ip,
 {
 	r4 - sl, fp, ip, sp, pc
 }
@@ -161,11 +162,10 @@ dsb sy // WFI may enter a low-power mode
 					ENTRY(__switch_to)
 
 cmp r0,
-	#0 beq load_ctx
+# 0 beq load_ctx
 
-		add ip,
-	r0,
-	#(OFFSET_TCB_CPU_REGS + OFFSET_R4) save_ctx :
+	add ip, r0,
+#(OFFSET_TCB_CPU_REGS + OFFSET_R4) save_ctx:
 
 	stmia ip,
 {
@@ -177,9 +177,9 @@ cmp r0,
 
 	add ip,
 	r1,
-	#(OFFSET_TCB_CPU_REGS + OFFSET_R4)
+#(OFFSET_TCB_CPU_REGS + OFFSET_R4)
 
-		ldmia ip,
+	ldmia ip,
 {
 	r4 - r10, fp, ip, sp, pc
 }
@@ -215,7 +215,7 @@ cmp r0,
 	0 @set TTBR0
 
 		mov r0,
-	#0 mcr p15, 0, r0, c7, c5,
+# 0 mcr p15, 0, r0, c7, c5,
 	0 @I + BTB cache invalidate
 
 			dsb isb
@@ -242,7 +242,7 @@ cmp r0,
 
 	sub r2,
 	r1,
-	#SVC_STACK_FRAME_SIZE
+#SVC_STACK_FRAME_SIZE
 
 	@Prepare to configure sp during the context switch.str r2,
 	[r0, #(OFFSET_TCB_CPU_REGS + OFFSET_SP)]
@@ -297,22 +297,21 @@ cmp r0,
 			@write(stdout, buf, len)
 
 				mov r0,
-	#STDOUT adr r1, .LC_welcome mov r2, #welcome_len mov r7,
-	#SYSCALL_WRITE
+#STDOUT adr r1, .LC_welcome mov r2, #welcome_len mov r7,
+#SYSCALL_WRITE
 
 	@No errno mov r10,
-	#0
+# 0
 
-		@Invoke the syscall
-		- kernel side svc 0
+	@Invoke the syscall - kernel side svc 0
 
 		@exec("sh.elf")
 
 			adr r0,
 	.LC_exec @No args mov r1, #0 mov r2, #0 @No errno mov r10,
-	#0
+# 0
 
 	mov r7,
-	#SYSCALL_EXECVE
+#SYSCALL_EXECVE
 
 	svc 0
diff --git a/so3/arch/arm32/exception.S b/so3/arch/arm32/exception.S
@@ -231,11 +231,11 @@ mov r0,
 		@Check if sigreturn has been called.In this case,
 	we @clean the stack frame which has been used to manage the user handler
 		.cmp r7,
-	#SYSCALL_SIGRETURN bne __no_sigreturn
+#SYSCALL_SIGRETURN bne __no_sigreturn
 
 	@Reset the stack frame by removing the one issued from sigreturn add sp,
 	sp,
-	#SVC_STACK_FRAME_SIZE
+#SVC_STACK_FRAME_SIZE
 
 	__no_sigreturn:
 
@@ -267,17 +267,16 @@ __ret_from_fork:
 
 			ldmia sp,
 		{ r0 - r12 } add sp, sp,
-		#OFFSET_SP
+#OFFSET_SP
 
 		dsb isb
 
 			ldmia sp,
 		{ sp, lr, pc } ^
 
-			@Used at entry point of a
-				fork'd process (setting the return value to 0) ret_from_fork
+			@Used at entry point of a fork'd process (setting the return value to 0) ret_from_fork
 		: mov r0,
-		#0
+# 0
 
 		b __ret_from_fork
 

diff --git a/so3/arch/arm32/hypercalls.S b/so3/arch/arm32/hypercalls.S
@@ -42,17 +42,16 @@
 disable_irq
 
 	tst sp,
-	#0x7 @8 - bytes aligned strne sp,
+# 0x7 @8 - bytes aligned strne sp,
 	[sp, #(OFFSET_SP - SVC_STACK_FRAME_SIZE - 4)] @save sp subne sp, sp,
-	#4 streq sp,
+# 4 streq sp,
 	[sp, #(OFFSET_SP - SVC_STACK_FRAME_SIZE)] @save sp
 
 	@Alignment guard tst sp,
-	#0x7 @8 - bytes aligned bne __stack_alignment_fault
+# 0x7 @8 - bytes aligned bne __stack_alignment_fault
 
-			  sub sp,
-	sp,
-	#SVC_STACK_FRAME_SIZE
+	sub sp, sp,
+#SVC_STACK_FRAME_SIZE
 
 	stmia sp,
 	{ r0 - r12 }
@@ -113,11 +112,10 @@ adr lr,
 	@Load and
 	skip r0 since it has the return value ldr lr,
 	[sp, #OFFSET_PC] add sp, sp,
-	#4
+# 4
 
-	ldmia sp,
-	{ r1 - r12 } add sp, sp,
-	#SVC_STACK_FRAME_SIZE
+	ldmia sp, { r1 - r12 } add sp, sp,
+#SVC_STACK_FRAME_SIZE
 
 	mov pc,
 	lr
@@ -126,14 +124,14 @@ adr lr,
  * hypercall_table
  */
 		.type hypercall_table,
-	#object ENTRY(hypercall_table)
+#object ENTRY(hypercall_table)
 
-		__hypercall_start
+	__hypercall_start
 	:.long do_event_channel_op.long do_console_io.long do_physdev_op
 		 .long do_sched_op.long do_domctl
 		 .long do_soo_hypercall
 
-	 __hypercall_end :
+			 __hypercall_end :
 
 		 .LCpseudo_usr_mode
 	:.word pseudo_usr_mode

diff --git a/so3/arch/arm32/include/asm/processor.h b/so3/arch/arm32/include/asm/processor.h
@@ -251,14 +251,14 @@
 
 					      .macro current_cpu reg mrc p15,
 	0, \reg, c0, c0, 5 @read Multiprocessor ID register reg and \reg, \reg,
-	#0x3 @mask on CPU ID
-		bits.endm
+# 0x3 @mask on CPU ID
+	bits.endm
 
-			.macro disable_irq cpsid i
-			.endm
+		.macro disable_irq cpsid i
+		.endm
 
-			.macro enable_irq cpsie i
-			.endm
+		.macro enable_irq cpsie i
+		.endm
 
 /*
  * Build a return instruction for this processor type.
@@ -267,7 +267,7 @@
 
 #define LOADREGS(cond, base, reglist...) ldm##cond base, reglist
 
-				scno.req r7 @syscall number tbl.req r8
+			scno.req r7 @syscall number tbl.req r8
 	@syscall table pointer
 
 #endif /* __ASSEMBLY__ */
@@ -400,7 +400,8 @@ static inline uint32_t local_save_flags(void)
 {
 	uint32_t flags;
 
-	asm volatile("mrs	%0, " IRQMASK_REG_NAME_R "	@ local_save_flags"
+	asm volatile("mrs	%0, " IRQMASK_REG_NAME_R
+		     "	@ local_save_flags"
 		     : "=r"(flags)
 		     :
 		     : "memory", "cc");

diff --git a/so3/arch/arm32/lib/strchr.S b/so3/arch/arm32/lib/strchr.S
@@ -19,13 +19,13 @@
 
 .global strchr.text.align 5 strchr : and r1, r1, #0xff 1 : ldrb r2,
 							   [r0],
-							   #1 teq r2,
+# 1 teq r2,
 							   r1 teqne r2,
-							   #0 bne 1b teq r2,
+# 0 bne 1b teq r2,
 							   r1 movne r0,
-							   #0 subeq r0,
+# 0 subeq r0,
 							   r0,
-							   #1
+# 1
 
 							   mov pc,
 							   lr