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daymdaym
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Clean up EspiInit.
1 parent 6242b4a commit 7de9ca0

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3 files changed

+213
-25
lines changed

3 files changed

+213
-25
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‎src/ondisk.rs

+205-19
Original file line numberDiff line numberDiff line change
@@ -6401,18 +6401,83 @@ pub mod fch {
64016401
use crate::struct_accessors::{make_accessors, Getter, Setter, BU8};
64026402
use crate::types::Result;
64036403

6404+
#[repr(u8)]
6405+
#[derive(Debug, PartialEq, FromPrimitive, ToPrimitive, Clone, Copy)]
6406+
#[cfg_attr(feature = "serde", derive(serde::Deserialize, serde::Serialize))]
6407+
#[cfg_attr(feature = "schemars", derive(schemars::JsonSchema))]
6408+
#[non_exhaustive]
6409+
pub enum EspiInitDataBusSelect {
6410+
OutputLow = 0,
6411+
OutputHigh = 1,
6412+
}
6413+
6414+
#[repr(u8)]
6415+
#[derive(Debug, PartialEq, FromPrimitive, ToPrimitive, Clone, Copy)]
6416+
#[cfg_attr(feature = "serde", derive(serde::Deserialize, serde::Serialize))]
6417+
#[cfg_attr(feature = "schemars", derive(schemars::JsonSchema))]
6418+
#[non_exhaustive]
6419+
pub enum EspiInitClockPinSelect {
6420+
Spi = 0,
6421+
Gpio86 = 1,
6422+
}
6423+
6424+
#[repr(u8)]
6425+
#[derive(Debug, PartialEq, FromPrimitive, ToPrimitive, Clone, Copy)]
6426+
#[cfg_attr(feature = "serde", derive(serde::Deserialize, serde::Serialize))]
6427+
#[cfg_attr(feature = "schemars", derive(schemars::JsonSchema))]
6428+
#[non_exhaustive]
6429+
pub enum EspiInitCsPinSelect {
6430+
Gpio30 = 0,
6431+
Gpio31 = 1,
6432+
}
6433+
6434+
#[repr(u8)]
6435+
#[derive(Debug, PartialEq, FromPrimitive, ToPrimitive, Clone, Copy)]
6436+
#[cfg_attr(feature = "serde", derive(serde::Deserialize, serde::Serialize))]
6437+
#[cfg_attr(feature = "schemars", derive(schemars::JsonSchema))]
6438+
#[non_exhaustive]
6439+
pub enum EspiInitClockFrequency {
6440+
#[cfg_attr(feature = "serde", serde(rename = "16.66 MHz"))]
6441+
_16_66MHz = 0,
6442+
#[cfg_attr(feature = "serde", serde(rename = "33.33 MHz"))]
6443+
_33_33MHz = 1,
6444+
#[cfg_attr(feature = "serde", serde(rename = "66.66 MHz"))]
6445+
_66_66MHz = 2,
6446+
}
6447+
6448+
#[repr(u8)]
6449+
#[derive(Debug, PartialEq, FromPrimitive, ToPrimitive, Clone, Copy)]
6450+
#[cfg_attr(feature = "serde", derive(serde::Deserialize, serde::Serialize))]
6451+
#[cfg_attr(feature = "schemars", derive(schemars::JsonSchema))]
6452+
#[non_exhaustive]
6453+
pub enum EspiInitIoMode {
6454+
Single = 0,
6455+
Dual = 1,
6456+
Quad = 2,
6457+
}
6458+
6459+
#[repr(u8)]
6460+
#[derive(Debug, PartialEq, FromPrimitive, ToPrimitive, Clone, Copy)]
6461+
#[cfg_attr(feature = "serde", derive(serde::Deserialize, serde::Serialize))]
6462+
#[cfg_attr(feature = "schemars", derive(schemars::JsonSchema))]
6463+
#[non_exhaustive]
6464+
pub enum EspiInitAlertMode {
6465+
NoDedicatedAlertPin = 0,
6466+
DedicatedAlertPin = 1,
6467+
}
6468+
64046469
make_accessors! {
64056470
#[derive(Default, FromBytes, AsBytes, Unaligned, PartialEq, Debug, Copy, Clone)]
64066471
#[repr(C, packed)]
64076472
pub struct EspiInit {
64086473
espi_enabled || bool : BU8 | pub get bool : pub set bool,
64096474

6410-
data_bus_select || SerdeHex8 : u8 | pub get u8 : pub set u8,
6411-
clock_pin_select || SerdeHex8 : u8 | pub get u8 : pub set u8,
6412-
cs_pin_select || SerdeHex8 : u8 | pub get u8 : pub set u8,
6413-
clock_frequency || SerdeHex8 : u8 | pub get u8 : pub set u8,
6414-
io_mode || SerdeHex8 : u8 | pub get u8 : pub set u8,
6415-
alert_mode || SerdeHex8 : u8 | pub get u8 : pub set u8,
6475+
data_bus_select || SerdeHex8 : u8 | pub get EspiInitDataBusSelect : pub set EspiInitDataBusSelect,
6476+
clock_pin_select || SerdeHex8 : u8 | pub get EspiInitClockPinSelect : pub set EspiInitClockPinSelect,
6477+
cs_pin_select || SerdeHex8 : u8 | pub get EspiInitCsPinSelect : pub set EspiInitCsPinSelect,
6478+
clock_frequency || SerdeHex8 : u8 | pub get EspiInitClockFrequency : pub set EspiInitClockFrequency,
6479+
io_mode || SerdeHex8 : u8 | pub get EspiInitIoMode : pub set EspiInitIoMode,
6480+
alert_mode || SerdeHex8 : u8 | pub get EspiInitAlertMode : pub set EspiInitAlertMode,
64166481

64176482
pltrst_deassert || bool : BU8 | pub get bool : pub set bool,
64186483
io80_decoding_enabled || bool : BU8 | pub get bool : pub set bool,
@@ -6421,25 +6486,27 @@ pub mod fch {
64216486
/// The first entry is usually for IPMI.
64226487
/// The last two entries != 0 are the serial ports.
64236488
/// Use values 3 (32 bit) or 7 (64 bit).
6424-
io_range_size || [SerdeHex8; 16] : [u8; 16] | pub get [u8; 16] : pub set [u8; 16],
6489+
io_range_sizes_minus_one || [SerdeHex8; 16] : [u8; 16],
64256490
/// The first entry is usually for IPMI.
64266491
/// The last two entries != 0 are the serial ports.
6427-
io_range_base || [SerdeHex16; 16] : [LU16; 16] | pub get [u16; 16] : pub set [u16; 16],
6492+
io_range_bases || [SerdeHex16; 16] : [LU16; 16],
64286493

6429-
mmio_range_size || [SerdeHex16; 5] : [LU16; 5] | pub get [u16; 5] : pub set [u16; 5],
6430-
mmio_range_base || [SerdeHex32; 5] : [LU32; 5] | pub get [u32; 5] : pub set [u32; 5],
6494+
mmio_range_sizes_minus_one || [SerdeHex16; 5] : [LU16; 5],
6495+
mmio_range_bases || [SerdeHex32; 5] : [LU32; 5],
64316496

6432-
irq_mask || SerdeHex32 : LU32, // | pub get LU32 : pub set u32, // FIXME bitmap
6433-
irq_polarity || SerdeHex32 : LU32, // | pub get LU32 : pub set u32, // FIXME bitmap
6497+
/// bitmap
6498+
irq_mask || SerdeHex32 : LU32 | pub get u32 : pub set u32,
6499+
/// bitmap
6500+
irq_polarity || SerdeHex32 : LU32 | pub get u32 : pub set u32,
64346501

64356502
cputemp_rtctime_vw_enabled || bool : BU8 | pub get bool : pub set bool,
6436-
cputemp_rtctime_vw_index_select || SerdeHex8 : u8 | pub get u8 : pub set u8,
6503+
cputemp_rtctime_vw_index_select || SerdeHex8 : u8 | pub get u8 : pub set u8, // FIXME what's that?
64376504

64386505
_dummy_1 : u8,
64396506
_dummy_2 : u8,
64406507

6441-
cpu_temp_mmio_base || SerdeHex32 : LU32 | pub get u32 : pub set u32, // FIXME
6442-
rtc_time_mmio_base || SerdeHex32 : LU32 | pub get u32 : pub set u32, // FIXME
6508+
cpu_temp_mmio_base || SerdeHex32 : LU32, // 0: none
6509+
rtc_time_mmio_base || SerdeHex32 : LU32, // 0: none
64436510

64446511
bus_master_enabled || bool : BU8 | pub get bool : pub set bool,
64456512

@@ -6449,6 +6516,125 @@ pub mod fch {
64496516
}
64506517
}
64516518

6519+
pub struct EspiInitIoRange {
6520+
pub base: u16,
6521+
/// Real size in bytes.
6522+
pub size: u8,
6523+
}
6524+
6525+
pub struct EspiInitMmioRange {
6526+
pub base: u32,
6527+
/// Real size in bytes.
6528+
pub size: u16,
6529+
}
6530+
6531+
impl EspiInit {
6532+
pub fn io_range(
6533+
&self,
6534+
index: usize,
6535+
) -> Result<Option<EspiInitIoRange>> {
6536+
if index < self.io_range_sizes_minus_one.len() {
6537+
Ok(if self.io_range_bases[index].get() == 0 {
6538+
None
6539+
} else {
6540+
Some(EspiInitIoRange {
6541+
base: self.io_range_bases[index].get(),
6542+
size: self.io_range_sizes_minus_one[index] + 1,
6543+
})
6544+
})
6545+
} else {
6546+
Err(Error::EntryRange)
6547+
}
6548+
}
6549+
pub fn set_io_range(
6550+
&mut self,
6551+
index: usize,
6552+
value: Option<EspiInitIoRange>,
6553+
) {
6554+
if index < self.io_range_sizes_minus_one.len() {
6555+
match value {
6556+
None => {
6557+
self.io_range_sizes_minus_one[index] = 0.into();
6558+
self.io_range_bases[index] = 0.into();
6559+
}
6560+
Some(x) => {
6561+
assert!(x.size > 0);
6562+
self.io_range_sizes_minus_one[index] = (x.size - 1).into();
6563+
self.io_range_bases[index] = x.base.into();
6564+
}
6565+
}
6566+
}
6567+
}
6568+
pub fn io_range_count(&self) -> usize {
6569+
self.io_range_sizes_minus_one.len()
6570+
}
6571+
6572+
pub fn mmio_range(
6573+
&self,
6574+
index: usize,
6575+
) -> Result<Option<EspiInitMmioRange>> {
6576+
if index < self.mmio_range_sizes_minus_one.len() {
6577+
Ok(if self.mmio_range_bases[index].get() == 0 {
6578+
None
6579+
} else {
6580+
Some(EspiInitMmioRange {
6581+
base: self.mmio_range_bases[index].get(),
6582+
size: self.mmio_range_sizes_minus_one[index].get() + 1,
6583+
})
6584+
})
6585+
} else {
6586+
Err(Error::EntryRange)
6587+
}
6588+
}
6589+
pub fn set_mmio_range(
6590+
&mut self,
6591+
index: usize,
6592+
value: Option<EspiInitMmioRange>,
6593+
) {
6594+
if index < self.mmio_range_sizes_minus_one.len() {
6595+
match value {
6596+
None => {
6597+
self.mmio_range_sizes_minus_one[index] = 0.into();
6598+
self.mmio_range_bases[index] = 0.into();
6599+
}
6600+
Some(x) => {
6601+
assert!(x.size > 0);
6602+
self.mmio_range_sizes_minus_one[index] = (x.size - 1).into();
6603+
self.mmio_range_bases[index] = x.base.into();
6604+
}
6605+
}
6606+
}
6607+
}
6608+
pub fn mmio_range_count(&self) -> usize {
6609+
self.mmio_range_sizes_minus_one.len()
6610+
}
6611+
6612+
pub fn cpu_temp_mmio_base(&self) -> Result<Option<u32>> {
6613+
match self.cpu_temp_mmio_base.get() {
6614+
0 => Ok(None),
6615+
x => Ok(Some(x)),
6616+
}
6617+
}
6618+
pub fn set_cpu_temp_mmio_base(&mut self, value: Option<u32>) {
6619+
self.cpu_temp_mmio_base.set(match value {
6620+
None => 0,
6621+
Some(x) => x,
6622+
});
6623+
}
6624+
pub fn rtc_time_mmio_base(&self) -> Result<Option<u32>> {
6625+
match self.rtc_time_mmio_base.get() {
6626+
0 => Ok(None),
6627+
x => Ok(Some(x)),
6628+
}
6629+
}
6630+
pub fn set_rtc_time_mmio_base(&mut self, value: Option<u32>) {
6631+
self.rtc_time_mmio_base.set(match value {
6632+
None => 0,
6633+
Some(x) => x,
6634+
});
6635+
}
6636+
}
6637+
64526638
impl EntryCompatible for EspiInit {
64536639
fn is_entry_compatible(entry_id: EntryId, _prefix: &[u8]) -> bool {
64546640
matches!(entry_id, EntryId::Fch(FchEntryId::EspiInit))
@@ -6474,10 +6660,10 @@ pub mod fch {
64746660
assert!(offset_of!(EspiInit, pltrst_deassert) == 7);
64756661
assert!(offset_of!(EspiInit, io80_decoding_enabled) == 8);
64766662
assert!(offset_of!(EspiInit, io6064_decoding_enabled) == 9);
6477-
assert!(offset_of!(EspiInit, io_range_size) == 10);
6478-
assert!(offset_of!(EspiInit, io_range_base) == 26);
6479-
assert!(offset_of!(EspiInit, mmio_range_size) == 58);
6480-
assert!(offset_of!(EspiInit, mmio_range_base) == 68);
6663+
assert!(offset_of!(EspiInit, io_range_sizes_minus_one) == 10);
6664+
assert!(offset_of!(EspiInit, io_range_bases) == 26);
6665+
assert!(offset_of!(EspiInit, mmio_range_sizes_minus_one) == 58);
6666+
assert!(offset_of!(EspiInit, mmio_range_bases) == 68);
64816667
assert!(offset_of!(EspiInit, irq_mask) == 88);
64826668
assert!(offset_of!(EspiInit, irq_polarity) == 92);
64836669
assert!(offset_of!(EspiInit, cputemp_rtctime_vw_enabled) == 96);

‎src/serializers.rs

+6-6
Original file line numberDiff line numberDiff line change
@@ -871,18 +871,18 @@ impl_struct_serde_conversion!(
871871
pltrst_deassert,
872872
io80_decoding_enabled,
873873
io6064_decoding_enabled,
874-
io_range_size,
875-
io_range_base,
876-
mmio_range_size,
877-
mmio_range_base,
874+
io_range_sizes_minus_one,
875+
io_range_bases,
876+
mmio_range_sizes_minus_one,
877+
mmio_range_bases,
878878
irq_mask,
879879
irq_polarity,
880880
cputemp_rtctime_vw_enabled,
881881
cputemp_rtctime_vw_index_select,
882882
_dummy_1,
883883
_dummy_2,
884-
cpu_temp_mmio_base, // FIXME
885-
rtc_time_mmio_base, // FIXME
884+
cpu_temp_mmio_base,
885+
rtc_time_mmio_base,
886886
bus_master_enabled,
887887
_dummy_3,
888888
_dummy_4,

‎src/types.rs

+2
Original file line numberDiff line numberDiff line change
@@ -36,6 +36,8 @@ pub enum Error {
3636
EntryUniqueKeyViolation,
3737
#[cfg_attr(feature = "std", error("entry type mismatch"))]
3838
EntryTypeMismatch,
39+
#[cfg_attr(feature = "std", error("entry range"))]
40+
EntryRange,
3941
#[cfg_attr(feature = "std", error("token not found"))]
4042
TokenNotFound,
4143
#[cfg_attr(feature = "std", error("token ordering violation"))]

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