|
33 | 33 |
|
34 | 34 | from unittest import TestCase
|
35 | 35 |
|
36 |
| -from random import randrange |
| 36 | +from random import randrange, uniform |
37 | 37 |
|
38 | 38 | import qiskit.circuit.library as qiskit_library
|
39 | 39 | from qiskit.quantum_info import Operator
|
40 | 40 |
|
41 | 41 | RND_TIMES = 100
|
42 | 42 |
|
43 | 43 | single_gate_list = [
|
| 44 | + {"qiskit": qiskit_gate.IGate, "tq": tq.i, "name": "Identity"}, |
44 | 45 | {"qiskit": qiskit_gate.HGate, "tq": tq.h, "name": "Hadamard"},
|
45 | 46 | {"qiskit": qiskit_gate.XGate, "tq": tq.x, "name": "x"},
|
46 | 47 | {"qiskit": qiskit_gate.YGate, "tq": tq.y, "name": "y"},
|
47 | 48 | {"qiskit": qiskit_gate.ZGate, "tq": tq.z, "name": "z"},
|
48 | 49 | {"qiskit": qiskit_gate.SGate, "tq": tq.s, "name": "S"},
|
49 | 50 | {"qiskit": qiskit_gate.TGate, "tq": tq.t, "name": "T"},
|
50 | 51 | {"qiskit": qiskit_gate.SdgGate, "tq": tq.sdg, "name": "SDG"},
|
51 |
| - {"qiskit": qiskit_gate.TdgGate, "tq": tq.tdg, "name": "TDG"} |
| 52 | + {"qiskit": qiskit_gate.TdgGate, "tq": tq.tdg, "name": "TDG"}, |
| 53 | + {"qiskit": qiskit_gate.SXGate, "tq": tq.sx}, |
| 54 | + {"qiskit": qiskit_gate.SXdgGate, "tq": tq.sxdg}, |
52 | 55 | ]
|
53 | 56 |
|
54 | 57 | single_param_gate_list = [
|
| 58 | + {"qiskit": qiskit_gate.RXGate, "tq": tq.rx, "name": "RX", "numparam": 1}, |
| 59 | + {"qiskit": qiskit_gate.RYGate, "tq": tq.ry, "name": "Ry", "numparam": 1}, |
| 60 | + {"qiskit": qiskit_gate.RZGate, "tq": tq.rz, "name": "RZ", "numparam": 1}, |
| 61 | + {"qiskit": qiskit_gate.U1Gate, "tq": tq.u1, "name": "U1", "numparam": 1}, |
| 62 | + {"qiskit": qiskit_gate.PhaseGate, "tq": tq.phaseshift, "name": "Phaseshift", "numparam": 1}, |
| 63 | + # {"qiskit": qiskit_gate.GlobalPhaseGate, "tq": tq.globalphase, "name": "Gphase", "numparam": 1}, |
| 64 | + # {"qiskit": qiskit_gate.U2Gate, "tq": tq.u2, "name": "U2", "numparam": 2}, |
| 65 | + # {"qiskit": qiskit_gate.U3Gate, "tq": tq.u3, "name": "U3", "numparam": 3}, |
| 66 | + {"qiskit": qiskit_gate.RGate, "tq": tq.r, "name": "R", "numparam": 3}, |
| 67 | + {"qiskit": qiskit_gate.UGate, "tq": tq.u, "name": "U", "numparam": 3}, |
55 | 68 |
|
56 | 69 | ]
|
57 | 70 |
|
|
61 | 74 | {"qiskit": qiskit_gate.CYGate, "tq": tq.cy, "name": "CY"},
|
62 | 75 | {"qiskit": qiskit_gate.CZGate, "tq": tq.cz, "name": "CZ"},
|
63 | 76 | {"qiskit": qiskit_gate.CSGate, "tq": tq.cs, "name": "CS"},
|
| 77 | + {"qiskit": qiskit_gate.CHGate, "tq": tq.ch, "name": "CH"}, |
| 78 | + {"qiskit": qiskit_gate.CSdgGate, "tq": tq.csdg, "name": "CSdag"}, |
64 | 79 | {"qiskit": qiskit_gate.SwapGate, "tq": tq.swap, "name": "SWAP"},
|
65 | 80 | {"qiskit": qiskit_gate.iSwapGate, "tq": tq.iswap, "name": "iSWAP"}
|
66 | 81 | ]
|
67 | 82 |
|
68 | 83 | two_qubit_param_gate_list = [
|
69 |
| - |
| 84 | + {"qiskit": qiskit_gate.RXXGate, "tq": tq.rxx, "name": "RXX", "numparam": 1}, |
| 85 | + {"qiskit": qiskit_gate.RYYGate, "tq": tq.ryy, "name": "RYY", "numparam": 1}, |
| 86 | + {"qiskit": qiskit_gate.RZZGate, "tq": tq.rzz, "name": "RZZ", "numparam": 1}, |
| 87 | + {"qiskit": qiskit_gate.RZXGate, "tq": tq.rzx, "name": "RZX", "numparam": 1}, |
| 88 | + {"qiskit": qiskit_gate.CRXGate, "tq": tq.crx, "name": "CRX", "numparam": 1}, |
| 89 | + {"qiskit": qiskit_gate.CRYGate, "tq": tq.cry, "name": "CRY", "numparam": 1}, |
| 90 | + {"qiskit": qiskit_gate.CRZGate, "tq": tq.crz, "name": "CRZ", "numparam": 1}, |
| 91 | + {"qiskit": qiskit_gate.CU1Gate, "tq": tq.cu1, "name": "CU1", "numparam": 1}, |
| 92 | + #{"qiskit": qiskit_gate.CU3Gate, "tq": tq.CU3, "name": "CU3", "numparam": 3}, |
| 93 | + #{"qiskit": qiskit_gate.CUGate, "tq": tq.cu, "name": "CU", "numparam": 3} |
70 | 94 | ]
|
71 | 95 |
|
72 | 96 | three_qubit_gate_list = [
|
73 | 97 | {"qiskit": qiskit_gate.CCXGate, "tq": tq.ccx, "name": "Toffoli"},
|
74 | 98 | {"qiskit": qiskit_gate.CSwapGate, "tq": tq.cswap, "name": "CSWAP"},
|
| 99 | + {"qiskit": qiskit_gate.iSwapGate, "tq": tq.iswap, "name": "ISWAP"}, |
| 100 | + {"qiskit": qiskit_gate.CCZGate, "tq": tq.ccz, "name": "CCZ"}, |
| 101 | + {"qiskit": qiskit_gate.CSXGate, "tq": tq.csx, "name": "CSX"} |
75 | 102 | ]
|
76 | 103 |
|
77 | 104 | three_qubit_param_gate_list = [
|
| 105 | + |
78 | 106 | ]
|
79 | 107 |
|
80 | 108 | pair_list = [
|
81 |
| - {"qiskit": qiskit_gate.SXGate, "tq": tq.SX}, |
82 |
| - {"qiskit": qiskit_gate.CXGate, "tq": tq.CNOT}, |
83 |
| - {"qiskit": qiskit_gate.RXGate, "tq": tq.RX}, |
84 |
| - {"qiskit": qiskit_gate.RYGate, "tq": tq.RY}, |
85 |
| - {"qiskit": qiskit_gate.RZGate, "tq": tq.RZ}, |
86 |
| - {"qiskit": qiskit_gate.RXXGate, "tq": tq.RXX}, |
87 |
| - {"qiskit": qiskit_gate.RYYGate, "tq": tq.RYY}, |
88 |
| - {"qiskit": qiskit_gate.RZZGate, "tq": tq.RZZ}, |
89 |
| - {"qiskit": qiskit_gate.RZXGate, "tq": tq.RZX}, |
90 |
| - # {'qiskit': qiskit_gate.?, 'tq': tq.SSWAP}, |
91 |
| - {"qiskit": qiskit_gate.CSwapGate, "tq": tq.CSWAP}, |
92 |
| - {"qiskit": qiskit_gate.CCXGate, "tq": tq.Toffoli}, |
93 |
| - {"qiskit": qiskit_gate.PhaseGate, "tq": tq.PhaseShift}, |
94 | 109 | # {'qiskit': qiskit_gate.?, 'tq': tq.Rot},
|
95 | 110 | # {'qiskit': qiskit_gate.?, 'tq': tq.MultiRZ},
|
96 |
| - {"qiskit": qiskit_gate.CRXGate, "tq": tq.CRX}, |
97 |
| - {"qiskit": qiskit_gate.CRYGate, "tq": tq.CRY}, |
98 |
| - {"qiskit": qiskit_gate.CRZGate, "tq": tq.CRZ}, |
99 | 111 | # {'qiskit': qiskit_gate.?, 'tq': tq.CRot},
|
100 |
| - {"qiskit": qiskit_gate.UGate, "tq": tq.U}, |
101 |
| - {"qiskit": qiskit_gate.U1Gate, "tq": tq.U1}, |
102 |
| - {"qiskit": qiskit_gate.U2Gate, "tq": tq.U2}, |
103 |
| - {"qiskit": qiskit_gate.U3Gate, "tq": tq.U3}, |
104 |
| - {"qiskit": qiskit_gate.CUGate, "tq": tq.CU}, |
105 |
| - {"qiskit": qiskit_gate.CU1Gate, "tq": tq.CU1}, |
106 | 112 | # {'qiskit': qiskit_gate.?, 'tq': tq.CU2},
|
107 |
| - {"qiskit": qiskit_gate.CU3Gate, "tq": tq.CU3}, |
108 | 113 | {"qiskit": qiskit_gate.ECRGate, "tq": tq.ECR},
|
109 | 114 | # {"qiskit": qiskit_library.QFT, "tq": tq.QFT},
|
110 |
| - {"qiskit": qiskit_gate.SdgGate, "tq": tq.SDG}, |
111 |
| - {"qiskit": qiskit_gate.TdgGate, "tq": tq.TDG}, |
112 |
| - {"qiskit": qiskit_gate.SXdgGate, "tq": tq.SXDG}, |
113 |
| - {"qiskit": qiskit_gate.CHGate, "tq": tq.CH}, |
114 |
| - {"qiskit": qiskit_gate.CCZGate, "tq": tq.CCZ}, |
115 |
| - {"qiskit": qiskit_gate.iSwapGate, "tq": tq.ISWAP}, |
116 |
| - {"qiskit": qiskit_gate.CSGate, "tq": tq.CS}, |
117 |
| - {"qiskit": qiskit_gate.CSdgGate, "tq": tq.CSDG}, |
118 |
| - {"qiskit": qiskit_gate.CSXGate, "tq": tq.CSX}, |
119 | 115 | {"qiskit": qiskit_gate.DCXGate, "tq": tq.DCX},
|
120 | 116 | {"qiskit": qiskit_gate.XXMinusYYGate, "tq": tq.XXMINYY},
|
121 | 117 | {"qiskit": qiskit_gate.XXPlusYYGate, "tq": tq.XXPLUSYY},
|
122 | 118 | {"qiskit": qiskit_gate.C3XGate, "tq": tq.C3X},
|
123 |
| - {"qiskit": qiskit_gate.RGate, "tq": tq.R}, |
124 | 119 | {"qiskit": qiskit_gate.C4XGate, "tq": tq.C4X},
|
125 | 120 | {"qiskit": qiskit_gate.RCCXGate, "tq": tq.RCCX},
|
126 | 121 | {"qiskit": qiskit_gate.RC3XGate, "tq": tq.RC3X},
|
127 |
| - {"qiskit": qiskit_gate.GlobalPhaseGate, "tq": tq.GlobalPhase}, |
128 | 122 | {"qiskit": qiskit_gate.C3SXGate, "tq": tq.C3SX},
|
129 | 123 | ]
|
130 | 124 |
|
@@ -160,6 +154,37 @@ def compare_single_gate(self, gate_pair, qubit_num):
|
160 | 154 | gate_pair['name'], index, qubit_num))
|
161 | 155 | return passed
|
162 | 156 |
|
| 157 | + def compare_single_gate_params(self, gate_pair, qubit_num): |
| 158 | + passed = True |
| 159 | + for index in range(0, qubit_num): |
| 160 | + qdev = tq.NoiseDevice(n_wires=qubit_num, bsz=1, device="cpu", record_op=True) |
| 161 | + paramnum = gate_pair["numparam"] |
| 162 | + params = [] |
| 163 | + for i in range(0, paramnum): |
| 164 | + params.append(uniform(0, 6.2)) |
| 165 | + if (paramnum == 1): |
| 166 | + params = params[0] |
| 167 | + |
| 168 | + print(params) |
| 169 | + gate_pair['tq'](qdev, [index], params=params) |
| 170 | + mat1 = np.array(qdev.get_2d_matrix(0)) |
| 171 | + rho_qiskit = qiskitDensity.from_label('0' * qubit_num) |
| 172 | + rho_qiskit = rho_qiskit.evolve(gate_pair['qiskit'](params), [qubit_num - 1 - index]) |
| 173 | + mat2 = np.array(rho_qiskit.to_operator()) |
| 174 | + if density_is_close(mat1, mat2): |
| 175 | + print("Test passed for %s gate on qubit %d when qubit_number is %d!" % ( |
| 176 | + gate_pair['name'], index, qubit_num)) |
| 177 | + else: |
| 178 | + passed = False |
| 179 | + print("Test failed for %s gaet on qubit %d when qubit_number is %d!" % ( |
| 180 | + gate_pair['name'], index, qubit_num)) |
| 181 | + return passed |
| 182 | + |
| 183 | + def test_single_gates_params(self): |
| 184 | + for qubit_num in range(1, maximum_qubit_num + 1): |
| 185 | + for i in range(0, len(single_param_gate_list)): |
| 186 | + self.assertTrue(self.compare_single_gate_params(single_param_gate_list[i], qubit_num)) |
| 187 | + |
163 | 188 | def test_single_gates(self):
|
164 | 189 | for qubit_num in range(1, maximum_qubit_num + 1):
|
165 | 190 | for i in range(0, len(single_gate_list)):
|
@@ -193,6 +218,46 @@ def compare_two_qubit_gate(self, gate_pair, qubit_num):
|
193 | 218 | gate_pair['name'], index1, index2, qubit_num))
|
194 | 219 | return passed
|
195 | 220 |
|
| 221 | + |
| 222 | + |
| 223 | + |
| 224 | + def compare_two_qubit_params_gate(self, gate_pair, qubit_num): |
| 225 | + passed = True |
| 226 | + for index1 in range(0, qubit_num): |
| 227 | + for index2 in range(0, qubit_num): |
| 228 | + if index1 == index2: |
| 229 | + continue |
| 230 | + paramnum = gate_pair["numparam"] |
| 231 | + params = [] |
| 232 | + for i in range(0, paramnum): |
| 233 | + params.append(uniform(0, 6.2)) |
| 234 | + if (paramnum == 1): |
| 235 | + params = params[0] |
| 236 | + |
| 237 | + qdev = tq.NoiseDevice(n_wires=qubit_num, bsz=1, device="cpu", record_op=True) |
| 238 | + gate_pair['tq'](qdev, [index1, index2],params=params) |
| 239 | + |
| 240 | + mat1 = np.array(qdev.get_2d_matrix(0)) |
| 241 | + rho_qiskit = qiskitDensity.from_label('0' * qubit_num) |
| 242 | + rho_qiskit = rho_qiskit.evolve(gate_pair['qiskit'](params), [qubit_num - 1 - index1, qubit_num - 1 - index2]) |
| 243 | + mat2 = np.array(rho_qiskit.to_operator()) |
| 244 | + if density_is_close(mat1, mat2): |
| 245 | + print("Test passed for %s gate on qubit (%d,%d) when qubit_number is %d!" % ( |
| 246 | + gate_pair['name'], index1, index2, qubit_num)) |
| 247 | + else: |
| 248 | + passed = False |
| 249 | + print("Test failed for %s gate on qubit (%d,%d) when qubit_number is %d!" % ( |
| 250 | + gate_pair['name'], index1, index2, qubit_num)) |
| 251 | + return passed |
| 252 | + |
| 253 | + |
| 254 | + def test_two_qubits_params_gates(self): |
| 255 | + for qubit_num in range(2, maximum_qubit_num + 1): |
| 256 | + for i in range(0, len(two_qubit_param_gate_list)): |
| 257 | + self.assertTrue(self.compare_two_qubit_params_gate(two_qubit_param_gate_list[i], qubit_num)) |
| 258 | + |
| 259 | + |
| 260 | + |
196 | 261 | def test_two_qubits_gates(self):
|
197 | 262 | for qubit_num in range(2, maximum_qubit_num + 1):
|
198 | 263 | for i in range(0, len(two_qubit_gate_list)):
|
|
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