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cm_hal.h
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/*
* Copyright (c) 2017, Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included
* in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
//!
//! \file cm_hal.h
//! \brief Main Entry point for CM HAL component
//!
#ifndef __CM_HAL_H__
#define __CM_HAL_H__
#include "renderhal_legacy.h"
#include "cm_common.h"
#include "cm_debug.h"
#include "cm_csync.h"
#include "cm_ish.h"
#include "mhw_vebox.h"
#include "cm_hal_generic.h"
#include "media_perf_profiler.h"
#include <string>
#include <map>
#define DiscardLow8Bits(x) (uint16_t)(0xff00 & x)
#define FloatToS3_12(x) (uint16_t)((short)(x * 4096))
#define FloatToS3_4(x) (DiscardLow8Bits(FloatToS3_12(x)))
#define CM_32K (32*1024)
#define HAL_CM_KERNEL_CACHE_MISS_THRESHOLD 4
#define HAL_CM_KERNEL_CACHE_HIT_TO_MISS_RATIO 100
#ifdef _WIN64
#define IGC_DLL_NAME "igc64.dll"
#else
#define IGC_DLL_NAME "igc32.dll"
#endif // _WIN64
#define SURFACE_FLAG_ASSUME_NOT_IN_USE 1
#define CM_THREADSPACE_MAX_COLOR_COUNT 16
static const uint32_t INVALID_STREAM_INDEX = 0xFFFFFFFF;
//*-----------------------------------------------------------------------------
//| Macro unsets bitPos bit in value
//*-----------------------------------------------------------------------------
#ifndef CM_HAL_UNSETBIT
#define CM_HAL_UNSETBIT(value, bitPos) \
{ \
value = (value & ~(1 << bitPos)); \
}
#endif
#ifndef CM_HAL_UNSETBIT64
#define CM_HAL_UNSETBIT64(value, bitPos) \
{ \
value = (value & ~(1i64 << bitPos)); \
}
#endif
//*-----------------------------------------------------------------------------
//| Macro sets bitPos bit in value
//*-----------------------------------------------------------------------------
#ifndef CM_HAL_SETBIT
#define CM_HAL_SETBIT(value, bitPos) \
{ \
value = (value | (1 << bitPos)); \
}
#endif
#ifndef CM_HAL_SETBIT64
#define CM_HAL_SETBIT64(value, bitPos) \
{ \
value = (value | (1i64 << bitPos)); \
}
#endif
//*-----------------------------------------------------------------------------
//| Macro checks if bitPos bit in value is set
//*-----------------------------------------------------------------------------
#ifndef CM_HAL_CHECKBIT_IS_SET
#define CM_HAL_CHECKBIT_IS_SET(bitIsSet, value, bitPos) \
{ \
bitIsSet = ((value) & (1 << bitPos))? true: false; \
}
#endif
#ifndef CM_HAL_CHECKBIT_IS_SET64
#define CM_HAL_CHECKBIT_IS_SET64(bitIsSet, value, bitPos) \
{ \
bitIsSet = ((value) & (1i64 << bitPos)); \
}
#endif
#define MAX_CUSTOMIZED_PERFTAG_INDEX 249
#define GPUINIT_PERFTAG_INDEX 250
#define GPUCOPY_READ_PERFTAG_INDEX 251
#define GPUCOPY_WRITE_PERFTAG_INDEX 252
#define GPUCOPY_G2G_PERFTAG_INDEX 253
#define GPUCOPY_C2C_PERFTAG_INDEX 254
#define VEBOX_TASK_PERFTAG_INDEX 255
#define MAX_COMBINE_NUM_IN_PERFTAG 16
#define MAX_ELEMENT_TYPE_COUNT 6
//Copied over from auxilarydevice to avoid inclusion of video acceleration APIs.
struct CMLOOKUP_ENTRY
{
void *osSurfaceHandle; // Surface defined in video acceleration APIs provided by the OS.
UMD_RESOURCE umdSurfaceHandle; // Surface defined in UMD.
uint32_t surfaceAllocationIndex; // Driver allocation index
};
typedef CMLOOKUP_ENTRY *PCMLOOKUP_ENTRY;
struct CMSURFACE_REG_TABLE
{
uint32_t count; // Number of entries
CMLOOKUP_ENTRY *entries; // Surface Lookup table
};
struct CM_HAL_MAX_VALUES
{
uint32_t maxTasks; // [in] Max Tasks
uint32_t maxKernelsPerTask; // [in] Max kernels per task
uint32_t maxKernelBinarySize; // [in] Max kernel binary size
uint32_t maxSpillSizePerHwThread; // [in] Max spill size per thread
uint32_t maxSamplerTableSize; // [in] Max sampler table size
uint32_t maxBufferTableSize; // [in] Max buffer/bufferUP table Size
uint32_t max2DSurfaceTableSize; // [in] Max 2D surface table Size
uint32_t max3DSurfaceTableSize; // [in] Max 3D surface table Size
uint32_t maxArgsPerKernel; // [in] Max arguments per kernel
uint32_t maxArgByteSizePerKernel; // [in] Max argument size in byte per kernel
uint32_t maxSurfacesPerKernel; // [in] Max Surfaces Per Kernel
uint32_t maxSamplersPerKernel; // [in] Max Samplers per kernel
uint32_t maxHwThreads; // [in] Max HW threads
uint32_t maxUserThreadsPerTask; // [in] Max user threads per task
uint32_t maxUserThreadsPerTaskNoThreadArg; // [in] Max user threads per task with no thread arg
};
typedef CM_HAL_MAX_VALUES *PCM_HAL_MAX_VALUES;
//------------------------------------------------------------------------------------------------
//| HAL CM Max Values extention which has more entries which are not included in CM_HAL_MAX_VALUES
//-------------------------------------------------------------------------------------------------
struct CM_HAL_MAX_VALUES_EX
{
uint32_t max2DUPSurfaceTableSize; // [in] Max 2D UP surface table Size
uint32_t maxSampler8x8TableSize; // [in] Max sampler 8x8 table size
uint32_t maxCURBESizePerKernel; // [in] Max CURBE size per kernel
uint32_t maxCURBESizePerTask; // [in] Max CURBE size per task
uint32_t maxIndirectDataSizePerKernel; // [in] Max indirect data size per kernel
uint32_t maxUserThreadsPerMediaWalker; // [in] Max user threads per media walker
uint32_t maxUserThreadsPerThreadGroup; // [in] Max user threads per thread group
};
typedef CM_HAL_MAX_VALUES_EX *PCM_HAL_MAX_VALUES_EX;
struct CM_INDIRECT_SURFACE_INFO
{
uint16_t kind; // Surface kind, values in CM_ARG_KIND. For now, only support ARG_KIND_SURFACE_1D/ARG_KIND_SURFACE_2D/ARG_KIND_SURFACE_2D_UP
uint16_t surfaceIndex; // Surface handle used in driver
uint16_t bindingTableIndex; // Binding table index
uint16_t numBTIPerSurf; // Binding table index count for per surface
};
typedef CM_INDIRECT_SURFACE_INFO *PCM_INDIRECT_SURFACE_INFO;
//*-----------------------------------------------------------------------------
//| HAL CM Indirect Data Param
//*-----------------------------------------------------------------------------
struct CM_HAL_INDIRECT_DATA_PARAM
{
uint16_t indirectDataSize; // [in] Indirect Data Size
uint16_t surfaceCount;
uint8_t *indirectData; // [in] Pointer to Indirect Data Block
PCM_INDIRECT_SURFACE_INFO surfaceInfo;
};
typedef CM_HAL_INDIRECT_DATA_PARAM *PCM_HAL_INDIRECT_DATA_PARAM;
//------------------------
//| HAL CM Create Param
//------------------------
struct CM_HAL_CREATE_PARAM
{
bool disableScratchSpace; // Flag to disable Scratch Space
uint32_t scratchSpaceSize; // Size of Scratch Space per HW thread
uint32_t maxTaskNumber; // Max Task Number
bool requestSliceShutdown; // Flag to enable slice shutdown
bool requestCustomGpuContext; // Flag to use CUSTOM GPU Context
uint32_t kernelBinarySizeinGSH; // Size to be reserved in GSH for kernel binary
bool dynamicStateHeap; // Use Dynamic State Heap management
bool disabledMidThreadPreemption; // Flag to enable mid thread preemption for GPGPU
bool enabledKernelDebug; // Flag to enable Kernel debug
bool refactor; // Flag to enable the fast path
bool disableVebox; // Flag to disable VEBOX API
};
typedef CM_HAL_CREATE_PARAM *PCM_HAL_CREATE_PARAM;
//------------------------------------------------------------------------------
//| CM Sampler Param
//------------------------------------------------------------------------------
enum CM_HAL_PIXEL_TYPE
{
CM_HAL_PIXEL_UINT,
CM_HAL_PIXEL_SINT,
CM_HAL_PIXEL_OTHER
};
struct CM_HAL_SAMPLER_PARAM
{
uint32_t magFilter; // [in] Mag Filter
uint32_t minFilter; // [in] Min Filter
uint32_t addressU; // [in] Address U
uint32_t addressV; // [in] Address V
uint32_t addressW; // [in] Address W
uint32_t handle; // [out] Handle
CM_HAL_PIXEL_TYPE surfaceFormat;
union
{
uint32_t borderColorRedU;
int32_t borderColorRedS;
float borderColorRedF;
};
union
{
uint32_t borderColorGreenU;
int32_t borderColorGreenS;
float borderColorGreenF;
};
union
{
uint32_t borderColorBlueU;
int32_t borderColorBlueS;
float borderColorBlueF;
};
union
{
uint32_t borderColorAlphaU;
int32_t borderColorAlphaS;
float borderColorAlphaF;
};
};
typedef CM_HAL_SAMPLER_PARAM *PCM_HAL_SAMPLER_PARAM;
struct CM_HAL_SURFACE_ENTRY_INFO_ARRAY
{
uint32_t maxEntryNum;
uint32_t usedIndex;
PCM_SURFACE_DETAILS surfEntryInfos;
uint32_t globalSurfNum;
PCM_SURFACE_DETAILS globalSurfInfos;
};
struct CM_HAL_SURFACE_ENTRY_INFO_ARRAYS
{
uint32_t kernelNum;
CM_HAL_SURFACE_ENTRY_INFO_ARRAY *surfEntryInfosArray;
};
//------------------------------------------------------------------------------
//| CM BARRIER MODES
//------------------------------------------------------------------------------
enum CM_BARRIER_MODE
{
CM_NO_BARRIER = 0,
CM_LOCAL_BARRIER = 1,
CM_GLOBAL_BARRIER = 2
};
struct CM_SAMPLER_BTI_ENTRY
{
uint32_t samplerIndex;
uint32_t samplerBTI;
};
typedef CM_SAMPLER_BTI_ENTRY *PCM_SAMPLER_BTI_ENTRY;
//*----------------
//| CM Query Type
//*----------------
enum CM_QUERY_TYPE
{
CM_QUERY_VERSION,
CM_QUERY_REG_HANDLE,
CM_QUERY_MAX_VALUES,
CM_QUERY_GPU,
CM_QUERY_GT,
CM_QUERY_MIN_RENDER_FREQ,
CM_QUERY_MAX_RENDER_FREQ,
CM_QUERY_STEP,
CM_QUERY_GPU_FREQ,
CM_QUERY_MAX_VALUES_EX,
CM_QUERY_SURFACE2D_FORMAT_COUNT,
CM_QUERY_SURFACE2D_FORMATS,
CM_QUERY_PLATFORM_INFO
};
//*-----------------------------------------------------------------------------
//| CM Query Caps
//*-----------------------------------------------------------------------------
struct CM_QUERY_CAPS
{
CM_QUERY_TYPE type;
union
{
int32_t version;
HANDLE hRegistration;
CM_HAL_MAX_VALUES maxValues;
CM_HAL_MAX_VALUES_EX maxValuesEx;
uint32_t maxVmeTableSize;
uint32_t genCore;
uint32_t genGT;
uint32_t minRenderFreq;
uint32_t maxRenderFreq;
uint32_t genStepId;
uint32_t gpuCurrentFreq;
uint32_t surface2DCount;
GMM_RESOURCE_FORMAT *surface2DFormats;
CM_PLATFORM_INFO platformInfo;
};
};
typedef CM_QUERY_CAPS *PCM_QUERY_CAPS;
//------------------------------------------------------------------------------
//| Enumeration for Task Status
//------------------------------------------------------------------------------
enum CM_HAL_TASK_STATUS
{
CM_TASK_QUEUED,
CM_TASK_IN_PROGRESS,
CM_TASK_FINISHED,
CM_TASK_RESET
};
//------------------------------------------------------------------------------
//| CM conditional batch buffer end information
//------------------------------------------------------------------------------
struct CM_HAL_CONDITIONAL_BB_END_INFO
{
uint32_t bufferTableIndex;
uint32_t offset;
uint32_t compareValue;
bool disableCompareMask;
bool endCurrentLevel;
uint32_t operatorCode;
};
typedef CM_HAL_CONDITIONAL_BB_END_INFO *PCM_HAL_CONDITIONAL_BB_END_INFO;
//------------------------------------------------------------------------------
//| HAL CM Query Task Param
//------------------------------------------------------------------------------
struct CM_HAL_QUERY_TASK_PARAM
{
int32_t taskId; // [in] Task ID
uint32_t taskType; // [in] Task type
CM_QUEUE_CREATE_OPTION queueOption; // [in] Queue type
CM_HAL_TASK_STATUS status; // [out] Task Status
uint64_t taskDurationNs; // [out] Task Duration
uint64_t taskDurationTicks; // [out] Task Duration in Ticks
uint64_t taskHWStartTimeStampInTicks; // [out] Task Start Time Stamp in Ticks
uint64_t taskHWEndTimeStampInTicks; // [out] Task End Time Stamp in Ticks
LARGE_INTEGER taskGlobalSubmitTimeCpu; // [out] The CM task submission time in CPU
LARGE_INTEGER taskSubmitTimeGpu; // [out] The CM task submission time in GPU
LARGE_INTEGER taskHWStartTimeStamp; // [out] The task start execution time in GPU
LARGE_INTEGER taskHWEndTimeStamp; // [out] The task end execution time in GPU
};
typedef CM_HAL_QUERY_TASK_PARAM *PCM_HAL_QUERY_TASK_PARAM;
//*-----------------------------------------------------------------------------
//| Execute Group data params
//*-----------------------------------------------------------------------------
struct CM_HAL_EXEC_TASK_GROUP_PARAM
{
PCM_HAL_KERNEL_PARAM *kernels; // [in] Array of Kernel data
uint32_t *kernelSizes; // [in] Parallel array of Kernel Size
uint32_t numKernels; // [in] Number of Kernels in a task
int32_t taskIdOut; // [out] Task ID
uint32_t threadSpaceWidth; // [in] thread space width within group
uint32_t threadSpaceHeight; // [in] thread space height within group
uint32_t threadSpaceDepth; // [in] thread space depth within group
uint32_t groupSpaceWidth; // [in] group space width
uint32_t groupSpaceHeight; // [in] group space height
uint32_t groupSpaceDepth; // [in] group space depth
uint32_t slmSize; // [in] SLM size per thread group in 1KB unit
CM_HAL_SURFACE_ENTRY_INFO_ARRAYS surEntryInfoArrays; // [in] GT-PIN
void *osData; // [out] Used for Linux OS data to pass to event
uint64_t syncBitmap; // [in] synchronization flag among kernels
bool globalSurfaceUsed; // [in] is global surface used
uint32_t *kernelCurbeOffset; // [in] Array of Kernel Curbe Offset
bool kernelDebugEnabled; // [in] kernel debug is enabled
CM_TASK_CONFIG taskConfig; // [in] task Config
CM_EXECUTION_CONFIG krnExecCfg[CM_MAX_KERNELS_PER_TASK]; // [in] kernel execution config in a task. replace numOfWalkers in CM_TASK_CONFIG.
void *userDefinedMediaState; // [in] pointer to a user defined media state heap block
CM_QUEUE_CREATE_OPTION queueOption; // [in] multiple contexts queue option
PMOS_VIRTUALENGINE_HINT_PARAMS mosVeHintParams; // [in] pointer to virtual engine paramter saved in CmQueueRT
uint64_t conditionalEndBitmap; // [in] bit map for conditional end b/w kernels
CM_HAL_CONDITIONAL_BB_END_INFO conditionalEndInfo[CM_MAX_CONDITIONAL_END_CMDS];
};
typedef CM_HAL_EXEC_TASK_GROUP_PARAM *PCM_HAL_EXEC_GROUP_TASK_PARAM;
struct CM_HAL_EXEC_HINTS_TASK_PARAM
{
PCM_HAL_KERNEL_PARAM *kernels; // [in] Array of kernel data
uint32_t *kernelSizes; // [in] Parallel array of kernel size
uint32_t numKernels; // [in] Number of kernels in a task
int32_t taskIdOut; // [out] Task ID
uint32_t hints; // [in] Hints
uint32_t numTasksGenerated; // [in] Number of task generated already for split task
bool isLastTask; // [in] Used to split tasks
void *osData; // [out] Used for Linux OS data to pass to event
uint32_t *kernelCurbeOffset; // [in] Kernel Curbe offset
void *userDefinedMediaState; // [in] pointer to a user defined media state heap block
CM_QUEUE_CREATE_OPTION queueOption; // [in] multiple contexts queue option
};
typedef CM_HAL_EXEC_HINTS_TASK_PARAM *PCM_HAL_EXEC_HINTS_TASK_PARAM;
//------------------------------------------------------------------------------
//| CM scoreboard XY with color,mask and slice-sub-slice select
//------------------------------------------------------------------------------
struct CM_HAL_SCOREBOARD
{
int32_t x;
int32_t y;
uint8_t mask;
uint8_t resetMask;
uint8_t color;
uint8_t sliceSelect;
uint8_t subSliceSelect;
};
typedef CM_HAL_SCOREBOARD *PCM_HAL_SCOREBOARD;
//------------------------------------------------------------------------------
//| CM scoreboard XY with mask and resetMask for Enqueue path
//------------------------------------------------------------------------------
struct CM_HAL_MASK_AND_RESET
{
uint8_t mask;
uint8_t resetMask;
};
typedef CM_HAL_MASK_AND_RESET *PCM_HAL_MASK_AND_RESET;
//------------------------------------------------------------------------------
//| CM dependency information
//------------------------------------------------------------------------------
struct CM_HAL_DEPENDENCY
{
uint32_t count;
int32_t deltaX[CM_HAL_MAX_DEPENDENCY_COUNT];
int32_t deltaY[CM_HAL_MAX_DEPENDENCY_COUNT];
};
struct CM_HAL_EXEC_TASK_PARAM
{
PCM_HAL_KERNEL_PARAM *kernels; // [in] Array of Kernel data
uint32_t *kernelSizes; // [in] Parallel array of Kernel Size
uint32_t numKernels; // [in] Number of Kernels in a task
int32_t taskIdOut; // [out] Task ID
CM_HAL_SCOREBOARD **threadCoordinates; // [in] Scoreboard(x,y)
CM_DEPENDENCY_PATTERN dependencyPattern; // [in] pattern
uint32_t threadSpaceWidth; // [in] width
uint32_t threadSpaceHeight; // [in] height
CM_HAL_SURFACE_ENTRY_INFO_ARRAYS surfEntryInfoArrays; // [out] Used by GT-Pin
void *osData; // [out] Used for Linux OS data to pass to event
uint32_t colorCountMinusOne; // [in]
PCM_HAL_MASK_AND_RESET *dependencyMasks; // [in] media object thread dependency masks
uint64_t syncBitmap; // [in] bit map for sync b/w kernels
bool globalSurfaceUsed; // [in] if global surface used
uint32_t *kernelCurbeOffset; // [in] array of kernel's curbe offset
CM_WALKING_PATTERN walkingPattern; // [in] media walking pattern
uint8_t walkingParamsValid; // [in] for engineering build
CM_WALKING_PARAMETERS walkingParams; // [in] for engineering build
uint8_t dependencyVectorsValid; // [in] for engineering build
CM_HAL_DEPENDENCY dependencyVectors; // [in] for engineering build
CM_MW_GROUP_SELECT mediaWalkerGroupSelect; // [in]
bool kernelDebugEnabled; // [in] kernel debug is enabled
uint64_t conditionalEndBitmap; // [in] bit map for conditional end b/w kernels
CM_HAL_CONDITIONAL_BB_END_INFO conditionalEndInfo[CM_MAX_CONDITIONAL_END_CMDS];
CM_TASK_CONFIG taskConfig; // [in] task Config
void *userDefinedMediaState; // [in] pointer to a user defined media state heap block
CM_QUEUE_CREATE_OPTION queueOption; // [in] multiple contexts queue option
};
typedef CM_HAL_EXEC_TASK_PARAM *PCM_HAL_EXEC_TASK_PARAM;
//*-----------------------------------------------------------------------------
//| HAL CM Task Param
//*-----------------------------------------------------------------------------
struct CM_HAL_TASK_PARAM
{
uint32_t numKernels; // [in] number of kernels
uint64_t syncBitmap; // [in] Sync bitmap
uint32_t batchBufferSize; // [in] Size of Batch Buffer Needed
uint32_t vfeCurbeSize; // [out] Sum of CURBE Size
uint32_t urbEntrySize; // [out] Maximum Payload Size
CM_HAL_SCOREBOARD **threadCoordinates; // [in] Scoreboard(x,y)
CM_DEPENDENCY_PATTERN dependencyPattern; // [in] pattern
uint32_t threadSpaceWidth; // [in] width
uint32_t threadSpaceHeight; // [in] height
uint32_t groupSpaceWidth; // [in] group space width
uint32_t groupSpaceHeight; // [in] group space height
uint32_t slmSize; // [in] size of SLM
CM_HAL_SURFACE_ENTRY_INFO_ARRAYS surfEntryInfoArrays; // [in] GTPin
uint32_t curKernelIndex;
uint32_t colorCountMinusOne; // [in] color count
PCM_HAL_MASK_AND_RESET *dependencyMasks; // [in] Thread dependency masks
uint8_t reuseBBUpdateMask; // [in] re-use batch buffer and just update mask
uint32_t surfacePerBT; // [out] surface number for binding table
bool blGpGpuWalkerEnabled; // [out]
CM_WALKING_PATTERN walkingPattern; // [in] media walking pattern
bool hasBarrier; // [in] if there is barrier
uint8_t walkingParamsValid; // [in] for engineering build
CM_WALKING_PARAMETERS walkingParams; // [in] for engineering build
uint8_t dependencyVectorsValid; // [in] for engineering build
CM_HAL_DEPENDENCY dependencyVectors; // [in] for engineering build
CM_MW_GROUP_SELECT mediaWalkerGroupSelect; // [in]
uint32_t kernelDebugEnabled; // [in]
uint64_t conditionalEndBitmap; // [in] conditional end bitmap
CM_HAL_CONDITIONAL_BB_END_INFO
conditionalEndInfo[CM_MAX_CONDITIONAL_END_CMDS]; // [in] conditional BB end info used to fill conditionalBBEndParams
MHW_MI_CONDITIONAL_BATCH_BUFFER_END_PARAMS
conditionalBBEndParams[CM_MAX_CONDITIONAL_END_CMDS];
CM_TASK_CONFIG taskConfig; // [in] task Config
CM_EXECUTION_CONFIG krnExecCfg[CM_MAX_KERNELS_PER_TASK]; // [in] kernel execution config in a task. replace numOfWalkers in CM_TASK_CONFIG.
void *userDefinedMediaState; // [in] pointer to a user defined media state heap block
// [in] each kernel's sampler heap offset from the DSH sampler heap base
unsigned int samplerOffsetsByKernel[CM_MAX_KERNELS_PER_TASK];
// [in] each kernel's sampler count
unsigned int samplerCountsByKernel[CM_MAX_KERNELS_PER_TASK];
// [in] each kernel's indirect sampler heap offset from the DSH sampler heap base
unsigned int samplerIndirectOffsetsByKernel[CM_MAX_KERNELS_PER_TASK];
CM_QUEUE_CREATE_OPTION queueOption; // [in] multiple contexts queue option
PMOS_VIRTUALENGINE_HINT_PARAMS mosVeHintParams; // [in] pointer to virtual engine paramter saved in CmQueueRT
};
typedef CM_HAL_TASK_PARAM *PCM_HAL_TASK_PARAM;
//------------------------------------------------------------------------------
//| CM batch buffer dirty status
//------------------------------------------------------------------------------
enum CM_HAL_BB_DIRTY_STATUS
{
CM_HAL_BB_CLEAN = 0,
CM_HAL_BB_DIRTY = 1
};
//------------------------------------------------------------------------------
//| CM dispatch information for 26Z (for EnqueueWithHints)
//------------------------------------------------------------------------------
struct CM_HAL_WAVEFRONT26Z_DISPATCH_INFO
{
uint32_t numWaves;
uint32_t *numThreadsInWave;
};
//*-----------------------------------------------------------------------------
//| HAL CM Kernel Threadspace Param
//*-----------------------------------------------------------------------------
struct CM_HAL_KERNEL_THREADSPACE_PARAM
{
CM_HAL_DEPENDENCY dependencyInfo; // [in] Kernel dependency
CM_HAL_DEPENDENCY dependencyVectors; // [in] for engineering build
CM_WALKING_PARAMETERS walkingParams; // [in] for engineering build
PCM_HAL_SCOREBOARD threadCoordinates; // [in]
uint32_t colorCountMinusOne; // [in] for color count minus one
uint16_t threadSpaceWidth; // [in] Kernel Threadspace width
uint16_t threadSpaceHeight; // [in] Kernel Threadspace height
CM_DEPENDENCY_PATTERN patternType; // [in] Kernel dependency as enum
uint8_t reuseBBUpdateMask; // [in]
CM_HAL_WAVEFRONT26Z_DISPATCH_INFO dispatchInfo; // [in]
uint8_t globalDependencyMask; // [in] dependency mask in gloabal dependency vectors
uint8_t walkingParamsValid; // [in] for engineering build
uint8_t dependencyVectorsValid; // [in] for engineering build
CM_MW_GROUP_SELECT groupSelect; // [in] for group select on BDW+
CM_HAL_BB_DIRTY_STATUS bbDirtyStatus; // [in] batch buffer dirty status
CM_WALKING_PATTERN walkingPattern; // [in] media walking pattern as enum
};
typedef CM_HAL_KERNEL_THREADSPACE_PARAM *PCM_HAL_KERNEL_THREADSPACE_PARAM;
//------------------------------------------------------------------------------
//| CM buffer types
//------------------------------------------------------------------------------
enum CM_BUFFER_TYPE
{
CM_BUFFER_N = 0,
CM_BUFFER_UP = 1,
CM_BUFFER_SVM = 2,
CM_BUFFER_GLOBAL = 3,
CM_BUFFER_STATE = 4,
CM_BUFFER_STATELESS = 5
};
//------------------------------------------------------------------------------
//| CM shift direction. Used for CloneKernel API to adjust head kernel allocation ID.
//| Need to adjust IDs after the kernel allocation entries are shifted
//| i.e. neighboring free kernel allocation entries are combined into a single larger entry
//------------------------------------------------------------------------------
enum CM_SHIFT_DIRECTION
{
CM_SHIFT_LEFT = 0,
CM_SHIFT_RIGHT = 1
};
//---------------
//| CM clone type
//---------------
enum CM_CLONE_TYPE
{
CM_NO_CLONE = 0, // regular kernel, not created from CloneKernel API and has no kernels that were cloned from it
CM_CLONE_ENTRY = 1, // 64B kernel allocation entry for a cloned kernel (will point to the head kernel's binary)
CM_HEAD_KERNEL = 2, // kernel allocation entry that contains kernel binary (clone kernels will use this offset)
CM_CLONE_AS_HEAD_KERNEL = 3 // cloned kernel is serving as a head kernel (original kernel and other clones can use this offset)
};
enum CM_STATE_BUFFER_TYPE
{
CM_STATE_BUFFER_NONE = 0,
CM_STATE_BUFFER_CURBE = 1,
};
//*-----------------------------------------------------------------------------
//| Enumeration for Kernel argument type
//*-----------------------------------------------------------------------------
enum CM_HAL_KERNEL_ARG_KIND
{
CM_ARGUMENT_GENERAL = 0x0,
CM_ARGUMENT_SAMPLER = 0x1,
CM_ARGUMENT_SURFACE2D = 0x2,
CM_ARGUMENT_SURFACEBUFFER = 0x3,
CM_ARGUMENT_SURFACE3D = 0x4,
CM_ARGUMENT_SURFACE_VME = 0x5,
CM_ARGUMENT_VME_STATE = 0x6,
CM_ARGUMENT_SURFACE2D_UP = 0x7,
CM_ARGUMENT_SURFACE_SAMPLER8X8_AVS = 0x8,
CM_ARGUMENT_SURFACE_SAMPLER8X8_VA = 0x9,
CM_ARGUMENT_SURFACE2D_SAMPLER = 0xb,
CM_ARGUMENT_SURFACE = 0xc,
CM_ARGUMENT_SURFACE2DUP_SAMPLER= 0xd,
CM_ARGUMENT_IMPLICT_LOCALSIZE = 0xe,
CM_ARGUMENT_IMPLICT_GROUPSIZE = 0xf,
CM_ARGUMENT_IMPLICIT_LOCALID = 0x10,
CM_ARGUMENT_STATE_BUFFER = 0x11,
CM_ARGUMENT_GENERAL_DEPVEC = 0x20,
CM_ARGUMENT_SURFACE2D_SCOREBOARD = 0x2A //used for SW scoreboarding
};
//*-----------------------------------------------------------------------------
//| HAL CM Kernel Argument Param
//*-----------------------------------------------------------------------------
struct CM_HAL_KERNEL_ARG_PARAM
{
CM_HAL_KERNEL_ARG_KIND kind; // [in] Kind of argument
uint32_t unitCount; // [in] 1 if argument is kernel arg, otherwise equal to thread count
uint32_t unitSize; // [in] Unit Size of the argument
uint32_t payloadOffset; // [in] Offset to Thread Payload
bool perThread; // [in] Per kernel / per thread argument
uint8_t *firstValue; // [in] Byte Pointer to First Value.
uint32_t nCustomValue; // [in] CM defined value for the special kind of argument
uint32_t aliasIndex; // [in] Alias index, used for CmSurface2D alias
bool aliasCreated; // [in] Whether or not alias was created for this argument
bool isNull; // [in] Whether this argument is a null surface
};
typedef CM_HAL_KERNEL_ARG_PARAM *PCM_HAL_KERNEL_ARG_PARAM;
//*-----------------------------------------------------------------------------
//| HAL CM Sampler BTI Entry
//*-----------------------------------------------------------------------------
struct CM_HAL_SAMPLER_BTI_ENTRY
{
uint32_t samplerIndex;
uint32_t samplerBTI;
};
typedef CM_HAL_SAMPLER_BTI_ENTRY *PCM_HAL_SAMPLER_BTI_ENTRY;
//*-----------------------------------------------------------------------------
//| HAL CM Sampler BTI Param
//*-----------------------------------------------------------------------------
struct CM_HAL_SAMPLER_BTI_PARAM
{
CM_HAL_SAMPLER_BTI_ENTRY samplerInfo[ CM_MAX_SAMPLER_TABLE_SIZE ];
uint32_t samplerCount;
};
typedef CM_HAL_SAMPLER_BTI_PARAM *PCM_HAL_SAMPLER_BTI_PARAM;
struct CM_HAL_CLONED_KERNEL_PARAM
{
bool isClonedKernel;
int32_t kernelID;
bool hasClones;
};
struct CM_GPGPU_WALKER_PARAMS
{
uint32_t interfaceDescriptorOffset : 5;
uint32_t gpgpuEnabled : 1;
uint32_t : 26;
uint32_t threadWidth;
uint32_t threadHeight;
uint32_t threadDepth;
uint32_t groupWidth;
uint32_t groupHeight;
uint32_t groupDepth;
};
typedef CM_GPGPU_WALKER_PARAMS *PCM_GPGPU_WALKER_PARAMS;
struct CM_SAMPLER_STATISTICS
{
uint32_t samplerCount[MAX_ELEMENT_TYPE_COUNT];
uint32_t samplerMultiplier[MAX_ELEMENT_TYPE_COUNT]; //used for distinguishing whether need to take two
uint32_t samplerIndexBase[MAX_ELEMENT_TYPE_COUNT];
};
//*-----------------------------------------------------------------------------
//| HAL CM Kernel Param
//*-----------------------------------------------------------------------------
struct CM_HAL_KERNEL_PARAM
{
CM_HAL_KERNEL_ARG_PARAM argParams[CM_MAX_ARGS_PER_KERNEL];
CM_SAMPLER_STATISTICS samplerStatistics; // [in] each sampler element type count in the kernel argument
uint8_t *kernelData; // [in] Pointer to Kernel data
uint32_t kernelDataSize; // [in] Size of Kernel Data
uint8_t *movInsData; // [in] pointer to move instruction data
uint32_t movInsDataSize; // [in] size of move instructions
uint8_t *kernelBinary; // [in] Execution code for the kernel
uint32_t kernelBinarySize; // [in] Size of Kernel Binary
uint32_t numThreads; // [in] Number of threads
uint32_t numArgs; // [in] Number of Kernel Args
bool perThreadArgExisted;
uint32_t numSurfaces; // [in] Number of Surfaces used in this kernel
uint32_t payloadSize; // [in] Kernel Payload Size
uint32_t totalCurbeSize; // [in] total CURBE size, GPGPU
uint32_t curbeOffset; // [in] curbe offset of kernel
uint32_t curbeSizePerThread; // [in] CURBE size per thread
uint32_t crossThreadConstDataLen; // [in] Cross-thread constant data length HSW+
uint32_t barrierMode; // [in] Barrier mode, 0-No barrier, 1-local barrier, 2-global barrier
uint32_t numberThreadsInGroup; // [in] Number of Threads in Thread Group
uint32_t slmSize; // [in] SLM size in 1K-Bytes or 4K-Bytes
uint32_t spillSize; // [in] Kernel spill area, obtained from JITTER
uint32_t cmFlags; // [in] Kernel flags
uint64_t kernelId; // [in] Kernel Id
CM_HAL_KERNEL_THREADSPACE_PARAM kernelThreadSpaceParam; // [in] ThreadSpace Information
CM_HAL_WALKER_PARAMS walkerParams; // [out] Media walker parameters for kernel:filled in HalCm_ParseTask
bool globalSurfaceUsed; // [in] Global surface used
uint32_t globalSurface[CM_MAX_GLOBAL_SURFACE_NUMBER]; // [in] Global Surface indexes
CM_GPGPU_WALKER_PARAMS gpgpuWalkerParams;
bool kernelDebugEnabled; // [in] kernel debug is enabled
CM_HAL_INDIRECT_DATA_PARAM indirectDataParam;
char kernelName[ CM_MAX_KERNEL_NAME_SIZE_IN_BYTE ]; // [in] A fixed size array to hold the kernel name
CM_HAL_SAMPLER_BTI_PARAM samplerBTIParam;
uint32_t localIdIndex; //local ID index has different location with different compiler version
CM_HAL_CLONED_KERNEL_PARAM clonedKernelParam;
CM_STATE_BUFFER_TYPE stateBufferType;
std::list<SamplerParam> *samplerHeap;
};
typedef CM_HAL_KERNEL_PARAM *PCM_HAL_KERNEL_PARAM;
//*----------------------
//| CM Set Type
//*----------------------
enum CM_SET_TYPE
{
CM_SET_MAX_HW_THREADS,
CM_SET_HW_L3_CONFIG
};
struct CM_HAL_MAX_SET_CAPS_PARAM
{
CM_SET_TYPE type;
union
{
uint32_t maxValue;
L3ConfigRegisterValues l3CacheValues;
};
};
typedef CM_HAL_MAX_SET_CAPS_PARAM *PCM_HAL_MAX_SET_CAPS_PARAM;
//------------------------------------------------------------------------------
//| CM Buffer Param
//------------------------------------------------------------------------------
typedef struct _CM_HAL_BUFFER_PARAM
{
size_t size; // [in] Buffer Size
CM_BUFFER_TYPE type; // [in] Buffer type: Buffer, UP, SVM
void *data; // [in/out] System address of this buffer
uint32_t handle; // [in/out] Handle
uint32_t lockFlag; // [in] Lock flag
PMOS_RESOURCE mosResource; // [in] Mos resource
bool isAllocatedbyCmrtUmd; // [in] Flag for Cmrt@umd Created Buffer
uint64_t gfxAddress; // [out] GFX address of this buffer
} CM_HAL_BUFFER_PARAM, *PCM_HAL_BUFFER_PARAM;
//------------------------------------------------------------------------------
//| CM Buffer Set Surface State Param
//------------------------------------------------------------------------------
typedef struct _CM_HAL_BUFFER_SURFACE_STATE_PARAM
{
size_t size; // [in] Surface State Size
uint32_t offset; // [in] Surface State Base Address Offset
uint16_t mocs; // [in] Surface State mocs settings
uint32_t aliasIndex; // [in] Surface Alias Index
uint32_t handle; // [in] Handle
} CM_HAL_BUFFER_SURFACE_STATE_PARAM, *PCM_HAL_BUFFER_SURFACE_STATE_PARAM;
//------------------------------------------------------------------------------
//| CM BB Args
//------------------------------------------------------------------------------
typedef struct _CM_HAL_BB_ARGS
{
uint64_t kernelIds[CM_MAX_KERNELS_PER_TASK];
uint64_t refCount;
bool latest;
} CM_HAL_BB_ARGS, *PCM_HAL_BB_ARGS;
//------------------------------------------------------------------------------
//| CM 2DUP Param
//------------------------------------------------------------------------------
typedef struct _CM_HAL_SURFACE2D_UP_PARAM
{
uint32_t width; // [in] Surface Width
uint32_t height; // [in] Surface Height
MOS_FORMAT format; // [in] Surface Format
void *data; // [in/out] Pointer to data
uint32_t pitch; // [out] Pitch
uint32_t physicalSize; // [out] Physical size
uint32_t handle; // [in/out] Handle
} CM_HAL_SURFACE2D_UP_PARAM, *PCM_HAL_SURFACE2D_UP_PARAM;
//------------------------------------------------------------------------------
//| CM 2D Get Surface Information Param
//------------------------------------------------------------------------------
typedef struct _CM_HAL_SURFACE2D_INFO_PARAM
{
uint32_t width; // [out] Surface Width
uint32_t height; // [out] Surface Height
MOS_FORMAT format; // [out] Surface Format
uint32_t pitch; // [out] Pitch
UMD_RESOURCE surfaceHandle ; // [in] Driver Handler
uint32_t surfaceAllocationIndex; // [in] KMD Driver Handler
} CM_HAL_SURFACE2D_INFO_PARAM, *PCM_HAL_SURFACE2D_INFO_PARAM;
//------------------------------------------------------------------------------
//| CM 2D Set Surface State Param
//------------------------------------------------------------------------------
typedef struct _CM_HAL_SURFACE2D_SURFACE_STATE_PARAM
{
uint32_t format;
uint32_t width;
uint32_t height;
uint32_t depth;
uint32_t pitch;
uint16_t memoryObjectControl;
uint32_t surfaceXOffset;
uint32_t surfaceYOffset;
uint32_t surfaceOffset;
} CM_HAL_SURFACE2D_SURFACE_STATE_PARAM, *PCM_HAL_SURFACE2D_SURFACE_STATE_PARAM;
//------------------------------------------------------------------------------
//| CM 2D Lock/Unlock Param
//------------------------------------------------------------------------------
typedef struct _CM_HAL_SURFACE2D_LOCK_UNLOCK_PARAM
{
uint32_t width; // [in] Surface Width
uint32_t height; // [in] Surface Height
uint32_t size; // [in] Surface total size
MOS_FORMAT format; // [in] Surface Format
void *data; // [in/out] Pointer to data
uint32_t pitch; // [out] Pitch
MOS_PLANE_OFFSET YSurfaceOffset; // [out] Y plane Offset
MOS_PLANE_OFFSET USurfaceOffset; // [out] U plane Offset
MOS_PLANE_OFFSET VSurfaceOffset; // [out] V plane Offset
uint32_t lockFlag; // [out] lock flag
uint32_t handle; // [in/out] Handle
bool useGmmOffset; // [in/out] Only use Gmm offset in Linux
} CM_HAL_SURFACE2D_LOCK_UNLOCK_PARAM, *PCM_HAL_SURFACE2D_LOCK_UNLOCK_PARAM;
//*-----------------------------------------------------------------------------
//| Compression state
//*-----------------------------------------------------------------------------
enum MEMCOMP_STATE
{
MEMCOMP_DISABLED = 0,
MEMCOMP_HORIZONTAL,
MEMCOMP_VERTICAL
};
//------------------------------------------------------------------------------
//| CM 2D Surface Compression Parameter
//------------------------------------------------------------------------------
typedef struct _CM_HAL_SURFACE2D_COMPRESSION_PARAM
{
uint32_t handle;
MEMCOMP_STATE mmcMode;
}CM_HAL_SURFACE2D_COMPRESSIOM_PARAM, *PCM_HAL_SURFACE2D_COMPRESSION_PARAM;
//------------------------------------------------------------------------------
//| CM 2D Param
//------------------------------------------------------------------------------
typedef struct _CM_HAL_SURFACE2D_PARAM
{
uint32_t isAllocatedbyCmrtUmd; // [in] Flag for Cmrt@umd Created Surface
PMOS_RESOURCE mosResource; // [in] Mos resource
uint32_t width; // [in] Surface Width
uint32_t height; // [in] Surface Height
MOS_FORMAT format; // [in] Surface Format
void *data; // [in] PData
uint32_t pitch; // [out] Pitch
uint32_t handle; // [in/out] Handle
} CM_HAL_SURFACE2D_PARAM, *PCM_HAL_SURFACE2D_PARAM;
//------------------------------------------------------------------------------
//| CM 3D Param
//------------------------------------------------------------------------------
typedef struct _CM_HAL_3DRESOURCE_PARAM
{
uint32_t height; // [in] Surface Height
uint32_t width; // [in] Surface Width
uint32_t depth; // [in] Surface Depth
MOS_FORMAT format;
void *data; // [in/out] Pointer to data
uint32_t handle; // [in/out] Handle
uint32_t lockFlag; // [in] Lock flag
uint32_t pitch; // [out] Pitch of Resource
uint32_t qpitch; // [out] QPitch of the Resource
bool qpitchEnabled; // [out] if QPitch is supported by hw
} CM_HAL_3DRESOURCE_PARAM, *PCM_HAL_3DRESOURCE_PARAM;
//------------------------------------------------------------------------------
//| HalCm Kernel Param
//------------------------------------------------------------------------------
typedef struct _CM_HAL_KERNEL_SETUP
{
RENDERHAL_KERNEL_PARAM renderParam;
MHW_KERNEL_PARAM cacheEntry;
} CM_HAL_KERNEL_SETUP, *PCM_HAL_KERNEL_SETUP;
//------------------------------------------------------------------------------
//| CM vebox settings
//------------------------------------------------------------------------------
typedef struct _CM_VEBOX_SETTINGS
{
bool diEnabled;
bool dndiFirstFrame;
bool iecpEnabled;
bool dnEnabled;
uint32_t diOutputFrames;
bool demosaicEnabled;
bool vignetteEnabled;
bool hotPixelFilterEnabled;
}CM_VEBOX_SETTINGS;
#define VEBOX_SURFACE_NUMBER (16) //MAX
#define CM_VEBOX_PARAM_PAGE_SIZE 0x1000
#define CM_VEBOX_PARAM_PAGE_NUM 5
typedef struct _CM_AVS_TABLE_STATE_PARAMS {
bool bypassXAF;
bool bypassYAF;
uint8_t defaultSharpLevel;
uint8_t maxDerivative4Pixels;
uint8_t maxDerivative8Pixels;
uint8_t transitionArea4Pixels;
uint8_t transitionArea8Pixels;
CM_AVS_COEFF_TABLE tbl0X[ NUM_POLYPHASE_TABLES ];
CM_AVS_COEFF_TABLE tbl0Y[ NUM_POLYPHASE_TABLES ];
CM_AVS_COEFF_TABLE tbl1X[ NUM_POLYPHASE_TABLES ];
CM_AVS_COEFF_TABLE tbl1Y[ NUM_POLYPHASE_TABLES ];
bool enableRgbAdaptive;
bool adaptiveFilterAllChannels;
} CM_AVS_TABLE_STATE_PARAMS, *PCM_AVS_TABLE_STATE_PARAMS;
typedef struct _CM_HAL_AVS_PARAM {
MHW_SAMPLER_STATE_AVS_PARAM avsState; // [in] avs state table.
CM_AVS_TABLE_STATE_PARAMS avsTable; // [in] avs table.
} CM_HAL_AVS_PARAM, *PCM_HAL_AVS_PARAM;
/*
* CONVOLVE STATE DATA STRUCTURES