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rend.s
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; generated by Norcroft ARM C vsn 4.91 (ARM Ltd SDT2.51) [Build number 130]
AREA |C$$code|, CODE, READONLY
|x$codeseg| DATA
rendercels
|L000000.J2.rendercels|
STMDB sp!,{a4-v2,lr}
LDR a1,[pc, #L000094-.-8]
BL resetlinebuf
LDR v2,[pc, #L000098-.-8]
LDR v1,[pc, #L00009c-.-8]
MOV a4,#1
STR v2,[v1,#0x10]
LDR a1,[v1,#8]
LDR a3,[pc, #L0000a4-.-8]
STR a1,[v1,#0xc]
STR a4,[sp,#0]
LDR a1,[pc, #L0000a8-.-8]
LDR a4,[pc, #L0000a0-.-8]
LDR a2,[a1,#0]
LDR a1,[pc, #L0000ac-.-8]
BL buildcellist
LDR a1,[v1,#0x10]
LDR a2,[pc, #L0000b0-.-8]
CMP a1,v2
LDRLS a1,[a2,#0]
LDRLS a2,[v1,#0x14]
STRLS a1,[a2,#4]
BLS |L000070.J6.rendercels|
LDR a3,[v1,#0x14]
SUB a1,a1,#0x44
STR a1,[a3,#4]
LDR a1,[a2,#0]
STR a1,[v2,#4]
|L000070.J6.rendercels|
LDR a1,[pc, #L0000b4-.-8]
LDR a1,[a1,#0]
LDR a1,[a1,#4]
LDR a2,[v1,#0x14]
BL DrawCels
MOV a1,#0
ADD sp,sp,#4
LDMIA sp!,{v1,v2,lr}
B sequencegun
L000094
DCD linebuf
L000098
DCD ccbpool
L00009c
DCD |x$dataseg|
L0000a0
DCD xfverts
L0000a4
DCD projverts
L0000a8
DCD nviso
L0000ac
DCD visobs
L0000b0
DCD guncel
L0000b4
DCD rprend
buildcellist
STMDB sp!,{a1-v8,lr}
SUB sp,sp,#0x3c
MOV v1,a1
SUB a1,a2,#1
MOV v2,a3
CMP a1,#0
STR a1,[sp,#0x40]
BLT |L000318.J49.buildcellist|
|L0000d8.J4.buildcellist|
LDR a1,[pc, #L000094-.-8]
BL islinefull
CMP a1,#0
BNE |L000318.J49.buildcellist|
LDR a2,[v1,#0]
LDR a1,[v1,#4]
CMP a2,#0
BGE |L000104.J9.buildcellist|
MOV a1,v1
BL renderobs
B |L000300.J11.buildcellist|
|L000104.J9.buildcellist|
LDR a3,[sp,#0x70]
CMP a3,#0
BEQ |L000124.J12.buildcellist|
LDR a3,[pc, #L000320-.-8]
MOV a2,a2,LSL #1
LDRSH a2,[a3,a2]
MOV a1,a1,LSL #1
LDRSH a1,[a3,a1]
|L000124.J12.buildcellist|
MOV v7,a2,LSL #1
ADD v8,v7,v7,LSL #1
ADD v4,v2,v8,LSL #2
MOV v5,a1,LSL #1
LDR a1,[v4,#8]
ADD v6,v5,v5,LSL #1
CMP a1,#0x30
ADD a1,v2,v6,LSL #2
STR a1,[sp,#0x38]
LDR a1,[a1,#8]
MOV v3,#0
MOVLT v3,#3
CMP a1,#0x30
ORRLT v3,v3,#0xc
CMP v3,#0xf
BEQ |L000300.J11.buildcellist|
CMP v3,#0
BNE |L0001a0.J20.buildcellist|
LDRB a1,[v1,#0xb]
LDR a3,[v2,v6,LSL #2]
LDR a2,[v2,v8,LSL #2]
TST a1,#1
LDR a1,[pc, #L000094-.-8]
BEQ |L000194.J22.buildcellist|
BL testmarklinebuf
CMP a1,#0
BEQ |L000300.J11.buildcellist|
B |L0001a0.J20.buildcellist|
|L000194.J22.buildcellist|
BL testlinebuf
CMP a1,#0
BEQ |L000300.J11.buildcellist|
|L0001a0.J20.buildcellist|
LDR a1,[v4,#8]
CMP a1,#0x1800
BGT |L000300.J11.buildcellist|
LDR a1,[v2,v8,LSL #2]
LDR v8,[pc, #L00009c-.-8]
STR a1,[sp,#8]
LDR a1,[v4,#4]
STR a1,[sp,#0xc]
LDR a1,[v4,#0xc]
STR a1,[sp,#0x10]
LDR a1,[v4,#0x10]
STR a1,[sp,#0x14]
LDR a1,[sp,#0x38]
LDR a1,[a1,#0xc]
STR a1,[sp,#0x18]
LDR a1,[sp,#0x38]
LDR a1,[a1,#0x10]
STR a1,[sp,#0x1c]
LDR a1,[v2,v6,LSL #2]
STR a1,[sp,#0x20]
LDR a1,[sp,#0x38]
LDR a1,[a1,#4]
STR a1,[sp,#0x24]
LDRB a1,[v1,#9]
LDR v6,[v8,#0x10]
ADD a2,a1,a1,LSL #1
LDR a1,[pc, #L000324-.-8]
LDR a1,[a1,#0]
ADD a1,a1,a2,LSL #2
MOV a2,v6
BL img2ccb
LDR a1,[v4,#8]
CMP a1,#0x800
BLE |L000244.J31.buildcellist|
MOV a2,#0x180000
SUB a1,a2,a1,LSL #8
MOV a2,#0x100000
BL DivSF16
MOV a2,a1
MOV a1,v6
BL fadecel
|L000244.J31.buildcellist|
CMP v3,#0
BEQ |L0002bc.J33.buildcellist|
ADD a3,v5,#1
STMIA sp,{a3,v5}
LDR a1,[sp,#0x48]
MOV a3,v7
ADD a4,v7,#1
ADD a2,sp,#0x28
BL mkVertPtrs
ADD a3,sp,#8
MOV a2,v3
ADD a1,sp,#0x28
BL zclip
MOV v3,a1
LDRB a1,[v1,#0xb]
LDR a2,[sp,#8]
LDR a3,[sp,#0x20]
TST a1,#1
LDR a1,[pc, #L000094-.-8]
BEQ |L0002a4.J35.buildcellist|
BL testmarklinebuf
CMP a1,#0
BEQ |L000300.J11.buildcellist|
B |L0002b0.J39.buildcellist|
|L0002a4.J35.buildcellist|
BL testlinebuf
CMP a1,#0
BEQ |L000300.J11.buildcellist|
|L0002b0.J39.buildcellist|
MOV a2,v3
MOV a1,v6
BL zClipCCB
|L0002bc.J33.buildcellist|
ADD a2,sp,#8
MOV a1,v6
BL FasterMapCel
LDR a1,[v1,#0xc]
CMP a1,#0
BEQ |L0002e8.J42.buildcellist|
ADD a1,a1,#7
LDRB a2,[a1,#0]
LDRB a3,[v1,#0xa]
ORR a2,a2,a3,LSL #4
STRB a2,[a1,#0]
|L0002e8.J42.buildcellist|
LDR a1,[v6,#0]
BIC a1,a1,#0x40000000
STR a1,[v6,#0]
LDR a1,[v8,#0x10]
ADD a1,a1,#0x44
STR a1,[v8,#0x10]
|L000300.J11.buildcellist|
LDR a1,[sp,#0x40]
ADD v1,v1,#0x10
SUB a1,a1,#1
STR a1,[sp,#0x40]
CMP a1,#0
BGE |L0000d8.J4.buildcellist|
|L000318.J49.buildcellist|
ADD sp,sp,#0x4c
LDMIA sp!,{v1-v8,pc}
L000320
DCD grididxs
L000324
DCD wallimgs
img2ccb
LDR a3,[a1,#0]
LDR a4,[a3,#0]
STR a4,[a2,#0]
LDR a4,[a3,#4]
STR a4,[a2,#0x34]
LDR a4,[a3,#8]
STR a4,[a2,#0x38]
LDR a4,[a3,#0xc]
STR a4,[a2,#0x3c]
LDR a4,[a3,#0x10]
STR a4,[a2,#0x40]
LDR a3,[a3,#0x14]
STR a3,[a2,#8]
LDR a3,[a1,#4]
STR a3,[a2,#0xc]
LDR a1,[a1,#8]
STR a1,[a2,#0x30]
MOV pc,lr
cyclewalls
MOV a3,a1
LDR a1,[pc, #L00009c-.-8]
LDMIA a1,{a1,a2}
B cycleanimloafs
initwallanim
STR lr,[sp,#-4]!
LDR a2,[pc, #L0003a8-.-8]
BL createanimloafs
LDR a2,[pc, #L00009c-.-8]
CMP a1,#0
STR a1,[a2,#4]
ADDLT a1,pc,#L0003ac-.-8
LDRLT lr,[sp],#4
BLT die
LDR pc,[sp],#4
L0003a8
DCD wallanims
L0003ac
DCB "Can\'"
DCB "t al"
DCB "loca"
DCB "te A"
DCB "nimL"
DCB "oaf "
DCB "tabl"
DCB "e.\n\0"
closewallanim
STMDB sp!,{v1,lr}
LDR v1,[pc, #L00009c-.-8]
LDR a1,[v1,#0]
CMP a1,#0
LDMEQIA sp!,{v1,pc}
BL deleteanimloafs
MOV a1,#0
STR a1,[v1,#0]
LDMIA sp!,{v1,pc}
cycleanimloafs
STMDB sp!,{v1-v4,lr}
MOV v1,a1
MOV v2,a3
SUB v4,a2,#1
CMP v4,#0
LDMLTIA sp!,{v1-v4,pc}
|L000408.J4.cycleanimloafs|
LDR a2,[v1,#0xc]
LDR v3,[v1,#8]
MOV a3,v2
MOV a1,v1
BL nextanimframe
LDR a2,[v3,#8]
CMP a2,a1
BGT |L000434.J8.cycleanimloafs|
|L000428.J7.cycleanimloafs|
SUB a1,a1,a2
CMP a2,a1
BLE |L000428.J7.cycleanimloafs|
|L000434.J8.cycleanimloafs|
STR a1,[v1,#0xc]
LDR a3,[v3,#0]
ADD a1,a1,a1,LSL #1
ADD a1,a3,a1,LSL #2
LDR a2,[v3,#4]
LDMIA a1,{a3,a4,v3}
STMIA a2,{a3,a4,v3}
SUB v4,v4,#1
CMP v4,#0
ADD v1,v1,#0x10
BGE |L000408.J4.cycleanimloafs|
LDMIA sp!,{v1-v4,pc}
createanimloafs
STMDB sp!,{v1-v4,lr}
LDR v1,[a1,#0x18]
MOV v3,a1
MOV v2,a2
CMP v1,#0
MOV v4,#0
STREQ v4,[v2,#0]
BEQ |L0004d8.J12.createanimloafs|
MOV a1,v1,LSL #4
BL malloc
CMP a1,#0
MVNEQ a1,#0
LDMEQIA sp!,{v1-v4,pc}
MOV a2,#0
CMP v1,#0
LDR a3,[v3,#4]
BLE |L0004d4.J9.createanimloafs|
MOV a4,#0x3c
|L0004ac.J8.createanimloafs|
LDR ip,[a3,#0xc]
STR ip,[a1,a2,LSL #4]
ADD ip,a1,a2,LSL #4
ADD ip,ip,#8
STMIA ip,{a3,v4}
ADD a2,a2,#1
CMP a2,v1
STR a4,[ip,#-4]
ADD a3,a3,#0x10
BLT |L0004ac.J8.createanimloafs|
|L0004d4.J9.createanimloafs|
STR a1,[v2,#0]
|L0004d8.J12.createanimloafs|
MOV a1,v1
LDMIA sp!,{v1-v4,pc}
deleteanimloafs
B free
processgrid
STMDB sp!,{v1-v8,lr}
SUB sp,sp,#0x18
LDR ip,[pc, #L00066c-.-8]
LDR a2,[pc, #L000670-.-8]
LDR a1,[ip,#0]
LDR lr,[pc, #L0000a0-.-8]
MOV a1,a1,LSL #5
STR a1,[sp,#0xc]
LDR a1,[ip,#8]
LDR v5,[pc, #L00067c-.-8]
MOV a1,a1,LSL #5
STR a1,[sp,#0x10]
LDR a1,[a2,#0]
LDR v8,[pc, #L000680-.-8]
ADD a4,a1,a1,LSL #6
LDR a1,[pc, #L000674-.-8]
MOV v2,#0x84
LDR a3,[a1,#0]
ADD v6,a4,a3
STR v6,[sp,#0x14]
LDR a2,[a2,#8]
LDR a1,[a1,#8]
ADD a2,a2,a2,LSL #6
ADD v3,a2,a1
LDR a1,[pc, #L000678-.-8]
LDR a4,[pc, #L000320-.-8]
LDMIA a1,{a2,v4}
LDR a1,[a1,#8]
MOV a3,#0
|L000558.J4.processgrid|
LDR ip,[v5],#4
CMP ip,#0
MOVNE v1,#0x1f
BNE |L00059c.J12.processgrid|
LDR ip,[sp,#0xc]
ADD a3,a3,#0x20
ADD a2,a2,ip
LDR ip,[sp,#0x10]
CMP a3,#0x41
ADD a4,a4,#0x40
ADD a1,a1,ip
BLT |L000614.J11.processgrid|
LDR v6,[sp,#0x14]
ADD a1,a1,v3
SUB a3,a3,#0x41
ADD a2,a2,v6
B |L000614.J11.processgrid|
|L00059c.J12.processgrid|
TST ip,#1
BEQ |L0005d0.J15.processgrid|
STR a1,[lr,#8]
STMIA lr,{a2,v4}
ADD v6,lr,#0xc
STR a1,[v6,#8]
SUB lr,v4,#0x10000
STMIA v6,{a2,lr}
ADD lr,v6,#0xc
LDR v6,[v8,#0]
ADD v7,v6,#1
STR v7,[v8,#0]
STRH v6,[a4,#0]
|L0005d0.J15.processgrid|
LDR v7,[pc, #L00066c-.-8]
ADD a3,a3,#1
LDR v6,[v7,#0]
CMP a3,#0x41
ADD a2,a2,v6
LDR v6,[v7,#8]
ADD a1,a1,v6
BLT |L000600.J17.processgrid|
LDR v6,[sp,#0x14]
ADD a1,a1,v3
SUB a3,a3,#0x41
ADD a2,a2,v6
|L000600.J17.processgrid|
MOV ip,ip,LSR #1
SUB v1,v1,#1
CMP v1,#0
ADD a4,a4,#2
BGE |L00059c.J12.processgrid|
|L000614.J11.processgrid|
SUB v2,v2,#1
CMP v2,#0
BGE |L000558.J4.processgrid|
LDR a2,[v8,#0]
MOV v1,v8
SUBS ip,a2,#0x270
CMPGE ip,#1
ADDGE a1,pc,#L000684-.-8
BLGE kprintf
LDR a1,[v1,#0]
MOV a2,#0xa0
MOV a4,a1,LSL #1
LDR a1,[pc, #L0006a8-.-8]
LDR a3,[a1,#0]
STMIA sp,{a2-a4}
MOV a4,#0
MOV a3,#0x140
LDR a2,[pc, #L0000a4-.-8]
LDR a1,[pc, #L0000a0-.-8]
BL project
ADD sp,sp,#0x18
LDMIA sp!,{v1-v8,pc}
L00066c
DCD plusx
L000670
DCD minusx
L000674
DCD plusz
L000678
DCD xformsquare
L00067c
DCD vertsused
L000680
DCD nvisv
L000684
DCB "EEEK"
DCB "! x"
DCB "fver"
DCB "ts[]"
DCB " ove"
DCB "rflo"
DCB "w at"
DCB " %d\n"
DCB "\0\0\0\0"
L0006a8
DCD cy
processvisobs
STMDB sp!,{v1-v5,lr}
SUB sp,sp,#0x18
LDR v4,[pc, #L0007b0-.-8]
LDR a1,[pc, #L0007b4-.-8]
LDR v5,[pc, #L0007b8-.-8]
STR v4,[a1,#0]
MOV a1,#0
LDR v3,[pc, #L0000a8-.-8]
STR a1,[v5,#0]
LDR a1,[v3,#0]
LDR v1,[pc, #L0000ac-.-8]
SUB v2,a1,#1
CMP v2,#0
BLT |L000704.J5.processvisobs|
|L0006e4.J4.processvisobs|
LDR a1,[v1,#0]
CMP a1,#0
MOVLT a1,v1
BLLT registerobs
SUB v2,v2,#1
CMP v2,#0
ADD v1,v1,#0x10
BGE |L0006e4.J4.processvisobs|
|L000704.J5.processvisobs|
LDR a2,[v3,#0]
CMP a2,#0x384
ADDGT a1,pc,#L0007bc-.-8
BLGT kprintf
LDR a2,[v5,#0]
CMP a2,#0x100
ADDGT a1,pc,#L0007dc-.-8
BLGT kprintf
LDR a3,[v5,#0]
MOV v1,v5
CMP a3,#0
BEQ |L0007a8.J20.processvisobs|
LDR a1,[pc, #L000800-.-8]
LDR a2,[a1,#0]
RSB a2,a2,#0
STR a2,[sp,#0xc]
LDR a2,[a1,#4]
RSB a2,a2,#0
STR a2,[sp,#0x10]
LDR a1,[a1,#8]
MOV a2,v4
RSB a1,a1,#0
STR a1,[sp,#0x14]
ADD a1,sp,#0xc
BL translatemany
LDR lr,[pc, #L000808-.-8]
LDR a4,[v1,#0]
LDR a3,[pc, #L000804-.-8]
MOV a2,v4
MOV a1,lr
SWI 0x50002
LDR a4,[v1,#0]
MOV a2,#0xa0
LDR a1,[pc, #L0006a8-.-8]
LDR a3,[a1,#0]
STMIA sp,{a2-a4}
MOV a4,#0
MOV a3,#0x140
MOV a2,v4
MOV a1,lr
BL project
|L0007a8.J20.processvisobs|
ADD sp,sp,#0x18
LDMIA sp!,{v1-v5,pc}
L0007b0
DCD obverts
L0007b4
DCD curobv
L0007b8
DCD nobverts
L0007bc
DCB "EEEK"
DCB "! v"
DCB "isob"
DCB "s[] "
DCB "over"
DCB "flow"
DCB " at "
DCB "%d\n\0"
L0007dc
DCB "EEEK"
DCB "! o"
DCB "bver"
DCB "ts[]"
DCB " ove"
DCB "rflo"
DCB "w! a"
DCB "t %d"
DCB "\n\0\0\0"
L000800
DCD campos
L000804
DCD camera
L000808
DCD xfobverts
initrend
STR lr,[sp,#-4]!
LDR a1,[pc, #L000098-.-8]
MOV a2,#0x83
ADD a2,a2,#0x300
|L00081c.J4.initrend|
SUB a3,a1,#0x44
STR a3,[a1,#4]!
SUB a2,a2,#1
CMP a2,#0
ADD a1,a1,#0x40
BGE |L00081c.J4.initrend|
MOV a2,#0x40000
MOV a1,#0x400
BL malloctype
LDR a2,[pc, #L00009c-.-8]
CMP a1,#0
STR a1,[a2,#8]
ADDEQ a1,pc,#L00085c-.-8
BLEQ die
LDR lr,[sp],#4
B createbackwall
L00085c
DCB "Can\'"
DCB "t al"
DCB "loca"
DCB "te m"
DCB "emor"
DCB "y fo"
DCB "r sc"
DCB "aled"
DCB " PLU"
DCB "Ts.\n"
DCB "\0\0\0\0"
closerend
STMDB sp!,{v1,v2,lr}
LDR v1,[pc, #L00009c-.-8]
MOV v2,#0
LDR a1,[v1,#8]
CMP a1,#0
BEQ |L0008a8.J4.closerend|
BL freetype
STR v2,[v1,#8]
|L0008a8.J4.closerend|
LDR a1,[v1,#0x14]
CMP a1,#0
LDMEQIA sp!,{v1,v2,pc}
BL freetype
STR v2,[v1,#0x14]
LDMIA sp!,{v1,v2,pc}
loadskull
STMDB sp!,{v1,v2,lr}
ADD a1,pc,#L00098c-.-8
BL parse3DO
LDR v2,[pc, #L00009c-.-8]
CMP a1,#0
STR a1,[v2,#0x98]
ADDEQ a1,pc,#L000998-.-8
BLEQ die
MOV a2,#0x100
ADD a2,a2,#0x40000
MOV a1,#0x44
BL malloctype
STR a1,[v2,#0x9c]
CMP a1,#0
ADDEQ a1,pc,#L0009b4-.-8
BLEQ die
LDR a1,[v2,#0x98]
LDR a2,[pc, #L0009d0-.-8]
LDR v1,[a1,#0x10]
LDR a2,[a2,#0]
LDR a1,[v1,#0]
MOV a3,#0x44
ORR a1,a1,a2
ORR a1,a1,#0x64000000
ORR a1,a1,#0x3240000
STR a1,[v1,#0]
LDR a1,[v1,#0]
MOV a2,v1
BIC a1,a1,#0x30000
STR a1,[v1,#0]
LDR a1,[v2,#0x9c]
BL _memcpy
LDR a1,[v2,#0x9c]
LDR a3,[pc, #L0009d4-.-8]
LDR a2,[a1,#0]
BIC a2,a2,#0x40000000
STR a2,[a1,#0]
LDR a1,[v2,#0x9c]
LDR a2,[pc, #L0009d8-.-8]
STR v1,[a1,#4]
MOV a1,#0xf
|L000964.J8.loadskull|
LDR a4,[a2,a1,LSL #2]
ORR a4,a4,a4,LSL #16
STR a4,[a2,a1,LSL #2]
LDR a4,[a3,a1,LSL #2]
ORR a4,a4,a4,LSL #16
STR a4,[a3,a1,LSL #2]
SUB a1,a1,#1
CMP a1,#0
BGE |L000964.J8.loadskull|
LDMIA sp!,{v1,v2,pc}
L00098c
DCB "skul"
DCB "l.ce"
DCB "l\0\0\0"
L000998
DCB "Coul"
DCB "dn\'t"
DCB " loa"
DCB "d sk"
DCB "ull "
DCB "imag"
DCB "e.\n\0"
L0009b4
DCB "Coul"
DCB "dn\'t"
DCB " cre"
DCB "ate "
DCB "fade"
DCB "r CC"
DCB "B.\n\0"
L0009d0
DCD ccbextra
L0009d4
DCD celPPMPs
L0009d8
DCD fadePPMPs
freeskull
STMDB sp!,{v1,v2,lr}
LDR v1,[pc, #L00009c-.-8]
LDR a1,[v1,#0x9c]
BL freetype
MOV v2,#0
STR v2,[v1,#0x9c]
LDR a1,[v1,#0x98]
BL freecelarray
STR v2,[v1,#0x98]
LDMIA sp!,{v1,v2,pc}
simpledeath
STMDB sp!,{v1-v8,lr}
SUB sp,sp,#0x20
MOV a1,#1
BL stopspoolsound
LDR v4,[pc, #L00009c-.-8]
LDR v8,[pc, #L000bb8-.-8]
LDR a1,[v4,#0x98]
LDR v2,[pc, #L0000b4-.-8]
LDR v3,[a1,#0x10]
MOV a1,#1
LDR v7,[v3,#0x3c]
LDR v6,[v3,#0x40]
CMP v7,#0
RSBLE a2,v7,#0
MOVLE v7,a1,LSL a2
CMP v6,#0
RSBLE a2,v6,#0
MOVLE v6,a1,LSL a2
MOV v5,#1
MOV v1,#0
|L000a54.J10.simpledeath|
ADD a1,v1,v1,LSL #1
CMP a1,#0
ADDLT a1,a1,#3
MOV a1,a1,ASR #2
ADD a2,a1,#0x20
MUL a1,v7,a2
LDR a3,[pc, #L000bbc-.-8]
MOV a1,a1,ASR #6
LDR a3,[a3,#0]
MUL a2,v6,a2
SUB a4,a3,a1
ADD a1,a3,a1
MOV a1,a1,ASR #1
MOV a4,a4,ASR #1
STR a4,[sp,#0x18]
STR a4,[sp,#0]
STR a1,[sp,#0x10]
STR a1,[sp,#8]
LDR a1,[v8,#0]
MOV a2,a2,ASR #6
SUB a3,a1,a2
ADD a1,a1,a2
MOV a1,a1,ASR #1
MOV a3,a3,ASR #1
STR a1,[sp,#0x1c]
STR a1,[sp,#0x14]
MOV a1,v3
STR a3,[sp,#0xc]
STR a3,[sp,#4]
MOV a2,sp
BL FasterMapCel
MOV a2,sp
LDR a1,[v4,#0x9c]
BL FasterMapCel
MOV a1,v1,ASR #3
CMP a1,#0xf
LDR a2,[pc, #L0009d4-.-8]
MOVGT a1,#0xf
LDR a2,[a2,a1,LSL #2]
RSB a1,a1,#0xf
STR a2,[v3,#0x30]
LDR a2,[pc, #L0009d8-.-8]
LDR a1,[a2,a1,LSL #2]
LDR a2,[v4,#0x9c]
STR a1,[a2,#0x30]
LDR a1,[v2,#0]
BL clearscreen
LDR a1,[v2,#0]
LDR a1,[a1,#4]
LDR a2,[v4,#0x14]
BL DrawCels
LDR a1,[v2,#0]
LDR a1,[a1,#4]
LDR a2,[v4,#0x9c]
BL DrawCels
LDR a3,[pc, #L000bc0-.-8]
LDR a1,[v2,#0]
LDR a2,[a3,#0]
STR a1,[a3,#0]
STR a2,[v2,#0]
LDR a1,[a1,#0]
MOV a2,#0
BL DisplayScreen
CMP v5,#0
BEQ |L000b74.J17.simpledeath|
BL issoundspooling
CMP a1,#0
BNE |L000b74.J17.simpledeath|
MOV v5,#0
ADD a1,pc,#L000bc4-.-8
MOV a2,#1
BL spoolsound
|L000b74.J17.simpledeath|
LDR a1,[pc, #L000be4-.-8]
MOV a2,#1
LDR a1,[a1,#0]
BL WaitVBL
ADD v1,v1,#1
CMP v1,#0x80
BLT |L000a54.J10.simpledeath|
LDR a1,[pc, #L000be4-.-8]
MOV a2,#0x3c
LDR a1,[a1,#0]
BL WaitVBL
LDR a3,[pc, #L000bc0-.-8]
MOV a2,#0x1e
LDR a1,[a3,#0]
BL fadetoblank
ADD sp,sp,#0x20
LDMIA sp!,{v1-v8,pc}
L000bb8
DCD high
L000bbc
DCD wide
L000bc0
DCD rpvis
L000bc4
DCB "$pro"
DCB "gdir"
DCB "/aif"
DCB "f/La"
DCB "ughS"
DCB "tati"
DCB "c.ai"
DCB "ff\0\0"
L000be4
DCD vblIO
testlinebuf
|L000be8.J2.testlinebuf|
STMDB sp!,{v1,v2,lr}
MOV lr,#0
CMP a2,a3
BEQ |L000ca8.J29.testlinebuf|
SUB a4,a3,#1
CMP a2,a4
EORGT a2,a2,a4
EORGT a4,a4,a2
EORGT a2,a2,a4
CMP a2,#0x140
BGE |L000ca8.J29.testlinebuf|
CMP a4,#0
BLT |L000ca8.J29.testlinebuf|
CMP a2,#0
MOVLT a2,#0
CMP a4,#0x140
AND ip,a2,#0x1f
LDR a3,[pc, #L000cb0-.-8]
MOVGE a4,#0x140
AND v1,a4,#0x1f
LDR a3,[a3,ip,LSL #2]
LDR ip,[pc, #L000cb4-.-8]
MOV a4,a4,ASR #5
MOV a2,a2,ASR #5
CMP a2,a4
LDR ip,[ip,v1,LSL #2]
BNE |L000c68.J16.testlinebuf|
LDR a1,[a1,a2,LSL #2]
AND a3,a3,ip
ANDS a1,a1,a3
MOVNE a1,#1
LDMIA sp!,{v1,v2,pc}
|L000c68.J16.testlinebuf|
LDR v1,[a1,a2,LSL #2]
TST v1,a3
MVNEQ a3,#0
MOV v1,#1
BEQ |L000c80.J24.testlinebuf|
B |L000c98.J28.testlinebuf|
|L000c80.J24.testlinebuf|
ADD a2,a2,#1
CMP a2,a4
LDR v2,[a1,a2,LSL #2]
MOVEQ a3,ip
TST v2,a3
BEQ |L000ca0.J27.testlinebuf|
|L000c98.J28.testlinebuf|
MOV a1,v1
LDMIA sp!,{v1,v2,pc}
|L000ca0.J27.testlinebuf|
CMP a2,a4
BLT |L000c80.J24.testlinebuf|
|L000ca8.J29.testlinebuf|
MOV a1,lr
LDMIA sp!,{v1,v2,pc}
L000cb0
DCD |x$dataseg|+0xa0
L000cb4
DCD |x$dataseg|+0x120
fadecel
STMDB sp!,{v1-v3,lr}
LDR a3,[a1,#0]
TST a3,#0x400000
LDREQ a3,[a1,#8]
LDREQ a3,[a3,#0]
LDRNE a3,[a1,#0x34]
AND a4,a3,#7
CMP a4,#5
TSTEQ a3,#0x10
BNE |L000d40.J7.fadecel|
LDR v2,[pc, #L00009c-.-8]
LDR a4,[a1,#0xc]
LDR a3,[v2,#0xc]
MOV v3,#0x1f
STR a3,[a1,#0xc]
MOV a1,#0x1f
|L000cf8.J10.fadecel|
LDRSH v1,[a4],#2
SUB a1,a1,#1
AND lr,v3,v1,ASR #10
AND ip,v3,v1,ASR #5
AND v1,v1,#0x1f
MUL v1,a2,v1
MUL ip,a2,ip
MUL lr,a2,lr
MOV ip,ip,ASR #16
MOV v1,v1,ASR #16
ORR ip,v1,ip,LSL #5
MOV lr,lr,ASR #16
ORR ip,ip,lr,LSL #10
STRH ip,[a3],#2
CMP a1,#0
BGE |L000cf8.J10.fadecel|
STR a3,[v2,#0xc]
LDMIA sp!,{v1-v3,pc}
|L000d40.J7.fadecel|
LDR a4,[a1,#0x30]
MOV a3,#0x1c00
AND lr,a4,#0x1c00
MUL lr,a2,lr
AND ip,a3,a4,LSR #16
MUL ip,a2,ip
AND a2,a3,ip,ASR #16
AND lr,a3,lr,ASR #16
BIC a3,a4,#0x1c000000
BIC a3,a3,#0x1c00
ORR a2,lr,a2,LSL #16
ORR a2,a3,a2
STR a2,[a1,#0x30]
LDMIA sp!,{v1-v3,pc}
createbackwall
|L000d78.J2.createbackwall|
STMDB sp!,{v1-v8,lr}
SUB sp,sp,#0xc
LDR v2,[pc, #L000ffc-.-8]
LDR v4,[pc, #L0006a8-.-8]
LDR a1,[v2,#0]
CMP a1,#0
BNE |L000dc0.J4.createbackwall|
MOV a4,#4
MOV a2,#0xa0
LDR a3,[v4,#0]