From bb4c4f7f9fd26705e75a2089d8ceb21f9c363708 Mon Sep 17 00:00:00 2001 From: FabKlein Date: Tue, 30 May 2023 15:46:20 +0100 Subject: [PATCH] CM4/CM7/CM33 MPS2+ build support added --- platform/cmsis/README.md | 16 +- .../RTE/Device/CMSDK_CM4_FP/RTE_Device.h | 50 ++ .../CMSDK_CM4_FP/RTE_Device.h.base@1.0.0 | 50 ++ .../cmsis/RTE/Device/CMSDK_CM4_FP/ac6_arm.sct | 87 +++ .../CMSDK_CM4_FP/ac6_arm.sct.base@1.0.0 | 76 +++ .../Device/CMSDK_CM4_FP/startup_CMSDK_CM4.c | 423 ++++++++++++ .../startup_CMSDK_CM4.c.base@1.1.0 | 423 ++++++++++++ .../Device/CMSDK_CM4_FP/system_CMSDK_CM4.c | 85 +++ .../system_CMSDK_CM4.c.base@1.1.0 | 85 +++ .../RTE/Device/CMSDK_CM7_SP/RTE_Device.h | 50 ++ .../CMSDK_CM7_SP/RTE_Device.h.base@1.0.0 | 50 ++ .../cmsis/RTE/Device/CMSDK_CM7_SP/ac6_arm.sct | 87 +++ .../CMSDK_CM7_SP/ac6_arm.sct.base@1.0.0 | 76 +++ .../Device/CMSDK_CM7_SP/startup_CMSDK_CM7.c | 425 ++++++++++++ .../startup_CMSDK_CM7.c.base@1.1.0 | 425 ++++++++++++ .../Device/CMSDK_CM7_SP/system_CMSDK_CM7.c | 87 +++ .../system_CMSDK_CM7.c.base@1.1.0 | 87 +++ .../RTE/Device/IOTKit_CM33_FP/RTE_Device.h | 50 ++ .../IOTKit_CM33_FP/RTE_Device.h.base@1.0.0 | 50 ++ .../RTE/Device/IOTKit_CM33_FP/ac6_arm.sct | 119 ++++ .../IOTKit_CM33_FP/ac6_arm.sct.base@1.0.0 | 119 ++++ .../IOTKit_CM33_FP/partition_IOTKit_CM33.h | 637 ++++++++++++++++++ .../partition_IOTKit_CM33.h.base@1.0.0 | 637 ++++++++++++++++++ .../IOTKit_CM33_FP/startup_IOTKit_CM33.c | 513 ++++++++++++++ .../startup_IOTKit_CM33.c.base@1.2.0 | 513 ++++++++++++++ .../IOTKit_CM33_FP/system_IOTKit_CM33.c | 149 ++++ .../system_IOTKit_CM33.c.base@1.2.0 | 149 ++++ platform/cmsis/audiomark.cbuild-idx.yml | 70 -- platform/cmsis/audiomark.csolution.yml | 17 + ...diomark_app.Release+MPS2-CMSDK_CM4_FP.cprj | 88 +++ ...diomark_app.Release+MPS2-CMSDK_CM7_SP.cprj | 88 +++ ...udiomark_app.Release+MPS2-IOTKit-CM33.cprj | 89 +++ ...diomark_app.Release+MPS3-Corstone-300.cprj | 2 +- ...diomark_app.Release+MPS3-Corstone-310.cprj | 2 +- ...udiomark_app.Release+VHT-Corstone-300.cprj | 2 +- ...udiomark_app.Release+VHT-Corstone-310.cprj | 2 +- .../cmsis/audiomark_app.Release+VHT_M85.cprj | 2 +- platform/cmsis/audiomark_app.cproject.yml | 9 +- platform/cmsis/boot.clayer.yml | 24 +- platform/cmsis/printf_mps3.clayer.yml | 12 - platform/cmsis/printf_mpsx.clayer.yml | 35 + .../testabf.Release+MPS2-CMSDK_CM4_FP.cprj | 90 +++ .../testabf.Release+MPS2-CMSDK_CM7_SP.cprj | 90 +++ .../testabf.Release+MPS2-IOTKit-CM33.cprj | 91 +++ .../testabf.Release+MPS3-Corstone-300.cprj | 2 +- ...stabf.Release+MPS3-Corstone-310.cbuild.yml | 499 -------------- .../testabf.Release+MPS3-Corstone-310.cprj | 9 +- .../testabf.Release+VHT-Corstone-300.cprj | 2 +- .../testabf.Release+VHT-Corstone-310.cprj | 2 +- platform/cmsis/testabf.Release+VHT_M85.cprj | 2 +- platform/cmsis/testabf.cproject.yml | 8 +- .../testaec.Release+MPS2-CMSDK_CM4_FP.cprj | 90 +++ .../testaec.Release+MPS2-CMSDK_CM7_SP.cprj | 90 +++ .../testaec.Release+MPS2-IOTKit-CM33.cprj | 91 +++ .../testaec.Release+MPS3-Corstone-300.cprj | 2 +- ...staec.Release+MPS3-Corstone-310.cbuild.yml | 499 -------------- .../testaec.Release+MPS3-Corstone-310.cprj | 9 +- .../testaec.Release+VHT-Corstone-300.cprj | 2 +- .../testaec.Release+VHT-Corstone-310.cprj | 2 +- platform/cmsis/testaec.Release+VHT_M85.cprj | 2 +- platform/cmsis/testaec.cproject.yml | 8 +- .../testanr.Release+MPS2-CMSDK_CM4_FP.cprj | 91 +++ .../testanr.Release+MPS2-CMSDK_CM7_SP.cprj | 91 +++ .../testanr.Release+MPS2-IOTKit-CM33.cprj | 92 +++ .../testanr.Release+MPS3-Corstone-300.cprj | 2 +- ...stanr.Release+MPS3-Corstone-310.cbuild.yml | 501 -------------- .../testanr.Release+MPS3-Corstone-310.cprj | 9 +- .../testanr.Release+VHT-Corstone-300.cprj | 2 +- .../testanr.Release+VHT-Corstone-310.cprj | 2 +- platform/cmsis/testanr.Release+VHT_M85.cprj | 2 +- platform/cmsis/testanr.cproject.yml | 8 +- .../testkws.Release+MPS2-CMSDK_CM4_FP.cprj | 91 +++ .../testkws.Release+MPS2-CMSDK_CM7_SP.cprj | 91 +++ .../testkws.Release+MPS2-IOTKit-CM33.cprj | 92 +++ .../testkws.Release+MPS3-Corstone-300.cprj | 2 +- ...stkws.Release+MPS3-Corstone-310.cbuild.yml | 502 -------------- .../testkws.Release+MPS3-Corstone-310.cprj | 9 +- .../testkws.Release+VHT-Corstone-300.cprj | 2 +- .../testkws.Release+VHT-Corstone-310.cprj | 2 +- platform/cmsis/testkws.Release+VHT_M85.cprj | 2 +- platform/cmsis/testkws.cproject.yml | 8 +- .../testmfcc.Release+MPS2-CMSDK_CM4_FP.cprj | 88 +++ .../testmfcc.Release+MPS2-CMSDK_CM7_SP.cprj | 88 +++ .../testmfcc.Release+MPS2-IOTKit-CM33.cprj | 89 +++ .../testmfcc.Release+MPS3-Corstone-300.cprj | 2 +- ...tmfcc.Release+MPS3-Corstone-310.cbuild.yml | 496 -------------- .../testmfcc.Release+MPS3-Corstone-310.cprj | 9 +- .../testmfcc.Release+VHT-Corstone-300.cprj | 2 +- .../testmfcc.Release+VHT-Corstone-310.cprj | 2 +- platform/cmsis/testmfcc.Release+VHT_M85.cprj | 2 +- platform/cmsis/testmfcc.cproject.yml | 8 +- 91 files changed, 7291 insertions(+), 2646 deletions(-) create mode 100755 platform/cmsis/RTE/Device/CMSDK_CM4_FP/RTE_Device.h create mode 100644 platform/cmsis/RTE/Device/CMSDK_CM4_FP/RTE_Device.h.base@1.0.0 create mode 100755 platform/cmsis/RTE/Device/CMSDK_CM4_FP/ac6_arm.sct create mode 100644 platform/cmsis/RTE/Device/CMSDK_CM4_FP/ac6_arm.sct.base@1.0.0 create mode 100755 platform/cmsis/RTE/Device/CMSDK_CM4_FP/startup_CMSDK_CM4.c create mode 100644 platform/cmsis/RTE/Device/CMSDK_CM4_FP/startup_CMSDK_CM4.c.base@1.1.0 create mode 100755 platform/cmsis/RTE/Device/CMSDK_CM4_FP/system_CMSDK_CM4.c create mode 100644 platform/cmsis/RTE/Device/CMSDK_CM4_FP/system_CMSDK_CM4.c.base@1.1.0 create mode 100755 platform/cmsis/RTE/Device/CMSDK_CM7_SP/RTE_Device.h create mode 100644 platform/cmsis/RTE/Device/CMSDK_CM7_SP/RTE_Device.h.base@1.0.0 create mode 100755 platform/cmsis/RTE/Device/CMSDK_CM7_SP/ac6_arm.sct create mode 100644 platform/cmsis/RTE/Device/CMSDK_CM7_SP/ac6_arm.sct.base@1.0.0 create mode 100755 platform/cmsis/RTE/Device/CMSDK_CM7_SP/startup_CMSDK_CM7.c create mode 100644 platform/cmsis/RTE/Device/CMSDK_CM7_SP/startup_CMSDK_CM7.c.base@1.1.0 create mode 100755 platform/cmsis/RTE/Device/CMSDK_CM7_SP/system_CMSDK_CM7.c create mode 100644 platform/cmsis/RTE/Device/CMSDK_CM7_SP/system_CMSDK_CM7.c.base@1.1.0 create mode 100755 platform/cmsis/RTE/Device/IOTKit_CM33_FP/RTE_Device.h create mode 100644 platform/cmsis/RTE/Device/IOTKit_CM33_FP/RTE_Device.h.base@1.0.0 create mode 100755 platform/cmsis/RTE/Device/IOTKit_CM33_FP/ac6_arm.sct create mode 100644 platform/cmsis/RTE/Device/IOTKit_CM33_FP/ac6_arm.sct.base@1.0.0 create mode 100755 platform/cmsis/RTE/Device/IOTKit_CM33_FP/partition_IOTKit_CM33.h create mode 100644 platform/cmsis/RTE/Device/IOTKit_CM33_FP/partition_IOTKit_CM33.h.base@1.0.0 create mode 100755 platform/cmsis/RTE/Device/IOTKit_CM33_FP/startup_IOTKit_CM33.c create mode 100644 platform/cmsis/RTE/Device/IOTKit_CM33_FP/startup_IOTKit_CM33.c.base@1.2.0 create mode 100755 platform/cmsis/RTE/Device/IOTKit_CM33_FP/system_IOTKit_CM33.c create mode 100644 platform/cmsis/RTE/Device/IOTKit_CM33_FP/system_IOTKit_CM33.c.base@1.2.0 delete mode 100644 platform/cmsis/audiomark.cbuild-idx.yml create mode 100644 platform/cmsis/audiomark_app.Release+MPS2-CMSDK_CM4_FP.cprj create mode 100644 platform/cmsis/audiomark_app.Release+MPS2-CMSDK_CM7_SP.cprj create mode 100644 platform/cmsis/audiomark_app.Release+MPS2-IOTKit-CM33.cprj delete mode 100644 platform/cmsis/printf_mps3.clayer.yml create mode 100644 platform/cmsis/printf_mpsx.clayer.yml create mode 100644 platform/cmsis/testabf.Release+MPS2-CMSDK_CM4_FP.cprj create mode 100644 platform/cmsis/testabf.Release+MPS2-CMSDK_CM7_SP.cprj create mode 100644 platform/cmsis/testabf.Release+MPS2-IOTKit-CM33.cprj delete mode 100644 platform/cmsis/testabf.Release+MPS3-Corstone-310.cbuild.yml create mode 100644 platform/cmsis/testaec.Release+MPS2-CMSDK_CM4_FP.cprj create mode 100644 platform/cmsis/testaec.Release+MPS2-CMSDK_CM7_SP.cprj create mode 100644 platform/cmsis/testaec.Release+MPS2-IOTKit-CM33.cprj delete mode 100644 platform/cmsis/testaec.Release+MPS3-Corstone-310.cbuild.yml create mode 100644 platform/cmsis/testanr.Release+MPS2-CMSDK_CM4_FP.cprj create mode 100644 platform/cmsis/testanr.Release+MPS2-CMSDK_CM7_SP.cprj create mode 100644 platform/cmsis/testanr.Release+MPS2-IOTKit-CM33.cprj delete mode 100644 platform/cmsis/testanr.Release+MPS3-Corstone-310.cbuild.yml create mode 100644 platform/cmsis/testkws.Release+MPS2-CMSDK_CM4_FP.cprj create mode 100644 platform/cmsis/testkws.Release+MPS2-CMSDK_CM7_SP.cprj create mode 100644 platform/cmsis/testkws.Release+MPS2-IOTKit-CM33.cprj delete mode 100644 platform/cmsis/testkws.Release+MPS3-Corstone-310.cbuild.yml create mode 100644 platform/cmsis/testmfcc.Release+MPS2-CMSDK_CM4_FP.cprj create mode 100644 platform/cmsis/testmfcc.Release+MPS2-CMSDK_CM7_SP.cprj create mode 100644 platform/cmsis/testmfcc.Release+MPS2-IOTKit-CM33.cprj delete mode 100644 platform/cmsis/testmfcc.Release+MPS3-Corstone-310.cbuild.yml diff --git a/platform/cmsis/README.md b/platform/cmsis/README.md index 4797917..99fe165 100755 --- a/platform/cmsis/README.md +++ b/platform/cmsis/README.md @@ -1,13 +1,13 @@ # README -- How to build and run EEMBC Audiomark Applications on ARM Corstone-300/310 FPGA or ARM Virtual Hardware. - - The applications are intended to run on Cortex-M55/Cortex-M85 MCUs. +- How to build and run EEMBC Audiomark Applications on ARM Corstone-300/310 MPS3 FPGA, IoT kit, Cortex-M CMSDK or ARM Virtual Hardware. + - The applications are intended to run on Cortex-M55/Cortex-M85 MCUs supporting Helium™ and Arm V7M-E/Arm V8.0M cores. FPU is required. - A dedicated project running the KWS on Ethos-U55 will be added later. Please contact ARM for more details. - - Support for running Audiomark on previous Cortex-M generation will be added later. - - ARM FPGA images and documentation can be found at https://developer.arm.com/downloads/-/download-fpga-images + - ARM FPGA images and documentation can be found at https://developer.arm.com/downloads/-/download-fpga-images. - `AN552`: Arm® Corstone™ SSE-300 with Cortex®-M55 and Ethos™-U55 Example Subsystem for MPS3 (Partial Reconfiguration Design) - `AN555`: Arm® Corstone™ SSE-310 with Cortex®-M85 and Ethos™-U55 Example Subsystem for MPS3 - + - `AN505`: Arm® Cortex™-M33 with IoT kit FPGA for MPS2+ + - `AN386`, `AN500`: Arm® Cortex™-M4 / Arm® Cortex™-M7 Prototyping System version 3.1 (VEM31) ## CMSIS Build tools option @@ -158,10 +158,14 @@ Various individual audiomark components unit-tests project can imported using th For Corstone-310 FPGA, similar steps can be followed by importing **audiomark_app.Release+MPS3-Corstone-310.cprj** and / or different unit tests +For Arm V7M-E/ Arm V8.0M MPS2+ FPGA, similar steps can be followed by importing **audiomark_app.Release+MPS2-IOTKit-CM33.cprj**, **audiomark_app.Release+MPS2-CMSDK_CM7_SP.cprj**, **audiomark_app.Release+MPS2-CMSDK_CM4_FP.cprj** and / or different unit tests + For Virtual Hardware audiomark components, import projects having `VHT` prefix like **testaec.Release+VHT-Corstone-300.cprj**. ## Important Notes - For Corstone-300, Audiomark Code and Data fit entierely in I/D TCM. MPS3 FPGA system clock frequency runs at `32Mhz` - - For Corstone-310, small TCMs prevent Code and Data to fit in these. Internal SRAM are used and benchmarks will run with caches enabled. MPS3 FPGA system clock frequency runs at `25Mhz` \ No newline at end of file + - For Corstone-310, small TCMs prevent Code and Data to fit in these. Internal SRAM are used and benchmarks will run with caches enabled. MPS3 FPGA system clock frequency runs at `25Mhz` + - For MPS2+ Cortex-M33 IoTKit, default system clock frequency runs at `20Mhz` + - For MPS2+ Cortex-M4/Cortex-M7, CMSDK default system clock frequency runs at `25Mhz` diff --git a/platform/cmsis/RTE/Device/CMSDK_CM4_FP/RTE_Device.h b/platform/cmsis/RTE/Device/CMSDK_CM4_FP/RTE_Device.h new file mode 100755 index 0000000..1a5c51c --- /dev/null +++ b/platform/cmsis/RTE/Device/CMSDK_CM4_FP/RTE_Device.h @@ -0,0 +1,50 @@ +/* ----------------------------------------------------------------------------- + * Copyright (c) 2016 ARM Ltd. + * + * This software is provided 'as-is', without any express or implied warranty. + * In no event will the authors be held liable for any damages arising from + * the use of this software. Permission is granted to anyone to use this + * software for any purpose, including commercial applications, and to alter + * it and redistribute it freely, subject to the following restrictions: + * + * 1. The origin of this software must not be misrepresented; you must not + * claim that you wrote the original software. If you use this software in + * a product, an acknowledgment in the product documentation would be + * appreciated but is not required. + * + * 2. Altered source versions must be plainly marked as such, and must not be + * misrepresented as being the original software. + * + * 3. This notice may not be removed or altered from any source distribution. + * + * $Date: 25. April 2016 + * $Revision: V1.0.0 + * + * Project: RTE Device Configuration for ARM CMSDK_CM device + * -------------------------------------------------------------------------- */ + +//-------- <<< Use Configuration Wizard in Context Menu >>> -------------------- + +#ifndef __RTE_DEVICE_H +#define __RTE_DEVICE_H + +// USART0 (Universal synchronous asynchronous receiver transmitter) [Driver_USART0] +// Configuration settings for Driver_USART0 in component ::CMSIS Driver:USART +#define RTE_USART0 1 + + +// USART1 (Universal synchronous asynchronous receiver transmitter) [Driver_USART1] +// Configuration settings for Driver_USART1 in component ::CMSIS Driver:USART +#define RTE_USART1 0 + + +// USART2 (Universal synchronous asynchronous receiver transmitter) [Driver_USART2] +// Configuration settings for Driver_USART2 in component ::CMSIS Driver:USART +#define RTE_UART2 0 + + +// USART3 (Universal synchronous asynchronous receiver transmitter) [Driver_USART3] +// Configuration settings for Driver_USART3 in component ::CMSIS Driver:USART +#define RTE_UART3 0 + +#endif /* __RTE_DEVICE_H */ diff --git a/platform/cmsis/RTE/Device/CMSDK_CM4_FP/RTE_Device.h.base@1.0.0 b/platform/cmsis/RTE/Device/CMSDK_CM4_FP/RTE_Device.h.base@1.0.0 new file mode 100644 index 0000000..786b74f --- /dev/null +++ b/platform/cmsis/RTE/Device/CMSDK_CM4_FP/RTE_Device.h.base@1.0.0 @@ -0,0 +1,50 @@ +/* ----------------------------------------------------------------------------- + * Copyright (c) 2016 ARM Ltd. + * + * This software is provided 'as-is', without any express or implied warranty. + * In no event will the authors be held liable for any damages arising from + * the use of this software. Permission is granted to anyone to use this + * software for any purpose, including commercial applications, and to alter + * it and redistribute it freely, subject to the following restrictions: + * + * 1. The origin of this software must not be misrepresented; you must not + * claim that you wrote the original software. If you use this software in + * a product, an acknowledgment in the product documentation would be + * appreciated but is not required. + * + * 2. Altered source versions must be plainly marked as such, and must not be + * misrepresented as being the original software. + * + * 3. This notice may not be removed or altered from any source distribution. + * + * $Date: 25. April 2016 + * $Revision: V1.0.0 + * + * Project: RTE Device Configuration for ARM CMSDK_CM device + * -------------------------------------------------------------------------- */ + +//-------- <<< Use Configuration Wizard in Context Menu >>> -------------------- + +#ifndef __RTE_DEVICE_H +#define __RTE_DEVICE_H + +// USART0 (Universal synchronous asynchronous receiver transmitter) [Driver_USART0] +// Configuration settings for Driver_USART0 in component ::CMSIS Driver:USART +#define RTE_USART0 0 + + +// USART1 (Universal synchronous asynchronous receiver transmitter) [Driver_USART1] +// Configuration settings for Driver_USART1 in component ::CMSIS Driver:USART +#define RTE_USART1 0 + + +// USART2 (Universal synchronous asynchronous receiver transmitter) [Driver_USART2] +// Configuration settings for Driver_USART2 in component ::CMSIS Driver:USART +#define RTE_UART2 0 + + +// USART3 (Universal synchronous asynchronous receiver transmitter) [Driver_USART3] +// Configuration settings for Driver_USART3 in component ::CMSIS Driver:USART +#define RTE_UART3 0 + +#endif /* __RTE_DEVICE_H */ diff --git a/platform/cmsis/RTE/Device/CMSDK_CM4_FP/ac6_arm.sct b/platform/cmsis/RTE/Device/CMSDK_CM4_FP/ac6_arm.sct new file mode 100755 index 0000000..a259143 --- /dev/null +++ b/platform/cmsis/RTE/Device/CMSDK_CM4_FP/ac6_arm.sct @@ -0,0 +1,87 @@ +#! armclang -E --target=arm-arm-none-eabi -mcpu=cortex-m4 -xc +; command above MUST be in first line (no comment above!) + +/* +;-------- <<< Use Configuration Wizard in Context Menu >>> ------------------- +*/ + +/*--------------------- Flash Configuration ---------------------------------- +; Flash Configuration +; Flash Base Address <0x0-0xFFFFFFFF:8> +; Flash Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + *----------------------------------------------------------------------------*/ +#define __ROM_BASE 0x00000000 +#define __ROM_SIZE 0x00080000 + +/*--------------------- Embedded RAM Configuration --------------------------- +; RAM Configuration +; RAM Base Address <0x0-0xFFFFFFFF:8> +; RAM Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + *----------------------------------------------------------------------------*/ +#define __RAM_BASE 0x20000000 +#define __RAM_SIZE 0x00080000 + +/*--------------------- Stack / Heap Configuration --------------------------- +; Stack / Heap Configuration +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + *----------------------------------------------------------------------------*/ +#define __STACK_SIZE 0x00010000 +#define __HEAP_SIZE 0x00040000 + +/* +;------------- <<< end of configuration section >>> --------------------------- +*/ + + +/*---------------------------------------------------------------------------- + User Stack & Heap boundary definition + *----------------------------------------------------------------------------*/ +#define __STACK_TOP (__RAM_BASE + __RAM_SIZE) /* starts at end of RAM */ +#define __HEAP_BASE (AlignExpr(+0, 8)) /* starts after RW_RAM section, 8 byte aligned */ + + +/*---------------------------------------------------------------------------- + Scatter File Definitions definition + *----------------------------------------------------------------------------*/ +#define __RO_BASE __ROM_BASE +#define __RO_SIZE __ROM_SIZE + +#define __RW_BASE __RAM_BASE +#define __RW_SIZE (__RAM_SIZE - __STACK_SIZE - __HEAP_SIZE) + + +LR_ROM __RO_BASE __RO_SIZE { ; load region size_region + ER_ROM __RO_BASE __RO_SIZE { ; load address = execution address + *.o (RESET, +First) + *(InRoot$$Sections) + .ANY (+RO) + .ANY (+XO) + /* different test vectors */ + th_api.o + abf_f32_expected.o + abf_f32_input_ch1.o + abf_f32_input_ch2.o + aec_f32_expected.o + aec_f32_input_echo.o + aec_f32_input_source.o + kws_expected.o + kws_input.o + mfcc_f32_all.o + } + + RW_RAM __RW_BASE __RW_SIZE { ; RW data + .ANY (+RW +ZI +RO-DATA) + } + +#if __HEAP_SIZE > 0 + ARM_LIB_HEAP __HEAP_BASE EMPTY __HEAP_SIZE { ; Reserve empty region for heap + } +#endif + + ARM_LIB_STACK __STACK_TOP EMPTY -__STACK_SIZE { ; Reserve empty region for stack + } +} diff --git a/platform/cmsis/RTE/Device/CMSDK_CM4_FP/ac6_arm.sct.base@1.0.0 b/platform/cmsis/RTE/Device/CMSDK_CM4_FP/ac6_arm.sct.base@1.0.0 new file mode 100644 index 0000000..163dc6c --- /dev/null +++ b/platform/cmsis/RTE/Device/CMSDK_CM4_FP/ac6_arm.sct.base@1.0.0 @@ -0,0 +1,76 @@ +#! armclang -E --target=arm-arm-none-eabi -mcpu=cortex-m4 -xc +; command above MUST be in first line (no comment above!) + +/* +;-------- <<< Use Configuration Wizard in Context Menu >>> ------------------- +*/ + +/*--------------------- Flash Configuration ---------------------------------- +; Flash Configuration +; Flash Base Address <0x0-0xFFFFFFFF:8> +; Flash Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + *----------------------------------------------------------------------------*/ +#define __ROM_BASE 0x00000000 +#define __ROM_SIZE 0x00080000 + +/*--------------------- Embedded RAM Configuration --------------------------- +; RAM Configuration +; RAM Base Address <0x0-0xFFFFFFFF:8> +; RAM Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + *----------------------------------------------------------------------------*/ +#define __RAM_BASE 0x20000000 +#define __RAM_SIZE 0x00040000 + +/*--------------------- Stack / Heap Configuration --------------------------- +; Stack / Heap Configuration +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + *----------------------------------------------------------------------------*/ +#define __STACK_SIZE 0x00000200 +#define __HEAP_SIZE 0x00000C00 + +/* +;------------- <<< end of configuration section >>> --------------------------- +*/ + + +/*---------------------------------------------------------------------------- + User Stack & Heap boundary definition + *----------------------------------------------------------------------------*/ +#define __STACK_TOP (__RAM_BASE + __RAM_SIZE) /* starts at end of RAM */ +#define __HEAP_BASE (AlignExpr(+0, 8)) /* starts after RW_RAM section, 8 byte aligned */ + + +/*---------------------------------------------------------------------------- + Scatter File Definitions definition + *----------------------------------------------------------------------------*/ +#define __RO_BASE __ROM_BASE +#define __RO_SIZE __ROM_SIZE + +#define __RW_BASE __RAM_BASE +#define __RW_SIZE (__RAM_SIZE - __STACK_SIZE - __HEAP_SIZE) + + +LR_ROM __RO_BASE __RO_SIZE { ; load region size_region + ER_ROM __RO_BASE __RO_SIZE { ; load address = execution address + *.o (RESET, +First) + *(InRoot$$Sections) + .ANY (+RO) + .ANY (+XO) + } + + RW_RAM __RW_BASE __RW_SIZE { ; RW data + .ANY (+RW +ZI) + } + +#if __HEAP_SIZE > 0 + ARM_LIB_HEAP __HEAP_BASE EMPTY __HEAP_SIZE { ; Reserve empty region for heap + } +#endif + + ARM_LIB_STACK __STACK_TOP EMPTY -__STACK_SIZE { ; Reserve empty region for stack + } +} diff --git a/platform/cmsis/RTE/Device/CMSDK_CM4_FP/startup_CMSDK_CM4.c b/platform/cmsis/RTE/Device/CMSDK_CM4_FP/startup_CMSDK_CM4.c new file mode 100755 index 0000000..8d76cd9 --- /dev/null +++ b/platform/cmsis/RTE/Device/CMSDK_CM4_FP/startup_CMSDK_CM4.c @@ -0,0 +1,423 @@ +/****************************************************************************** + * @file startup_CMSDK_CM4.c + * @brief CMSIS Startup File for CMSDK_M4 Device + ******************************************************************************/ +/* Copyright (c) 2022 ARM LIMITED + + All rights reserved. + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + - Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + - Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + - Neither the name of ARM nor the names of its contributors may be used + to endorse or promote products derived from this software without + specific prior written permission. + * + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. + ---------------------------------------------------------------------------*/ + +#if defined (CMSDK_CM4) || defined (CMSDK_CM4_VHT) + #include "CMSDK_CM4.h" +#elif defined (CMSDK_CM4_FP) || defined (CMSDK_CM4_FP_VHT) + #include "CMSDK_CM4_FP.h" +#else + #error device not specified! +#endif + +/*---------------------------------------------------------------------------- + External References + *----------------------------------------------------------------------------*/ +extern uint32_t __INITIAL_SP; + +extern __NO_RETURN void __PROGRAM_START(void); + +/*---------------------------------------------------------------------------- + Internal References + *----------------------------------------------------------------------------*/ +__NO_RETURN void Reset_Handler (void); + void Default_Handler(void); + +/*---------------------------------------------------------------------------- + Exception / Interrupt Handler + *----------------------------------------------------------------------------*/ +/* Exceptions */ +void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void HardFault_Handler (void) __attribute__ ((weak)); +void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); + +/* Interrupts */ +void UART0RX_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART0TX_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART1RX_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART1TX_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART2RX_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART2TX_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0ALL_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO1ALL_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void TIMER0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void TIMER1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void DUALTIMER_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void SPI_0_1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART_0_1_2_OVF_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void ETHERNET_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void I2S_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void TOUCHSCREEN_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART3RX_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART3TX_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART4RX_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART4TX_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void SPI_2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void SPI_3_4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +#if defined CMSDK_CM4_VHT || defined CMSDK_CM4_FP_VHT +void ARM_VSI0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void ARM_VSI1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void ARM_VSI2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void ARM_VSI3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void ARM_VSI4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void ARM_VSI5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void ARM_VSI6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void ARM_VSI7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +#endif + + +/*---------------------------------------------------------------------------- + Exception / Interrupt Vector table + *----------------------------------------------------------------------------*/ + +#if defined ( __GNUC__ ) +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wpedantic" +#endif + +extern const VECTOR_TABLE_Type __VECTOR_TABLE[256]; + const VECTOR_TABLE_Type __VECTOR_TABLE[256] __VECTOR_TABLE_ATTRIBUTE = { + (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ + Reset_Handler, /* Reset Handler */ + NMI_Handler, /* -14 NMI Handler */ + HardFault_Handler, /* -13 Hard Fault Handler */ + MemManage_Handler, /* -12 MPU Fault Handler */ + BusFault_Handler, /* -11 Bus Fault Handler */ + UsageFault_Handler, /* -10 Usage Fault Handler */ + 0, /* Reserved */ + 0, /* Reserved */ + 0, /* Reserved */ + 0, /* Reserved */ + SVC_Handler, /* -5 SVC Handler */ + DebugMon_Handler, /* -4 Debug Monitor Handler */ + 0, /* Reserved */ + PendSV_Handler, /* -2 PendSV Handler */ + SysTick_Handler, /* -1 SysTick Handler */ + + /* Interrupts */ + UART0RX_Handler, /* 0 UART 0 receive interrupt */ + UART0TX_Handler, /* 1 UART 0 transmit interrupt */ + UART1RX_Handler, /* 2 UART 1 receive interrupt */ + UART1TX_Handler, /* 3 UART 1 transmit interrupt */ + UART2RX_Handler, /* 4 UART 2 receive interrupt */ + UART2TX_Handler, /* 5 UART 2 transmit interrupt */ + GPIO0ALL_Handler, /* 6 GPIO 0 combined interrupt */ + GPIO1ALL_Handler, /* 7 GPIO 1 combined interrupt */ + TIMER0_Handler, /* 8 Timer 0 interrupt */ + TIMER1_Handler, /* 9 Timer 1 interrupt */ + DUALTIMER_Handler, /* 10 Dual Timer interrupt */ + SPI_0_1_Handler, /* 11 SPI 0, SPI 1 interrupt */ + UART_0_1_2_OVF_Handler, /* 12 UART overflow (0, 1 & 2) interrupt */ + ETHERNET_Handler, /* 13 Ethernet interrupt */ + I2S_Handler, /* 14 Audio I2S interrupt */ + TOUCHSCREEN_Handler, /* 15 Touch Screen interrupt */ + GPIO2_Handler, /* 16 GPIO 2 combined interrupt */ + GPIO3_Handler, /* 17 GPIO 3 combined interrupt */ + UART3RX_Handler, /* 18 UART 3 receive interrupt */ + UART3TX_Handler, /* 19 UART 3 transmit interrupt */ + UART4RX_Handler, /* 20 UART 4 receive interrupt */ + UART4TX_Handler, /* 21 UART 4 transmit interrupt */ + SPI_2_Handler, /* 22 SPI 2 interrupt */ + SPI_3_4_Handler, /* 23 SPI 3, SPI 4 interrupt */ + GPIO0_0_Handler, /* 24 GPIO 0 individual interrupt ( 0) */ + GPIO0_1_Handler, /* 25 GPIO 0 individual interrupt ( 1) */ + GPIO0_2_Handler, /* 26 GPIO 0 individual interrupt ( 2) */ + GPIO0_3_Handler, /* 27 GPIO 0 individual interrupt ( 3) */ + GPIO0_4_Handler, /* 28 GPIO 0 individual interrupt ( 4) */ + GPIO0_5_Handler, /* 29 GPIO 0 individual interrupt ( 5) */ + GPIO0_6_Handler, /* 30 GPIO 0 individual interrupt ( 6) */ + GPIO0_7_Handler, /* 31 GPIO 0 individual interrupt ( 7) */ + 0, /* 32 Reserved */ + 0, /* 33 Reserved */ + 0, /* 34 Reserved */ + 0, /* 35 Reserved */ + 0, /* 36 Reserved */ + 0, /* 37 Reserved */ + 0, /* 38 Reserved */ + 0, /* 39 Reserved */ + 0, /* 40 Reserved */ + 0, /* 41 Reserved */ + 0, /* 42 Reserved */ + 0, /* 43 Reserved */ + 0, /* 44 Reserved */ + 0, /* 45 Reserved */ + 0, /* 46 Reserved */ + 0, /* 47 Reserved */ + 0, /* 48 Reserved */ + 0, /* 49 Reserved */ + 0, /* 50 Reserved */ + 0, /* 51 Reserved */ + 0, /* 52 Reserved */ + 0, /* 53 Reserved */ + 0, /* 54 Reserved */ + 0, /* 55 Reserved */ + 0, /* 56 Reserved */ + 0, /* 57 Reserved */ + 0, /* 58 Reserved */ + 0, /* 59 Reserved */ + 0, /* 60 Reserved */ + 0, /* 61 Reserved */ + 0, /* 62 Reserved */ + 0, /* 63 Reserved */ + 0, /* 64 Reserved */ + 0, /* 65 Reserved */ + 0, /* 66 Reserved */ + 0, /* 67 Reserved */ + 0, /* 68 Reserved */ + 0, /* 69 Reserved */ + 0, /* 70 Reserved */ + 0, /* 71 Reserved */ + 0, /* 72 Reserved */ + 0, /* 73 Reserved */ + 0, /* 74 Reserved */ + 0, /* 75 Reserved */ + 0, /* 76 Reserved */ + 0, /* 77 Reserved */ + 0, /* 78 Reserved */ + 0, /* 79 Reserved */ + 0, /* 80 Reserved */ + 0, /* 81 Reserved */ + 0, /* 82 Reserved */ + 0, /* 83 Reserved */ + 0, /* 84 Reserved */ + 0, /* 85 Reserved */ + 0, /* 86 Reserved */ + 0, /* 87 Reserved */ + 0, /* 88 Reserved */ + 0, /* 89 Reserved */ + 0, /* 90 Reserved */ + 0, /* 91 Reserved */ + 0, /* 92 Reserved */ + 0, /* 93 Reserved */ + 0, /* 94 Reserved */ + 0, /* 95 Reserved */ + 0, /* 96 Reserved */ + 0, /* 97 Reserved */ + 0, /* 98 Reserved */ + 0, /* 99 Reserved */ + 0, /* 100 Reserved */ + 0, /* 101 Reserved */ + 0, /* 102 Reserved */ + 0, /* 103 Reserved */ + 0, /* 104 Reserved */ + 0, /* 105 Reserved */ + 0, /* 106 Reserved */ + 0, /* 107 Reserved */ + 0, /* 108 Reserved */ + 0, /* 109 Reserved */ + 0, /* 110 Reserved */ + 0, /* 111 Reserved */ + 0, /* 112 Reserved */ + 0, /* 113 Reserved */ + 0, /* 114 Reserved */ + 0, /* 115 Reserved */ + 0, /* 116 Reserved */ + 0, /* 117 Reserved */ + 0, /* 118 Reserved */ + 0, /* 119 Reserved */ + 0, /* 120 Reserved */ + 0, /* 121 Reserved */ + 0, /* 122 Reserved */ + 0, /* 123 Reserved */ + 0, /* 124 Reserved */ + 0, /* 125 Reserved */ + 0, /* 126 Reserved */ + 0, /* 127 Reserved */ + 0, /* 128 Reserved */ + 0, /* 129 Reserved */ + 0, /* 130 Reserved */ + 0, /* 131 Reserved */ + 0, /* 132 Reserved */ + 0, /* 133 Reserved */ + 0, /* 134 Reserved */ + 0, /* 135 Reserved */ + 0, /* 136 Reserved */ + 0, /* 137 Reserved */ + 0, /* 138 Reserved */ + 0, /* 139 Reserved */ + 0, /* 140 Reserved */ + 0, /* 141 Reserved */ + 0, /* 142 Reserved */ + 0, /* 143 Reserved */ + 0, /* 144 Reserved */ + 0, /* 145 Reserved */ + 0, /* 146 Reserved */ + 0, /* 147 Reserved */ + 0, /* 148 Reserved */ + 0, /* 149 Reserved */ + 0, /* 150 Reserved */ + 0, /* 151 Reserved */ + 0, /* 152 Reserved */ + 0, /* 153 Reserved */ + 0, /* 154 Reserved */ + 0, /* 155 Reserved */ + 0, /* 156 Reserved */ + 0, /* 157 Reserved */ + 0, /* 158 Reserved */ + 0, /* 159 Reserved */ + 0, /* 160 Reserved */ + 0, /* 161 Reserved */ + 0, /* 162 Reserved */ + 0, /* 163 Reserved */ + 0, /* 164 Reserved */ + 0, /* 165 Reserved */ + 0, /* 166 Reserved */ + 0, /* 167 Reserved */ + 0, /* 168 Reserved */ + 0, /* 169 Reserved */ + 0, /* 170 Reserved */ + 0, /* 171 Reserved */ + 0, /* 172 Reserved */ + 0, /* 173 Reserved */ + 0, /* 174 Reserved */ + 0, /* 175 Reserved */ + 0, /* 176 Reserved */ + 0, /* 177 Reserved */ + 0, /* 178 Reserved */ + 0, /* 179 Reserved */ + 0, /* 180 Reserved */ + 0, /* 181 Reserved */ + 0, /* 182 Reserved */ + 0, /* 183 Reserved */ + 0, /* 184 Reserved */ + 0, /* 185 Reserved */ + 0, /* 186 Reserved */ + 0, /* 187 Reserved */ + 0, /* 188 Reserved */ + 0, /* 189 Reserved */ + 0, /* 190 Reserved */ + 0, /* 191 Reserved */ + 0, /* 192 Reserved */ + 0, /* 193 Reserved */ + 0, /* 194 Reserved */ + 0, /* 195 Reserved */ + 0, /* 196 Reserved */ + 0, /* 197 Reserved */ + 0, /* 198 Reserved */ + 0, /* 199 Reserved */ + 0, /* 200 Reserved */ + 0, /* 201 Reserved */ + 0, /* 202 Reserved */ + 0, /* 203 Reserved */ + 0, /* 204 Reserved */ + 0, /* 205 Reserved */ + 0, /* 206 Reserved */ + 0, /* 207 Reserved */ + 0, /* 208 Reserved */ + 0, /* 209 Reserved */ + 0, /* 210 Reserved */ + 0, /* 211 Reserved */ + 0, /* 212 Reserved */ + 0, /* 213 Reserved */ + 0, /* 214 Reserved */ + 0, /* 215 Reserved */ + 0, /* 216 Reserved */ + 0, /* 217 Reserved */ + 0, /* 218 Reserved */ + 0, /* 219 Reserved */ + 0, /* 220 Reserved */ + 0, /* 221 Reserved */ + 0, /* 222 Reserved */ + 0, /* 223 Reserved */ +#if defined CMSDK_CM4_VHT || defined CMSDK_CM4_FP_VHT + ARM_VSI0_Handler, /* 224 VSI 0 interrupt */ + ARM_VSI1_Handler, /* 225 VSI 1 interrupt */ + ARM_VSI2_Handler, /* 226 VSI 2 interrupt */ + ARM_VSI3_Handler, /* 227 VSI 3 interrupt */ + ARM_VSI4_Handler, /* 228 VSI 4 interrupt */ + ARM_VSI5_Handler, /* 229 VSI 5 interrupt */ + ARM_VSI6_Handler, /* 230 VSI 6 interrupt */ + ARM_VSI7_Handler /* 231 VSI 7 interrupt */ +#else + 0, /* 224 Reserved */ + 0, /* 225 Reserved */ + 0, /* 226 Reserved */ + 0, /* 227 Reserved */ + 0, /* 228 Reserved */ + 0, /* 229 Reserved */ + 0, /* 230 Reserved */ + 0 /* 231 Reserved */ +#endif +}; + +#if defined ( __GNUC__ ) +#pragma GCC diagnostic pop +#endif + +/*---------------------------------------------------------------------------- + Reset Handler called on controller reset + *----------------------------------------------------------------------------*/ +__NO_RETURN void Reset_Handler(void) +{ + SystemInit(); /* CMSIS System Initialization */ + __PROGRAM_START(); /* Enter PreMain (C library entry point) */ +} + + +#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #pragma clang diagnostic push + #pragma clang diagnostic ignored "-Wmissing-noreturn" +#endif + +/*---------------------------------------------------------------------------- + Hard Fault Handler + *----------------------------------------------------------------------------*/ +void HardFault_Handler(void) +{ + while(1); +} + +/*---------------------------------------------------------------------------- + Default Handler for Exceptions / Interrupts + *----------------------------------------------------------------------------*/ +void Default_Handler(void) +{ + while(1); +} + +#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #pragma clang diagnostic pop +#endif diff --git a/platform/cmsis/RTE/Device/CMSDK_CM4_FP/startup_CMSDK_CM4.c.base@1.1.0 b/platform/cmsis/RTE/Device/CMSDK_CM4_FP/startup_CMSDK_CM4.c.base@1.1.0 new file mode 100644 index 0000000..8d76cd9 --- /dev/null +++ b/platform/cmsis/RTE/Device/CMSDK_CM4_FP/startup_CMSDK_CM4.c.base@1.1.0 @@ -0,0 +1,423 @@ +/****************************************************************************** + * @file startup_CMSDK_CM4.c + * @brief CMSIS Startup File for CMSDK_M4 Device + ******************************************************************************/ +/* Copyright (c) 2022 ARM LIMITED + + All rights reserved. + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + - Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + - Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + - Neither the name of ARM nor the names of its contributors may be used + to endorse or promote products derived from this software without + specific prior written permission. + * + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. + ---------------------------------------------------------------------------*/ + +#if defined (CMSDK_CM4) || defined (CMSDK_CM4_VHT) + #include "CMSDK_CM4.h" +#elif defined (CMSDK_CM4_FP) || defined (CMSDK_CM4_FP_VHT) + #include "CMSDK_CM4_FP.h" +#else + #error device not specified! +#endif + +/*---------------------------------------------------------------------------- + External References + *----------------------------------------------------------------------------*/ +extern uint32_t __INITIAL_SP; + +extern __NO_RETURN void __PROGRAM_START(void); + +/*---------------------------------------------------------------------------- + Internal References + *----------------------------------------------------------------------------*/ +__NO_RETURN void Reset_Handler (void); + void Default_Handler(void); + +/*---------------------------------------------------------------------------- + Exception / Interrupt Handler + *----------------------------------------------------------------------------*/ +/* Exceptions */ +void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void HardFault_Handler (void) __attribute__ ((weak)); +void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); + +/* Interrupts */ +void UART0RX_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART0TX_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART1RX_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART1TX_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART2RX_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART2TX_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0ALL_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO1ALL_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void TIMER0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void TIMER1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void DUALTIMER_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void SPI_0_1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART_0_1_2_OVF_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void ETHERNET_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void I2S_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void TOUCHSCREEN_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART3RX_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART3TX_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART4RX_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART4TX_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void SPI_2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void SPI_3_4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +#if defined CMSDK_CM4_VHT || defined CMSDK_CM4_FP_VHT +void ARM_VSI0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void ARM_VSI1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void ARM_VSI2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void ARM_VSI3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void ARM_VSI4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void ARM_VSI5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void ARM_VSI6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void ARM_VSI7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +#endif + + +/*---------------------------------------------------------------------------- + Exception / Interrupt Vector table + *----------------------------------------------------------------------------*/ + +#if defined ( __GNUC__ ) +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wpedantic" +#endif + +extern const VECTOR_TABLE_Type __VECTOR_TABLE[256]; + const VECTOR_TABLE_Type __VECTOR_TABLE[256] __VECTOR_TABLE_ATTRIBUTE = { + (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ + Reset_Handler, /* Reset Handler */ + NMI_Handler, /* -14 NMI Handler */ + HardFault_Handler, /* -13 Hard Fault Handler */ + MemManage_Handler, /* -12 MPU Fault Handler */ + BusFault_Handler, /* -11 Bus Fault Handler */ + UsageFault_Handler, /* -10 Usage Fault Handler */ + 0, /* Reserved */ + 0, /* Reserved */ + 0, /* Reserved */ + 0, /* Reserved */ + SVC_Handler, /* -5 SVC Handler */ + DebugMon_Handler, /* -4 Debug Monitor Handler */ + 0, /* Reserved */ + PendSV_Handler, /* -2 PendSV Handler */ + SysTick_Handler, /* -1 SysTick Handler */ + + /* Interrupts */ + UART0RX_Handler, /* 0 UART 0 receive interrupt */ + UART0TX_Handler, /* 1 UART 0 transmit interrupt */ + UART1RX_Handler, /* 2 UART 1 receive interrupt */ + UART1TX_Handler, /* 3 UART 1 transmit interrupt */ + UART2RX_Handler, /* 4 UART 2 receive interrupt */ + UART2TX_Handler, /* 5 UART 2 transmit interrupt */ + GPIO0ALL_Handler, /* 6 GPIO 0 combined interrupt */ + GPIO1ALL_Handler, /* 7 GPIO 1 combined interrupt */ + TIMER0_Handler, /* 8 Timer 0 interrupt */ + TIMER1_Handler, /* 9 Timer 1 interrupt */ + DUALTIMER_Handler, /* 10 Dual Timer interrupt */ + SPI_0_1_Handler, /* 11 SPI 0, SPI 1 interrupt */ + UART_0_1_2_OVF_Handler, /* 12 UART overflow (0, 1 & 2) interrupt */ + ETHERNET_Handler, /* 13 Ethernet interrupt */ + I2S_Handler, /* 14 Audio I2S interrupt */ + TOUCHSCREEN_Handler, /* 15 Touch Screen interrupt */ + GPIO2_Handler, /* 16 GPIO 2 combined interrupt */ + GPIO3_Handler, /* 17 GPIO 3 combined interrupt */ + UART3RX_Handler, /* 18 UART 3 receive interrupt */ + UART3TX_Handler, /* 19 UART 3 transmit interrupt */ + UART4RX_Handler, /* 20 UART 4 receive interrupt */ + UART4TX_Handler, /* 21 UART 4 transmit interrupt */ + SPI_2_Handler, /* 22 SPI 2 interrupt */ + SPI_3_4_Handler, /* 23 SPI 3, SPI 4 interrupt */ + GPIO0_0_Handler, /* 24 GPIO 0 individual interrupt ( 0) */ + GPIO0_1_Handler, /* 25 GPIO 0 individual interrupt ( 1) */ + GPIO0_2_Handler, /* 26 GPIO 0 individual interrupt ( 2) */ + GPIO0_3_Handler, /* 27 GPIO 0 individual interrupt ( 3) */ + GPIO0_4_Handler, /* 28 GPIO 0 individual interrupt ( 4) */ + GPIO0_5_Handler, /* 29 GPIO 0 individual interrupt ( 5) */ + GPIO0_6_Handler, /* 30 GPIO 0 individual interrupt ( 6) */ + GPIO0_7_Handler, /* 31 GPIO 0 individual interrupt ( 7) */ + 0, /* 32 Reserved */ + 0, /* 33 Reserved */ + 0, /* 34 Reserved */ + 0, /* 35 Reserved */ + 0, /* 36 Reserved */ + 0, /* 37 Reserved */ + 0, /* 38 Reserved */ + 0, /* 39 Reserved */ + 0, /* 40 Reserved */ + 0, /* 41 Reserved */ + 0, /* 42 Reserved */ + 0, /* 43 Reserved */ + 0, /* 44 Reserved */ + 0, /* 45 Reserved */ + 0, /* 46 Reserved */ + 0, /* 47 Reserved */ + 0, /* 48 Reserved */ + 0, /* 49 Reserved */ + 0, /* 50 Reserved */ + 0, /* 51 Reserved */ + 0, /* 52 Reserved */ + 0, /* 53 Reserved */ + 0, /* 54 Reserved */ + 0, /* 55 Reserved */ + 0, /* 56 Reserved */ + 0, /* 57 Reserved */ + 0, /* 58 Reserved */ + 0, /* 59 Reserved */ + 0, /* 60 Reserved */ + 0, /* 61 Reserved */ + 0, /* 62 Reserved */ + 0, /* 63 Reserved */ + 0, /* 64 Reserved */ + 0, /* 65 Reserved */ + 0, /* 66 Reserved */ + 0, /* 67 Reserved */ + 0, /* 68 Reserved */ + 0, /* 69 Reserved */ + 0, /* 70 Reserved */ + 0, /* 71 Reserved */ + 0, /* 72 Reserved */ + 0, /* 73 Reserved */ + 0, /* 74 Reserved */ + 0, /* 75 Reserved */ + 0, /* 76 Reserved */ + 0, /* 77 Reserved */ + 0, /* 78 Reserved */ + 0, /* 79 Reserved */ + 0, /* 80 Reserved */ + 0, /* 81 Reserved */ + 0, /* 82 Reserved */ + 0, /* 83 Reserved */ + 0, /* 84 Reserved */ + 0, /* 85 Reserved */ + 0, /* 86 Reserved */ + 0, /* 87 Reserved */ + 0, /* 88 Reserved */ + 0, /* 89 Reserved */ + 0, /* 90 Reserved */ + 0, /* 91 Reserved */ + 0, /* 92 Reserved */ + 0, /* 93 Reserved */ + 0, /* 94 Reserved */ + 0, /* 95 Reserved */ + 0, /* 96 Reserved */ + 0, /* 97 Reserved */ + 0, /* 98 Reserved */ + 0, /* 99 Reserved */ + 0, /* 100 Reserved */ + 0, /* 101 Reserved */ + 0, /* 102 Reserved */ + 0, /* 103 Reserved */ + 0, /* 104 Reserved */ + 0, /* 105 Reserved */ + 0, /* 106 Reserved */ + 0, /* 107 Reserved */ + 0, /* 108 Reserved */ + 0, /* 109 Reserved */ + 0, /* 110 Reserved */ + 0, /* 111 Reserved */ + 0, /* 112 Reserved */ + 0, /* 113 Reserved */ + 0, /* 114 Reserved */ + 0, /* 115 Reserved */ + 0, /* 116 Reserved */ + 0, /* 117 Reserved */ + 0, /* 118 Reserved */ + 0, /* 119 Reserved */ + 0, /* 120 Reserved */ + 0, /* 121 Reserved */ + 0, /* 122 Reserved */ + 0, /* 123 Reserved */ + 0, /* 124 Reserved */ + 0, /* 125 Reserved */ + 0, /* 126 Reserved */ + 0, /* 127 Reserved */ + 0, /* 128 Reserved */ + 0, /* 129 Reserved */ + 0, /* 130 Reserved */ + 0, /* 131 Reserved */ + 0, /* 132 Reserved */ + 0, /* 133 Reserved */ + 0, /* 134 Reserved */ + 0, /* 135 Reserved */ + 0, /* 136 Reserved */ + 0, /* 137 Reserved */ + 0, /* 138 Reserved */ + 0, /* 139 Reserved */ + 0, /* 140 Reserved */ + 0, /* 141 Reserved */ + 0, /* 142 Reserved */ + 0, /* 143 Reserved */ + 0, /* 144 Reserved */ + 0, /* 145 Reserved */ + 0, /* 146 Reserved */ + 0, /* 147 Reserved */ + 0, /* 148 Reserved */ + 0, /* 149 Reserved */ + 0, /* 150 Reserved */ + 0, /* 151 Reserved */ + 0, /* 152 Reserved */ + 0, /* 153 Reserved */ + 0, /* 154 Reserved */ + 0, /* 155 Reserved */ + 0, /* 156 Reserved */ + 0, /* 157 Reserved */ + 0, /* 158 Reserved */ + 0, /* 159 Reserved */ + 0, /* 160 Reserved */ + 0, /* 161 Reserved */ + 0, /* 162 Reserved */ + 0, /* 163 Reserved */ + 0, /* 164 Reserved */ + 0, /* 165 Reserved */ + 0, /* 166 Reserved */ + 0, /* 167 Reserved */ + 0, /* 168 Reserved */ + 0, /* 169 Reserved */ + 0, /* 170 Reserved */ + 0, /* 171 Reserved */ + 0, /* 172 Reserved */ + 0, /* 173 Reserved */ + 0, /* 174 Reserved */ + 0, /* 175 Reserved */ + 0, /* 176 Reserved */ + 0, /* 177 Reserved */ + 0, /* 178 Reserved */ + 0, /* 179 Reserved */ + 0, /* 180 Reserved */ + 0, /* 181 Reserved */ + 0, /* 182 Reserved */ + 0, /* 183 Reserved */ + 0, /* 184 Reserved */ + 0, /* 185 Reserved */ + 0, /* 186 Reserved */ + 0, /* 187 Reserved */ + 0, /* 188 Reserved */ + 0, /* 189 Reserved */ + 0, /* 190 Reserved */ + 0, /* 191 Reserved */ + 0, /* 192 Reserved */ + 0, /* 193 Reserved */ + 0, /* 194 Reserved */ + 0, /* 195 Reserved */ + 0, /* 196 Reserved */ + 0, /* 197 Reserved */ + 0, /* 198 Reserved */ + 0, /* 199 Reserved */ + 0, /* 200 Reserved */ + 0, /* 201 Reserved */ + 0, /* 202 Reserved */ + 0, /* 203 Reserved */ + 0, /* 204 Reserved */ + 0, /* 205 Reserved */ + 0, /* 206 Reserved */ + 0, /* 207 Reserved */ + 0, /* 208 Reserved */ + 0, /* 209 Reserved */ + 0, /* 210 Reserved */ + 0, /* 211 Reserved */ + 0, /* 212 Reserved */ + 0, /* 213 Reserved */ + 0, /* 214 Reserved */ + 0, /* 215 Reserved */ + 0, /* 216 Reserved */ + 0, /* 217 Reserved */ + 0, /* 218 Reserved */ + 0, /* 219 Reserved */ + 0, /* 220 Reserved */ + 0, /* 221 Reserved */ + 0, /* 222 Reserved */ + 0, /* 223 Reserved */ +#if defined CMSDK_CM4_VHT || defined CMSDK_CM4_FP_VHT + ARM_VSI0_Handler, /* 224 VSI 0 interrupt */ + ARM_VSI1_Handler, /* 225 VSI 1 interrupt */ + ARM_VSI2_Handler, /* 226 VSI 2 interrupt */ + ARM_VSI3_Handler, /* 227 VSI 3 interrupt */ + ARM_VSI4_Handler, /* 228 VSI 4 interrupt */ + ARM_VSI5_Handler, /* 229 VSI 5 interrupt */ + ARM_VSI6_Handler, /* 230 VSI 6 interrupt */ + ARM_VSI7_Handler /* 231 VSI 7 interrupt */ +#else + 0, /* 224 Reserved */ + 0, /* 225 Reserved */ + 0, /* 226 Reserved */ + 0, /* 227 Reserved */ + 0, /* 228 Reserved */ + 0, /* 229 Reserved */ + 0, /* 230 Reserved */ + 0 /* 231 Reserved */ +#endif +}; + +#if defined ( __GNUC__ ) +#pragma GCC diagnostic pop +#endif + +/*---------------------------------------------------------------------------- + Reset Handler called on controller reset + *----------------------------------------------------------------------------*/ +__NO_RETURN void Reset_Handler(void) +{ + SystemInit(); /* CMSIS System Initialization */ + __PROGRAM_START(); /* Enter PreMain (C library entry point) */ +} + + +#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #pragma clang diagnostic push + #pragma clang diagnostic ignored "-Wmissing-noreturn" +#endif + +/*---------------------------------------------------------------------------- + Hard Fault Handler + *----------------------------------------------------------------------------*/ +void HardFault_Handler(void) +{ + while(1); +} + +/*---------------------------------------------------------------------------- + Default Handler for Exceptions / Interrupts + *----------------------------------------------------------------------------*/ +void Default_Handler(void) +{ + while(1); +} + +#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #pragma clang diagnostic pop +#endif diff --git a/platform/cmsis/RTE/Device/CMSDK_CM4_FP/system_CMSDK_CM4.c b/platform/cmsis/RTE/Device/CMSDK_CM4_FP/system_CMSDK_CM4.c new file mode 100755 index 0000000..27aa0d7 --- /dev/null +++ b/platform/cmsis/RTE/Device/CMSDK_CM4_FP/system_CMSDK_CM4.c @@ -0,0 +1,85 @@ +/****************************************************************************** + * @file system_CMSDK_CM4.c + * @brief CMSIS System Source File for CMSDK_M4 Device + ******************************************************************************/ +/* Copyright (c) 2011 - 2022 ARM LIMITED + + All rights reserved. + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + - Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + - Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + - Neither the name of ARM nor the names of its contributors may be used + to endorse or promote products derived from this software without + specific prior written permission. + * + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. + ---------------------------------------------------------------------------*/ + +#if defined (CMSDK_CM4) || defined (CMSDK_CM4_VHT) + #include "CMSDK_CM4.h" +#elif defined (CMSDK_CM4_FP) || defined (CMSDK_CM4_FP_VHT) + #include "CMSDK_CM4_FP.h" +#else + #error device not specified! +#endif + + +/*---------------------------------------------------------------------------- + Define clocks + *----------------------------------------------------------------------------*/ +#define XTAL (50000000UL) /* Oscillator frequency */ + +#define SYSTEM_CLOCK (XTAL / 2U) + +/*---------------------------------------------------------------------------- + Exception / Interrupt Vector table + *----------------------------------------------------------------------------*/ +extern const VECTOR_TABLE_Type __VECTOR_TABLE[256]; + +/*---------------------------------------------------------------------------- + System Core Clock Variable + *----------------------------------------------------------------------------*/ +uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ + +/*---------------------------------------------------------------------------- + System Core Clock update function + *----------------------------------------------------------------------------*/ +void SystemCoreClockUpdate (void) +{ + SystemCoreClock = SYSTEM_CLOCK; +} + +/*---------------------------------------------------------------------------- + System initialization function + *----------------------------------------------------------------------------*/ +void SystemInit (void) +{ +#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) + SCB->VTOR = (uint32_t) &(__VECTOR_TABLE[0]); +#endif + +#if defined (__FPU_USED) && (__FPU_USED == 1U) + SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */ + (3U << 11U*2U) ); /* enable CP11 Full Access */ +#endif + +#ifdef UNALIGNED_SUPPORT_DISABLE + SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk; +#endif + + SystemCoreClock = SYSTEM_CLOCK; +} diff --git a/platform/cmsis/RTE/Device/CMSDK_CM4_FP/system_CMSDK_CM4.c.base@1.1.0 b/platform/cmsis/RTE/Device/CMSDK_CM4_FP/system_CMSDK_CM4.c.base@1.1.0 new file mode 100644 index 0000000..27aa0d7 --- /dev/null +++ b/platform/cmsis/RTE/Device/CMSDK_CM4_FP/system_CMSDK_CM4.c.base@1.1.0 @@ -0,0 +1,85 @@ +/****************************************************************************** + * @file system_CMSDK_CM4.c + * @brief CMSIS System Source File for CMSDK_M4 Device + ******************************************************************************/ +/* Copyright (c) 2011 - 2022 ARM LIMITED + + All rights reserved. + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + - Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + - Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + - Neither the name of ARM nor the names of its contributors may be used + to endorse or promote products derived from this software without + specific prior written permission. + * + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. + ---------------------------------------------------------------------------*/ + +#if defined (CMSDK_CM4) || defined (CMSDK_CM4_VHT) + #include "CMSDK_CM4.h" +#elif defined (CMSDK_CM4_FP) || defined (CMSDK_CM4_FP_VHT) + #include "CMSDK_CM4_FP.h" +#else + #error device not specified! +#endif + + +/*---------------------------------------------------------------------------- + Define clocks + *----------------------------------------------------------------------------*/ +#define XTAL (50000000UL) /* Oscillator frequency */ + +#define SYSTEM_CLOCK (XTAL / 2U) + +/*---------------------------------------------------------------------------- + Exception / Interrupt Vector table + *----------------------------------------------------------------------------*/ +extern const VECTOR_TABLE_Type __VECTOR_TABLE[256]; + +/*---------------------------------------------------------------------------- + System Core Clock Variable + *----------------------------------------------------------------------------*/ +uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ + +/*---------------------------------------------------------------------------- + System Core Clock update function + *----------------------------------------------------------------------------*/ +void SystemCoreClockUpdate (void) +{ + SystemCoreClock = SYSTEM_CLOCK; +} + +/*---------------------------------------------------------------------------- + System initialization function + *----------------------------------------------------------------------------*/ +void SystemInit (void) +{ +#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) + SCB->VTOR = (uint32_t) &(__VECTOR_TABLE[0]); +#endif + +#if defined (__FPU_USED) && (__FPU_USED == 1U) + SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */ + (3U << 11U*2U) ); /* enable CP11 Full Access */ +#endif + +#ifdef UNALIGNED_SUPPORT_DISABLE + SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk; +#endif + + SystemCoreClock = SYSTEM_CLOCK; +} diff --git a/platform/cmsis/RTE/Device/CMSDK_CM7_SP/RTE_Device.h b/platform/cmsis/RTE/Device/CMSDK_CM7_SP/RTE_Device.h new file mode 100755 index 0000000..1a5c51c --- /dev/null +++ b/platform/cmsis/RTE/Device/CMSDK_CM7_SP/RTE_Device.h @@ -0,0 +1,50 @@ +/* ----------------------------------------------------------------------------- + * Copyright (c) 2016 ARM Ltd. + * + * This software is provided 'as-is', without any express or implied warranty. + * In no event will the authors be held liable for any damages arising from + * the use of this software. Permission is granted to anyone to use this + * software for any purpose, including commercial applications, and to alter + * it and redistribute it freely, subject to the following restrictions: + * + * 1. The origin of this software must not be misrepresented; you must not + * claim that you wrote the original software. If you use this software in + * a product, an acknowledgment in the product documentation would be + * appreciated but is not required. + * + * 2. Altered source versions must be plainly marked as such, and must not be + * misrepresented as being the original software. + * + * 3. This notice may not be removed or altered from any source distribution. + * + * $Date: 25. April 2016 + * $Revision: V1.0.0 + * + * Project: RTE Device Configuration for ARM CMSDK_CM device + * -------------------------------------------------------------------------- */ + +//-------- <<< Use Configuration Wizard in Context Menu >>> -------------------- + +#ifndef __RTE_DEVICE_H +#define __RTE_DEVICE_H + +// USART0 (Universal synchronous asynchronous receiver transmitter) [Driver_USART0] +// Configuration settings for Driver_USART0 in component ::CMSIS Driver:USART +#define RTE_USART0 1 + + +// USART1 (Universal synchronous asynchronous receiver transmitter) [Driver_USART1] +// Configuration settings for Driver_USART1 in component ::CMSIS Driver:USART +#define RTE_USART1 0 + + +// USART2 (Universal synchronous asynchronous receiver transmitter) [Driver_USART2] +// Configuration settings for Driver_USART2 in component ::CMSIS Driver:USART +#define RTE_UART2 0 + + +// USART3 (Universal synchronous asynchronous receiver transmitter) [Driver_USART3] +// Configuration settings for Driver_USART3 in component ::CMSIS Driver:USART +#define RTE_UART3 0 + +#endif /* __RTE_DEVICE_H */ diff --git a/platform/cmsis/RTE/Device/CMSDK_CM7_SP/RTE_Device.h.base@1.0.0 b/platform/cmsis/RTE/Device/CMSDK_CM7_SP/RTE_Device.h.base@1.0.0 new file mode 100644 index 0000000..786b74f --- /dev/null +++ b/platform/cmsis/RTE/Device/CMSDK_CM7_SP/RTE_Device.h.base@1.0.0 @@ -0,0 +1,50 @@ +/* ----------------------------------------------------------------------------- + * Copyright (c) 2016 ARM Ltd. + * + * This software is provided 'as-is', without any express or implied warranty. + * In no event will the authors be held liable for any damages arising from + * the use of this software. Permission is granted to anyone to use this + * software for any purpose, including commercial applications, and to alter + * it and redistribute it freely, subject to the following restrictions: + * + * 1. The origin of this software must not be misrepresented; you must not + * claim that you wrote the original software. If you use this software in + * a product, an acknowledgment in the product documentation would be + * appreciated but is not required. + * + * 2. Altered source versions must be plainly marked as such, and must not be + * misrepresented as being the original software. + * + * 3. This notice may not be removed or altered from any source distribution. + * + * $Date: 25. April 2016 + * $Revision: V1.0.0 + * + * Project: RTE Device Configuration for ARM CMSDK_CM device + * -------------------------------------------------------------------------- */ + +//-------- <<< Use Configuration Wizard in Context Menu >>> -------------------- + +#ifndef __RTE_DEVICE_H +#define __RTE_DEVICE_H + +// USART0 (Universal synchronous asynchronous receiver transmitter) [Driver_USART0] +// Configuration settings for Driver_USART0 in component ::CMSIS Driver:USART +#define RTE_USART0 0 + + +// USART1 (Universal synchronous asynchronous receiver transmitter) [Driver_USART1] +// Configuration settings for Driver_USART1 in component ::CMSIS Driver:USART +#define RTE_USART1 0 + + +// USART2 (Universal synchronous asynchronous receiver transmitter) [Driver_USART2] +// Configuration settings for Driver_USART2 in component ::CMSIS Driver:USART +#define RTE_UART2 0 + + +// USART3 (Universal synchronous asynchronous receiver transmitter) [Driver_USART3] +// Configuration settings for Driver_USART3 in component ::CMSIS Driver:USART +#define RTE_UART3 0 + +#endif /* __RTE_DEVICE_H */ diff --git a/platform/cmsis/RTE/Device/CMSDK_CM7_SP/ac6_arm.sct b/platform/cmsis/RTE/Device/CMSDK_CM7_SP/ac6_arm.sct new file mode 100755 index 0000000..94e08f3 --- /dev/null +++ b/platform/cmsis/RTE/Device/CMSDK_CM7_SP/ac6_arm.sct @@ -0,0 +1,87 @@ +#! armclang -E --target=arm-arm-none-eabi -mcpu=cortex-m7 -xc +; command above MUST be in first line (no comment above!) + +/* +;-------- <<< Use Configuration Wizard in Context Menu >>> ------------------- +*/ + +/*--------------------- Flash Configuration ---------------------------------- +; Flash Configuration +; Flash Base Address <0x0-0xFFFFFFFF:8> +; Flash Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + *----------------------------------------------------------------------------*/ +#define __ROM_BASE 0x00000000 +#define __ROM_SIZE 0x00080000 + +/*--------------------- Embedded RAM Configuration --------------------------- +; RAM Configuration +; RAM Base Address <0x0-0xFFFFFFFF:8> +; RAM Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + *----------------------------------------------------------------------------*/ +#define __RAM_BASE 0x20000000 +#define __RAM_SIZE 0x00080000 + +/*--------------------- Stack / Heap Configuration --------------------------- +; Stack / Heap Configuration +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + *----------------------------------------------------------------------------*/ +#define __STACK_SIZE 0x00010000 +#define __HEAP_SIZE 0x00040000 + +/* +;------------- <<< end of configuration section >>> --------------------------- +*/ + + +/*---------------------------------------------------------------------------- + User Stack & Heap boundary definition + *----------------------------------------------------------------------------*/ +#define __STACK_TOP (__RAM_BASE + __RAM_SIZE) /* starts at end of RAM */ +#define __HEAP_BASE (AlignExpr(+0, 8)) /* starts after RW_RAM section, 8 byte aligned */ + + +/*---------------------------------------------------------------------------- + Scatter File Definitions definition + *----------------------------------------------------------------------------*/ +#define __RO_BASE __ROM_BASE +#define __RO_SIZE __ROM_SIZE + +#define __RW_BASE __RAM_BASE +#define __RW_SIZE (__RAM_SIZE - __STACK_SIZE - __HEAP_SIZE) + + +LR_ROM __RO_BASE __RO_SIZE { ; load region size_region + ER_ROM __RO_BASE __RO_SIZE { ; load address = execution address + *.o (RESET, +First) + *(InRoot$$Sections) + .ANY (+RO) + .ANY (+XO) + /* different test vectors */ + th_api.o + abf_f32_expected.o + abf_f32_input_ch1.o + abf_f32_input_ch2.o + aec_f32_expected.o + aec_f32_input_echo.o + aec_f32_input_source.o + kws_expected.o + kws_input.o + mfcc_f32_all.o + } + + RW_RAM __RW_BASE __RW_SIZE { ; RW data + .ANY (+RW +ZI +RO-DATA) + } + +#if __HEAP_SIZE > 0 + ARM_LIB_HEAP __HEAP_BASE EMPTY __HEAP_SIZE { ; Reserve empty region for heap + } +#endif + + ARM_LIB_STACK __STACK_TOP EMPTY -__STACK_SIZE { ; Reserve empty region for stack + } +} diff --git a/platform/cmsis/RTE/Device/CMSDK_CM7_SP/ac6_arm.sct.base@1.0.0 b/platform/cmsis/RTE/Device/CMSDK_CM7_SP/ac6_arm.sct.base@1.0.0 new file mode 100644 index 0000000..9e1bb7d --- /dev/null +++ b/platform/cmsis/RTE/Device/CMSDK_CM7_SP/ac6_arm.sct.base@1.0.0 @@ -0,0 +1,76 @@ +#! armclang -E --target=arm-arm-none-eabi -mcpu=cortex-m7 -xc +; command above MUST be in first line (no comment above!) + +/* +;-------- <<< Use Configuration Wizard in Context Menu >>> ------------------- +*/ + +/*--------------------- Flash Configuration ---------------------------------- +; Flash Configuration +; Flash Base Address <0x0-0xFFFFFFFF:8> +; Flash Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + *----------------------------------------------------------------------------*/ +#define __ROM_BASE 0x00000000 +#define __ROM_SIZE 0x00080000 + +/*--------------------- Embedded RAM Configuration --------------------------- +; RAM Configuration +; RAM Base Address <0x0-0xFFFFFFFF:8> +; RAM Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + *----------------------------------------------------------------------------*/ +#define __RAM_BASE 0x20000000 +#define __RAM_SIZE 0x00040000 + +/*--------------------- Stack / Heap Configuration --------------------------- +; Stack / Heap Configuration +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + *----------------------------------------------------------------------------*/ +#define __STACK_SIZE 0x00000200 +#define __HEAP_SIZE 0x00000C00 + +/* +;------------- <<< end of configuration section >>> --------------------------- +*/ + + +/*---------------------------------------------------------------------------- + User Stack & Heap boundary definition + *----------------------------------------------------------------------------*/ +#define __STACK_TOP (__RAM_BASE + __RAM_SIZE) /* starts at end of RAM */ +#define __HEAP_BASE (AlignExpr(+0, 8)) /* starts after RW_RAM section, 8 byte aligned */ + + +/*---------------------------------------------------------------------------- + Scatter File Definitions definition + *----------------------------------------------------------------------------*/ +#define __RO_BASE __ROM_BASE +#define __RO_SIZE __ROM_SIZE + +#define __RW_BASE __RAM_BASE +#define __RW_SIZE (__RAM_SIZE - __STACK_SIZE - __HEAP_SIZE) + + +LR_ROM __RO_BASE __RO_SIZE { ; load region size_region + ER_ROM __RO_BASE __RO_SIZE { ; load address = execution address + *.o (RESET, +First) + *(InRoot$$Sections) + .ANY (+RO) + .ANY (+XO) + } + + RW_RAM __RW_BASE __RW_SIZE { ; RW data + .ANY (+RW +ZI) + } + +#if __HEAP_SIZE > 0 + ARM_LIB_HEAP __HEAP_BASE EMPTY __HEAP_SIZE { ; Reserve empty region for heap + } +#endif + + ARM_LIB_STACK __STACK_TOP EMPTY -__STACK_SIZE { ; Reserve empty region for stack + } +} diff --git a/platform/cmsis/RTE/Device/CMSDK_CM7_SP/startup_CMSDK_CM7.c b/platform/cmsis/RTE/Device/CMSDK_CM7_SP/startup_CMSDK_CM7.c new file mode 100755 index 0000000..02f2aff --- /dev/null +++ b/platform/cmsis/RTE/Device/CMSDK_CM7_SP/startup_CMSDK_CM7.c @@ -0,0 +1,425 @@ +/****************************************************************************** + * @file startup_CMSDK_CM7.c + * @brief CMSIS Startup File for CMSDK_M7 Device + ******************************************************************************/ +/* Copyright (c) 2022 ARM LIMITED + + All rights reserved. + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + - Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + - Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + - Neither the name of ARM nor the names of its contributors may be used + to endorse or promote products derived from this software without + specific prior written permission. + * + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. + ---------------------------------------------------------------------------*/ + +#if defined (CMSDK_CM7) || defined (CMSDK_CM7_VHT) + #include "CMSDK_CM7.h" +#elif defined (CMSDK_CM7_SP) || defined (CMSDK_CM7_SP_VHT) + #include "CMSDK_CM7_SP.h" +#elif defined (CMSDK_CM7_DP) || defined (CMSDK_CM7_DP_VHT) + #include "CMSDK_CM7_DP.h" +#else + #error device not specified! +#endif + +/*---------------------------------------------------------------------------- + External References + *----------------------------------------------------------------------------*/ +extern uint32_t __INITIAL_SP; + +extern __NO_RETURN void __PROGRAM_START(void); + +/*---------------------------------------------------------------------------- + Internal References + *----------------------------------------------------------------------------*/ +__NO_RETURN void Reset_Handler (void); + void Default_Handler(void); + +/*---------------------------------------------------------------------------- + Exception / Interrupt Handler + *----------------------------------------------------------------------------*/ +/* Exceptions */ +void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void HardFault_Handler (void) __attribute__ ((weak)); +void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); + +/* Interrupts */ +void UART0RX_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART0TX_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART1RX_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART1TX_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART2RX_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART2TX_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0ALL_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO1ALL_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void TIMER0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void TIMER1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void DUALTIMER_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void SPI_0_1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART_0_1_2_OVF_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void ETHERNET_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void I2S_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void TOUCHSCREEN_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART3RX_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART3TX_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART4RX_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART4TX_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void SPI_2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void SPI_3_4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +#if defined CMSDK_CM7_VHT || defined CMSDK_CM7_SP_VHT || defined CMSDK_CM7_DP_VHT +void ARM_VSI0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void ARM_VSI1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void ARM_VSI2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void ARM_VSI3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void ARM_VSI4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void ARM_VSI5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void ARM_VSI6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void ARM_VSI7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +#endif + + +/*---------------------------------------------------------------------------- + Exception / Interrupt Vector table + *----------------------------------------------------------------------------*/ + +#if defined ( __GNUC__ ) +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wpedantic" +#endif + +extern const VECTOR_TABLE_Type __VECTOR_TABLE[256]; + const VECTOR_TABLE_Type __VECTOR_TABLE[256] __VECTOR_TABLE_ATTRIBUTE = { + (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ + Reset_Handler, /* Reset Handler */ + NMI_Handler, /* -14 NMI Handler */ + HardFault_Handler, /* -13 Hard Fault Handler */ + MemManage_Handler, /* -12 MPU Fault Handler */ + BusFault_Handler, /* -11 Bus Fault Handler */ + UsageFault_Handler, /* -10 Usage Fault Handler */ + 0, /* Reserved */ + 0, /* Reserved */ + 0, /* Reserved */ + 0, /* Reserved */ + SVC_Handler, /* -5 SVC Handler */ + DebugMon_Handler, /* -4 Debug Monitor Handler */ + 0, /* Reserved */ + PendSV_Handler, /* -2 PendSV Handler */ + SysTick_Handler, /* -1 SysTick Handler */ + + /* Interrupts */ + UART0RX_Handler, /* 0 UART 0 receive interrupt */ + UART0TX_Handler, /* 1 UART 0 transmit interrupt */ + UART1RX_Handler, /* 2 UART 1 receive interrupt */ + UART1TX_Handler, /* 3 UART 1 transmit interrupt */ + UART2RX_Handler, /* 4 UART 2 receive interrupt */ + UART2TX_Handler, /* 5 UART 2 transmit interrupt */ + GPIO0ALL_Handler, /* 6 GPIO 0 combined interrupt */ + GPIO1ALL_Handler, /* 7 GPIO 1 combined interrupt */ + TIMER0_Handler, /* 8 Timer 0 interrupt */ + TIMER1_Handler, /* 9 Timer 1 interrupt */ + DUALTIMER_Handler, /* 10 Dual Timer interrupt */ + SPI_0_1_Handler, /* 11 SPI 0, SPI 1 interrupt */ + UART_0_1_2_OVF_Handler, /* 12 UART overflow (0, 1 & 2) interrupt */ + ETHERNET_Handler, /* 13 Ethernet interrupt */ + I2S_Handler, /* 14 Audio I2S interrupt */ + TOUCHSCREEN_Handler, /* 15 Touch Screen interrupt */ + GPIO2_Handler, /* 16 GPIO 2 combined interrupt */ + GPIO3_Handler, /* 17 GPIO 3 combined interrupt */ + UART3RX_Handler, /* 18 UART 3 receive interrupt */ + UART3TX_Handler, /* 19 UART 3 transmit interrupt */ + UART4RX_Handler, /* 20 UART 4 receive interrupt */ + UART4TX_Handler, /* 21 UART 4 transmit interrupt */ + SPI_2_Handler, /* 22 SPI 2 interrupt */ + SPI_3_4_Handler, /* 23 SPI 3, SPI 4 interrupt */ + GPIO0_0_Handler, /* 24 GPIO 0 individual interrupt ( 0) */ + GPIO0_1_Handler, /* 25 GPIO 0 individual interrupt ( 1) */ + GPIO0_2_Handler, /* 26 GPIO 0 individual interrupt ( 2) */ + GPIO0_3_Handler, /* 27 GPIO 0 individual interrupt ( 3) */ + GPIO0_4_Handler, /* 28 GPIO 0 individual interrupt ( 4) */ + GPIO0_5_Handler, /* 29 GPIO 0 individual interrupt ( 5) */ + GPIO0_6_Handler, /* 30 GPIO 0 individual interrupt ( 6) */ + GPIO0_7_Handler, /* 31 GPIO 0 individual interrupt ( 7) */ + 0, /* 32 Reserved */ + 0, /* 33 Reserved */ + 0, /* 34 Reserved */ + 0, /* 35 Reserved */ + 0, /* 36 Reserved */ + 0, /* 37 Reserved */ + 0, /* 38 Reserved */ + 0, /* 39 Reserved */ + 0, /* 40 Reserved */ + 0, /* 41 Reserved */ + 0, /* 42 Reserved */ + 0, /* 43 Reserved */ + 0, /* 44 Reserved */ + 0, /* 45 Reserved */ + 0, /* 46 Reserved */ + 0, /* 47 Reserved */ + 0, /* 48 Reserved */ + 0, /* 49 Reserved */ + 0, /* 50 Reserved */ + 0, /* 51 Reserved */ + 0, /* 52 Reserved */ + 0, /* 53 Reserved */ + 0, /* 54 Reserved */ + 0, /* 55 Reserved */ + 0, /* 56 Reserved */ + 0, /* 57 Reserved */ + 0, /* 58 Reserved */ + 0, /* 59 Reserved */ + 0, /* 60 Reserved */ + 0, /* 61 Reserved */ + 0, /* 62 Reserved */ + 0, /* 63 Reserved */ + 0, /* 64 Reserved */ + 0, /* 65 Reserved */ + 0, /* 66 Reserved */ + 0, /* 67 Reserved */ + 0, /* 68 Reserved */ + 0, /* 69 Reserved */ + 0, /* 70 Reserved */ + 0, /* 71 Reserved */ + 0, /* 72 Reserved */ + 0, /* 73 Reserved */ + 0, /* 74 Reserved */ + 0, /* 75 Reserved */ + 0, /* 76 Reserved */ + 0, /* 77 Reserved */ + 0, /* 78 Reserved */ + 0, /* 79 Reserved */ + 0, /* 80 Reserved */ + 0, /* 81 Reserved */ + 0, /* 82 Reserved */ + 0, /* 83 Reserved */ + 0, /* 84 Reserved */ + 0, /* 85 Reserved */ + 0, /* 86 Reserved */ + 0, /* 87 Reserved */ + 0, /* 88 Reserved */ + 0, /* 89 Reserved */ + 0, /* 90 Reserved */ + 0, /* 91 Reserved */ + 0, /* 92 Reserved */ + 0, /* 93 Reserved */ + 0, /* 94 Reserved */ + 0, /* 95 Reserved */ + 0, /* 96 Reserved */ + 0, /* 97 Reserved */ + 0, /* 98 Reserved */ + 0, /* 99 Reserved */ + 0, /* 100 Reserved */ + 0, /* 101 Reserved */ + 0, /* 102 Reserved */ + 0, /* 103 Reserved */ + 0, /* 104 Reserved */ + 0, /* 105 Reserved */ + 0, /* 106 Reserved */ + 0, /* 107 Reserved */ + 0, /* 108 Reserved */ + 0, /* 109 Reserved */ + 0, /* 110 Reserved */ + 0, /* 111 Reserved */ + 0, /* 112 Reserved */ + 0, /* 113 Reserved */ + 0, /* 114 Reserved */ + 0, /* 115 Reserved */ + 0, /* 116 Reserved */ + 0, /* 117 Reserved */ + 0, /* 118 Reserved */ + 0, /* 119 Reserved */ + 0, /* 120 Reserved */ + 0, /* 121 Reserved */ + 0, /* 122 Reserved */ + 0, /* 123 Reserved */ + 0, /* 124 Reserved */ + 0, /* 125 Reserved */ + 0, /* 126 Reserved */ + 0, /* 127 Reserved */ + 0, /* 128 Reserved */ + 0, /* 129 Reserved */ + 0, /* 130 Reserved */ + 0, /* 131 Reserved */ + 0, /* 132 Reserved */ + 0, /* 133 Reserved */ + 0, /* 134 Reserved */ + 0, /* 135 Reserved */ + 0, /* 136 Reserved */ + 0, /* 137 Reserved */ + 0, /* 138 Reserved */ + 0, /* 139 Reserved */ + 0, /* 140 Reserved */ + 0, /* 141 Reserved */ + 0, /* 142 Reserved */ + 0, /* 143 Reserved */ + 0, /* 144 Reserved */ + 0, /* 145 Reserved */ + 0, /* 146 Reserved */ + 0, /* 147 Reserved */ + 0, /* 148 Reserved */ + 0, /* 149 Reserved */ + 0, /* 150 Reserved */ + 0, /* 151 Reserved */ + 0, /* 152 Reserved */ + 0, /* 153 Reserved */ + 0, /* 154 Reserved */ + 0, /* 155 Reserved */ + 0, /* 156 Reserved */ + 0, /* 157 Reserved */ + 0, /* 158 Reserved */ + 0, /* 159 Reserved */ + 0, /* 160 Reserved */ + 0, /* 161 Reserved */ + 0, /* 162 Reserved */ + 0, /* 163 Reserved */ + 0, /* 164 Reserved */ + 0, /* 165 Reserved */ + 0, /* 166 Reserved */ + 0, /* 167 Reserved */ + 0, /* 168 Reserved */ + 0, /* 169 Reserved */ + 0, /* 170 Reserved */ + 0, /* 171 Reserved */ + 0, /* 172 Reserved */ + 0, /* 173 Reserved */ + 0, /* 174 Reserved */ + 0, /* 175 Reserved */ + 0, /* 176 Reserved */ + 0, /* 177 Reserved */ + 0, /* 178 Reserved */ + 0, /* 179 Reserved */ + 0, /* 180 Reserved */ + 0, /* 181 Reserved */ + 0, /* 182 Reserved */ + 0, /* 183 Reserved */ + 0, /* 184 Reserved */ + 0, /* 185 Reserved */ + 0, /* 186 Reserved */ + 0, /* 187 Reserved */ + 0, /* 188 Reserved */ + 0, /* 189 Reserved */ + 0, /* 190 Reserved */ + 0, /* 191 Reserved */ + 0, /* 192 Reserved */ + 0, /* 193 Reserved */ + 0, /* 194 Reserved */ + 0, /* 195 Reserved */ + 0, /* 196 Reserved */ + 0, /* 197 Reserved */ + 0, /* 198 Reserved */ + 0, /* 199 Reserved */ + 0, /* 200 Reserved */ + 0, /* 201 Reserved */ + 0, /* 202 Reserved */ + 0, /* 203 Reserved */ + 0, /* 204 Reserved */ + 0, /* 205 Reserved */ + 0, /* 206 Reserved */ + 0, /* 207 Reserved */ + 0, /* 208 Reserved */ + 0, /* 209 Reserved */ + 0, /* 210 Reserved */ + 0, /* 211 Reserved */ + 0, /* 212 Reserved */ + 0, /* 213 Reserved */ + 0, /* 214 Reserved */ + 0, /* 215 Reserved */ + 0, /* 216 Reserved */ + 0, /* 217 Reserved */ + 0, /* 218 Reserved */ + 0, /* 219 Reserved */ + 0, /* 220 Reserved */ + 0, /* 221 Reserved */ + 0, /* 222 Reserved */ + 0, /* 223 Reserved */ +#if defined CMSDK_CM7_VHT || defined CMSDK_CM7_SP_VHT || defined CMSDK_CM7_DP_VHT + ARM_VSI0_Handler, /* 224 VSI 0 interrupt */ + ARM_VSI1_Handler, /* 225 VSI 1 interrupt */ + ARM_VSI2_Handler, /* 226 VSI 2 interrupt */ + ARM_VSI3_Handler, /* 227 VSI 3 interrupt */ + ARM_VSI4_Handler, /* 228 VSI 4 interrupt */ + ARM_VSI5_Handler, /* 229 VSI 5 interrupt */ + ARM_VSI6_Handler, /* 230 VSI 6 interrupt */ + ARM_VSI7_Handler /* 231 VSI 7 interrupt */ +#else + 0, /* 224 Reserved */ + 0, /* 225 Reserved */ + 0, /* 226 Reserved */ + 0, /* 227 Reserved */ + 0, /* 228 Reserved */ + 0, /* 229 Reserved */ + 0, /* 230 Reserved */ + 0 /* 231 Reserved */ +#endif +}; + +#if defined ( __GNUC__ ) +#pragma GCC diagnostic pop +#endif + +/*---------------------------------------------------------------------------- + Reset Handler called on controller reset + *----------------------------------------------------------------------------*/ +__NO_RETURN void Reset_Handler(void) +{ + SystemInit(); /* CMSIS System Initialization */ + __PROGRAM_START(); /* Enter PreMain (C library entry point) */ +} + + +#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #pragma clang diagnostic push + #pragma clang diagnostic ignored "-Wmissing-noreturn" +#endif + +/*---------------------------------------------------------------------------- + Hard Fault Handler + *----------------------------------------------------------------------------*/ +void HardFault_Handler(void) +{ + while(1); +} + +/*---------------------------------------------------------------------------- + Default Handler for Exceptions / Interrupts + *----------------------------------------------------------------------------*/ +void Default_Handler(void) +{ + while(1); +} + +#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #pragma clang diagnostic pop +#endif diff --git a/platform/cmsis/RTE/Device/CMSDK_CM7_SP/startup_CMSDK_CM7.c.base@1.1.0 b/platform/cmsis/RTE/Device/CMSDK_CM7_SP/startup_CMSDK_CM7.c.base@1.1.0 new file mode 100644 index 0000000..02f2aff --- /dev/null +++ b/platform/cmsis/RTE/Device/CMSDK_CM7_SP/startup_CMSDK_CM7.c.base@1.1.0 @@ -0,0 +1,425 @@ +/****************************************************************************** + * @file startup_CMSDK_CM7.c + * @brief CMSIS Startup File for CMSDK_M7 Device + ******************************************************************************/ +/* Copyright (c) 2022 ARM LIMITED + + All rights reserved. + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + - Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + - Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + - Neither the name of ARM nor the names of its contributors may be used + to endorse or promote products derived from this software without + specific prior written permission. + * + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. + ---------------------------------------------------------------------------*/ + +#if defined (CMSDK_CM7) || defined (CMSDK_CM7_VHT) + #include "CMSDK_CM7.h" +#elif defined (CMSDK_CM7_SP) || defined (CMSDK_CM7_SP_VHT) + #include "CMSDK_CM7_SP.h" +#elif defined (CMSDK_CM7_DP) || defined (CMSDK_CM7_DP_VHT) + #include "CMSDK_CM7_DP.h" +#else + #error device not specified! +#endif + +/*---------------------------------------------------------------------------- + External References + *----------------------------------------------------------------------------*/ +extern uint32_t __INITIAL_SP; + +extern __NO_RETURN void __PROGRAM_START(void); + +/*---------------------------------------------------------------------------- + Internal References + *----------------------------------------------------------------------------*/ +__NO_RETURN void Reset_Handler (void); + void Default_Handler(void); + +/*---------------------------------------------------------------------------- + Exception / Interrupt Handler + *----------------------------------------------------------------------------*/ +/* Exceptions */ +void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void HardFault_Handler (void) __attribute__ ((weak)); +void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); + +/* Interrupts */ +void UART0RX_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART0TX_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART1RX_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART1TX_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART2RX_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART2TX_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0ALL_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO1ALL_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void TIMER0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void TIMER1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void DUALTIMER_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void SPI_0_1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART_0_1_2_OVF_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void ETHERNET_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void I2S_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void TOUCHSCREEN_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART3RX_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART3TX_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART4RX_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART4TX_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void SPI_2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void SPI_3_4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +#if defined CMSDK_CM7_VHT || defined CMSDK_CM7_SP_VHT || defined CMSDK_CM7_DP_VHT +void ARM_VSI0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void ARM_VSI1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void ARM_VSI2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void ARM_VSI3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void ARM_VSI4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void ARM_VSI5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void ARM_VSI6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void ARM_VSI7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +#endif + + +/*---------------------------------------------------------------------------- + Exception / Interrupt Vector table + *----------------------------------------------------------------------------*/ + +#if defined ( __GNUC__ ) +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wpedantic" +#endif + +extern const VECTOR_TABLE_Type __VECTOR_TABLE[256]; + const VECTOR_TABLE_Type __VECTOR_TABLE[256] __VECTOR_TABLE_ATTRIBUTE = { + (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ + Reset_Handler, /* Reset Handler */ + NMI_Handler, /* -14 NMI Handler */ + HardFault_Handler, /* -13 Hard Fault Handler */ + MemManage_Handler, /* -12 MPU Fault Handler */ + BusFault_Handler, /* -11 Bus Fault Handler */ + UsageFault_Handler, /* -10 Usage Fault Handler */ + 0, /* Reserved */ + 0, /* Reserved */ + 0, /* Reserved */ + 0, /* Reserved */ + SVC_Handler, /* -5 SVC Handler */ + DebugMon_Handler, /* -4 Debug Monitor Handler */ + 0, /* Reserved */ + PendSV_Handler, /* -2 PendSV Handler */ + SysTick_Handler, /* -1 SysTick Handler */ + + /* Interrupts */ + UART0RX_Handler, /* 0 UART 0 receive interrupt */ + UART0TX_Handler, /* 1 UART 0 transmit interrupt */ + UART1RX_Handler, /* 2 UART 1 receive interrupt */ + UART1TX_Handler, /* 3 UART 1 transmit interrupt */ + UART2RX_Handler, /* 4 UART 2 receive interrupt */ + UART2TX_Handler, /* 5 UART 2 transmit interrupt */ + GPIO0ALL_Handler, /* 6 GPIO 0 combined interrupt */ + GPIO1ALL_Handler, /* 7 GPIO 1 combined interrupt */ + TIMER0_Handler, /* 8 Timer 0 interrupt */ + TIMER1_Handler, /* 9 Timer 1 interrupt */ + DUALTIMER_Handler, /* 10 Dual Timer interrupt */ + SPI_0_1_Handler, /* 11 SPI 0, SPI 1 interrupt */ + UART_0_1_2_OVF_Handler, /* 12 UART overflow (0, 1 & 2) interrupt */ + ETHERNET_Handler, /* 13 Ethernet interrupt */ + I2S_Handler, /* 14 Audio I2S interrupt */ + TOUCHSCREEN_Handler, /* 15 Touch Screen interrupt */ + GPIO2_Handler, /* 16 GPIO 2 combined interrupt */ + GPIO3_Handler, /* 17 GPIO 3 combined interrupt */ + UART3RX_Handler, /* 18 UART 3 receive interrupt */ + UART3TX_Handler, /* 19 UART 3 transmit interrupt */ + UART4RX_Handler, /* 20 UART 4 receive interrupt */ + UART4TX_Handler, /* 21 UART 4 transmit interrupt */ + SPI_2_Handler, /* 22 SPI 2 interrupt */ + SPI_3_4_Handler, /* 23 SPI 3, SPI 4 interrupt */ + GPIO0_0_Handler, /* 24 GPIO 0 individual interrupt ( 0) */ + GPIO0_1_Handler, /* 25 GPIO 0 individual interrupt ( 1) */ + GPIO0_2_Handler, /* 26 GPIO 0 individual interrupt ( 2) */ + GPIO0_3_Handler, /* 27 GPIO 0 individual interrupt ( 3) */ + GPIO0_4_Handler, /* 28 GPIO 0 individual interrupt ( 4) */ + GPIO0_5_Handler, /* 29 GPIO 0 individual interrupt ( 5) */ + GPIO0_6_Handler, /* 30 GPIO 0 individual interrupt ( 6) */ + GPIO0_7_Handler, /* 31 GPIO 0 individual interrupt ( 7) */ + 0, /* 32 Reserved */ + 0, /* 33 Reserved */ + 0, /* 34 Reserved */ + 0, /* 35 Reserved */ + 0, /* 36 Reserved */ + 0, /* 37 Reserved */ + 0, /* 38 Reserved */ + 0, /* 39 Reserved */ + 0, /* 40 Reserved */ + 0, /* 41 Reserved */ + 0, /* 42 Reserved */ + 0, /* 43 Reserved */ + 0, /* 44 Reserved */ + 0, /* 45 Reserved */ + 0, /* 46 Reserved */ + 0, /* 47 Reserved */ + 0, /* 48 Reserved */ + 0, /* 49 Reserved */ + 0, /* 50 Reserved */ + 0, /* 51 Reserved */ + 0, /* 52 Reserved */ + 0, /* 53 Reserved */ + 0, /* 54 Reserved */ + 0, /* 55 Reserved */ + 0, /* 56 Reserved */ + 0, /* 57 Reserved */ + 0, /* 58 Reserved */ + 0, /* 59 Reserved */ + 0, /* 60 Reserved */ + 0, /* 61 Reserved */ + 0, /* 62 Reserved */ + 0, /* 63 Reserved */ + 0, /* 64 Reserved */ + 0, /* 65 Reserved */ + 0, /* 66 Reserved */ + 0, /* 67 Reserved */ + 0, /* 68 Reserved */ + 0, /* 69 Reserved */ + 0, /* 70 Reserved */ + 0, /* 71 Reserved */ + 0, /* 72 Reserved */ + 0, /* 73 Reserved */ + 0, /* 74 Reserved */ + 0, /* 75 Reserved */ + 0, /* 76 Reserved */ + 0, /* 77 Reserved */ + 0, /* 78 Reserved */ + 0, /* 79 Reserved */ + 0, /* 80 Reserved */ + 0, /* 81 Reserved */ + 0, /* 82 Reserved */ + 0, /* 83 Reserved */ + 0, /* 84 Reserved */ + 0, /* 85 Reserved */ + 0, /* 86 Reserved */ + 0, /* 87 Reserved */ + 0, /* 88 Reserved */ + 0, /* 89 Reserved */ + 0, /* 90 Reserved */ + 0, /* 91 Reserved */ + 0, /* 92 Reserved */ + 0, /* 93 Reserved */ + 0, /* 94 Reserved */ + 0, /* 95 Reserved */ + 0, /* 96 Reserved */ + 0, /* 97 Reserved */ + 0, /* 98 Reserved */ + 0, /* 99 Reserved */ + 0, /* 100 Reserved */ + 0, /* 101 Reserved */ + 0, /* 102 Reserved */ + 0, /* 103 Reserved */ + 0, /* 104 Reserved */ + 0, /* 105 Reserved */ + 0, /* 106 Reserved */ + 0, /* 107 Reserved */ + 0, /* 108 Reserved */ + 0, /* 109 Reserved */ + 0, /* 110 Reserved */ + 0, /* 111 Reserved */ + 0, /* 112 Reserved */ + 0, /* 113 Reserved */ + 0, /* 114 Reserved */ + 0, /* 115 Reserved */ + 0, /* 116 Reserved */ + 0, /* 117 Reserved */ + 0, /* 118 Reserved */ + 0, /* 119 Reserved */ + 0, /* 120 Reserved */ + 0, /* 121 Reserved */ + 0, /* 122 Reserved */ + 0, /* 123 Reserved */ + 0, /* 124 Reserved */ + 0, /* 125 Reserved */ + 0, /* 126 Reserved */ + 0, /* 127 Reserved */ + 0, /* 128 Reserved */ + 0, /* 129 Reserved */ + 0, /* 130 Reserved */ + 0, /* 131 Reserved */ + 0, /* 132 Reserved */ + 0, /* 133 Reserved */ + 0, /* 134 Reserved */ + 0, /* 135 Reserved */ + 0, /* 136 Reserved */ + 0, /* 137 Reserved */ + 0, /* 138 Reserved */ + 0, /* 139 Reserved */ + 0, /* 140 Reserved */ + 0, /* 141 Reserved */ + 0, /* 142 Reserved */ + 0, /* 143 Reserved */ + 0, /* 144 Reserved */ + 0, /* 145 Reserved */ + 0, /* 146 Reserved */ + 0, /* 147 Reserved */ + 0, /* 148 Reserved */ + 0, /* 149 Reserved */ + 0, /* 150 Reserved */ + 0, /* 151 Reserved */ + 0, /* 152 Reserved */ + 0, /* 153 Reserved */ + 0, /* 154 Reserved */ + 0, /* 155 Reserved */ + 0, /* 156 Reserved */ + 0, /* 157 Reserved */ + 0, /* 158 Reserved */ + 0, /* 159 Reserved */ + 0, /* 160 Reserved */ + 0, /* 161 Reserved */ + 0, /* 162 Reserved */ + 0, /* 163 Reserved */ + 0, /* 164 Reserved */ + 0, /* 165 Reserved */ + 0, /* 166 Reserved */ + 0, /* 167 Reserved */ + 0, /* 168 Reserved */ + 0, /* 169 Reserved */ + 0, /* 170 Reserved */ + 0, /* 171 Reserved */ + 0, /* 172 Reserved */ + 0, /* 173 Reserved */ + 0, /* 174 Reserved */ + 0, /* 175 Reserved */ + 0, /* 176 Reserved */ + 0, /* 177 Reserved */ + 0, /* 178 Reserved */ + 0, /* 179 Reserved */ + 0, /* 180 Reserved */ + 0, /* 181 Reserved */ + 0, /* 182 Reserved */ + 0, /* 183 Reserved */ + 0, /* 184 Reserved */ + 0, /* 185 Reserved */ + 0, /* 186 Reserved */ + 0, /* 187 Reserved */ + 0, /* 188 Reserved */ + 0, /* 189 Reserved */ + 0, /* 190 Reserved */ + 0, /* 191 Reserved */ + 0, /* 192 Reserved */ + 0, /* 193 Reserved */ + 0, /* 194 Reserved */ + 0, /* 195 Reserved */ + 0, /* 196 Reserved */ + 0, /* 197 Reserved */ + 0, /* 198 Reserved */ + 0, /* 199 Reserved */ + 0, /* 200 Reserved */ + 0, /* 201 Reserved */ + 0, /* 202 Reserved */ + 0, /* 203 Reserved */ + 0, /* 204 Reserved */ + 0, /* 205 Reserved */ + 0, /* 206 Reserved */ + 0, /* 207 Reserved */ + 0, /* 208 Reserved */ + 0, /* 209 Reserved */ + 0, /* 210 Reserved */ + 0, /* 211 Reserved */ + 0, /* 212 Reserved */ + 0, /* 213 Reserved */ + 0, /* 214 Reserved */ + 0, /* 215 Reserved */ + 0, /* 216 Reserved */ + 0, /* 217 Reserved */ + 0, /* 218 Reserved */ + 0, /* 219 Reserved */ + 0, /* 220 Reserved */ + 0, /* 221 Reserved */ + 0, /* 222 Reserved */ + 0, /* 223 Reserved */ +#if defined CMSDK_CM7_VHT || defined CMSDK_CM7_SP_VHT || defined CMSDK_CM7_DP_VHT + ARM_VSI0_Handler, /* 224 VSI 0 interrupt */ + ARM_VSI1_Handler, /* 225 VSI 1 interrupt */ + ARM_VSI2_Handler, /* 226 VSI 2 interrupt */ + ARM_VSI3_Handler, /* 227 VSI 3 interrupt */ + ARM_VSI4_Handler, /* 228 VSI 4 interrupt */ + ARM_VSI5_Handler, /* 229 VSI 5 interrupt */ + ARM_VSI6_Handler, /* 230 VSI 6 interrupt */ + ARM_VSI7_Handler /* 231 VSI 7 interrupt */ +#else + 0, /* 224 Reserved */ + 0, /* 225 Reserved */ + 0, /* 226 Reserved */ + 0, /* 227 Reserved */ + 0, /* 228 Reserved */ + 0, /* 229 Reserved */ + 0, /* 230 Reserved */ + 0 /* 231 Reserved */ +#endif +}; + +#if defined ( __GNUC__ ) +#pragma GCC diagnostic pop +#endif + +/*---------------------------------------------------------------------------- + Reset Handler called on controller reset + *----------------------------------------------------------------------------*/ +__NO_RETURN void Reset_Handler(void) +{ + SystemInit(); /* CMSIS System Initialization */ + __PROGRAM_START(); /* Enter PreMain (C library entry point) */ +} + + +#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #pragma clang diagnostic push + #pragma clang diagnostic ignored "-Wmissing-noreturn" +#endif + +/*---------------------------------------------------------------------------- + Hard Fault Handler + *----------------------------------------------------------------------------*/ +void HardFault_Handler(void) +{ + while(1); +} + +/*---------------------------------------------------------------------------- + Default Handler for Exceptions / Interrupts + *----------------------------------------------------------------------------*/ +void Default_Handler(void) +{ + while(1); +} + +#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #pragma clang diagnostic pop +#endif diff --git a/platform/cmsis/RTE/Device/CMSDK_CM7_SP/system_CMSDK_CM7.c b/platform/cmsis/RTE/Device/CMSDK_CM7_SP/system_CMSDK_CM7.c new file mode 100755 index 0000000..fdfec7a --- /dev/null +++ b/platform/cmsis/RTE/Device/CMSDK_CM7_SP/system_CMSDK_CM7.c @@ -0,0 +1,87 @@ +/****************************************************************************** + * @file system_CMSDK_CM7.c + * @brief CMSIS System Source File for CMSDK_CM7 Device + ******************************************************************************/ +/* Copyright (c) 2011 - 2022 ARM LIMITED + + All rights reserved. + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + - Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + - Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + - Neither the name of ARM nor the names of its contributors may be used + to endorse or promote products derived from this software without + specific prior written permission. + * + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. + ---------------------------------------------------------------------------*/ + +#if defined (CMSDK_CM7) || defined (CMSDK_CM7_VHT) + #include "CMSDK_CM7.h" +#elif defined (CMSDK_CM7_SP) || defined (CMSDK_CM7_SP_VHT) + #include "CMSDK_CM7_SP.h" +#elif defined (CMSDK_CM7_DP) || defined (CMSDK_CM7_DP_VHT) + #include "CMSDK_CM7_DP.h" +#else + #error device not specified! +#endif + + +/*---------------------------------------------------------------------------- + Define clocks + *----------------------------------------------------------------------------*/ +#define XTAL (50000000UL) /* Oscillator frequency */ + +#define SYSTEM_CLOCK (XTAL / 2U) + +/*---------------------------------------------------------------------------- + Exception / Interrupt Vector table + *----------------------------------------------------------------------------*/ +extern const VECTOR_TABLE_Type __VECTOR_TABLE[256]; + +/*---------------------------------------------------------------------------- + System Core Clock Variable + *----------------------------------------------------------------------------*/ +uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ + +/*---------------------------------------------------------------------------- + System Core Clock update function + *----------------------------------------------------------------------------*/ +void SystemCoreClockUpdate (void) +{ + SystemCoreClock = SYSTEM_CLOCK; +} + +/*---------------------------------------------------------------------------- + System initialization function + *----------------------------------------------------------------------------*/ +void SystemInit (void) +{ +#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) + SCB->VTOR = (uint32_t) &(__VECTOR_TABLE[0]); +#endif + +#if defined (__FPU_USED) && (__FPU_USED == 1U) + SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */ + (3U << 11U*2U) ); /* enable CP11 Full Access */ +#endif + +#ifdef UNALIGNED_SUPPORT_DISABLE + SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk; +#endif + + SystemCoreClock = SYSTEM_CLOCK; +} diff --git a/platform/cmsis/RTE/Device/CMSDK_CM7_SP/system_CMSDK_CM7.c.base@1.1.0 b/platform/cmsis/RTE/Device/CMSDK_CM7_SP/system_CMSDK_CM7.c.base@1.1.0 new file mode 100644 index 0000000..fdfec7a --- /dev/null +++ b/platform/cmsis/RTE/Device/CMSDK_CM7_SP/system_CMSDK_CM7.c.base@1.1.0 @@ -0,0 +1,87 @@ +/****************************************************************************** + * @file system_CMSDK_CM7.c + * @brief CMSIS System Source File for CMSDK_CM7 Device + ******************************************************************************/ +/* Copyright (c) 2011 - 2022 ARM LIMITED + + All rights reserved. + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + - Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + - Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + - Neither the name of ARM nor the names of its contributors may be used + to endorse or promote products derived from this software without + specific prior written permission. + * + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. + ---------------------------------------------------------------------------*/ + +#if defined (CMSDK_CM7) || defined (CMSDK_CM7_VHT) + #include "CMSDK_CM7.h" +#elif defined (CMSDK_CM7_SP) || defined (CMSDK_CM7_SP_VHT) + #include "CMSDK_CM7_SP.h" +#elif defined (CMSDK_CM7_DP) || defined (CMSDK_CM7_DP_VHT) + #include "CMSDK_CM7_DP.h" +#else + #error device not specified! +#endif + + +/*---------------------------------------------------------------------------- + Define clocks + *----------------------------------------------------------------------------*/ +#define XTAL (50000000UL) /* Oscillator frequency */ + +#define SYSTEM_CLOCK (XTAL / 2U) + +/*---------------------------------------------------------------------------- + Exception / Interrupt Vector table + *----------------------------------------------------------------------------*/ +extern const VECTOR_TABLE_Type __VECTOR_TABLE[256]; + +/*---------------------------------------------------------------------------- + System Core Clock Variable + *----------------------------------------------------------------------------*/ +uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ + +/*---------------------------------------------------------------------------- + System Core Clock update function + *----------------------------------------------------------------------------*/ +void SystemCoreClockUpdate (void) +{ + SystemCoreClock = SYSTEM_CLOCK; +} + +/*---------------------------------------------------------------------------- + System initialization function + *----------------------------------------------------------------------------*/ +void SystemInit (void) +{ +#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) + SCB->VTOR = (uint32_t) &(__VECTOR_TABLE[0]); +#endif + +#if defined (__FPU_USED) && (__FPU_USED == 1U) + SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */ + (3U << 11U*2U) ); /* enable CP11 Full Access */ +#endif + +#ifdef UNALIGNED_SUPPORT_DISABLE + SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk; +#endif + + SystemCoreClock = SYSTEM_CLOCK; +} diff --git a/platform/cmsis/RTE/Device/IOTKit_CM33_FP/RTE_Device.h b/platform/cmsis/RTE/Device/IOTKit_CM33_FP/RTE_Device.h new file mode 100755 index 0000000..1a5c51c --- /dev/null +++ b/platform/cmsis/RTE/Device/IOTKit_CM33_FP/RTE_Device.h @@ -0,0 +1,50 @@ +/* ----------------------------------------------------------------------------- + * Copyright (c) 2016 ARM Ltd. + * + * This software is provided 'as-is', without any express or implied warranty. + * In no event will the authors be held liable for any damages arising from + * the use of this software. Permission is granted to anyone to use this + * software for any purpose, including commercial applications, and to alter + * it and redistribute it freely, subject to the following restrictions: + * + * 1. The origin of this software must not be misrepresented; you must not + * claim that you wrote the original software. If you use this software in + * a product, an acknowledgment in the product documentation would be + * appreciated but is not required. + * + * 2. Altered source versions must be plainly marked as such, and must not be + * misrepresented as being the original software. + * + * 3. This notice may not be removed or altered from any source distribution. + * + * $Date: 25. April 2016 + * $Revision: V1.0.0 + * + * Project: RTE Device Configuration for ARM CMSDK_CM device + * -------------------------------------------------------------------------- */ + +//-------- <<< Use Configuration Wizard in Context Menu >>> -------------------- + +#ifndef __RTE_DEVICE_H +#define __RTE_DEVICE_H + +// USART0 (Universal synchronous asynchronous receiver transmitter) [Driver_USART0] +// Configuration settings for Driver_USART0 in component ::CMSIS Driver:USART +#define RTE_USART0 1 + + +// USART1 (Universal synchronous asynchronous receiver transmitter) [Driver_USART1] +// Configuration settings for Driver_USART1 in component ::CMSIS Driver:USART +#define RTE_USART1 0 + + +// USART2 (Universal synchronous asynchronous receiver transmitter) [Driver_USART2] +// Configuration settings for Driver_USART2 in component ::CMSIS Driver:USART +#define RTE_UART2 0 + + +// USART3 (Universal synchronous asynchronous receiver transmitter) [Driver_USART3] +// Configuration settings for Driver_USART3 in component ::CMSIS Driver:USART +#define RTE_UART3 0 + +#endif /* __RTE_DEVICE_H */ diff --git a/platform/cmsis/RTE/Device/IOTKit_CM33_FP/RTE_Device.h.base@1.0.0 b/platform/cmsis/RTE/Device/IOTKit_CM33_FP/RTE_Device.h.base@1.0.0 new file mode 100644 index 0000000..786b74f --- /dev/null +++ b/platform/cmsis/RTE/Device/IOTKit_CM33_FP/RTE_Device.h.base@1.0.0 @@ -0,0 +1,50 @@ +/* ----------------------------------------------------------------------------- + * Copyright (c) 2016 ARM Ltd. + * + * This software is provided 'as-is', without any express or implied warranty. + * In no event will the authors be held liable for any damages arising from + * the use of this software. Permission is granted to anyone to use this + * software for any purpose, including commercial applications, and to alter + * it and redistribute it freely, subject to the following restrictions: + * + * 1. The origin of this software must not be misrepresented; you must not + * claim that you wrote the original software. If you use this software in + * a product, an acknowledgment in the product documentation would be + * appreciated but is not required. + * + * 2. Altered source versions must be plainly marked as such, and must not be + * misrepresented as being the original software. + * + * 3. This notice may not be removed or altered from any source distribution. + * + * $Date: 25. April 2016 + * $Revision: V1.0.0 + * + * Project: RTE Device Configuration for ARM CMSDK_CM device + * -------------------------------------------------------------------------- */ + +//-------- <<< Use Configuration Wizard in Context Menu >>> -------------------- + +#ifndef __RTE_DEVICE_H +#define __RTE_DEVICE_H + +// USART0 (Universal synchronous asynchronous receiver transmitter) [Driver_USART0] +// Configuration settings for Driver_USART0 in component ::CMSIS Driver:USART +#define RTE_USART0 0 + + +// USART1 (Universal synchronous asynchronous receiver transmitter) [Driver_USART1] +// Configuration settings for Driver_USART1 in component ::CMSIS Driver:USART +#define RTE_USART1 0 + + +// USART2 (Universal synchronous asynchronous receiver transmitter) [Driver_USART2] +// Configuration settings for Driver_USART2 in component ::CMSIS Driver:USART +#define RTE_UART2 0 + + +// USART3 (Universal synchronous asynchronous receiver transmitter) [Driver_USART3] +// Configuration settings for Driver_USART3 in component ::CMSIS Driver:USART +#define RTE_UART3 0 + +#endif /* __RTE_DEVICE_H */ diff --git a/platform/cmsis/RTE/Device/IOTKit_CM33_FP/ac6_arm.sct b/platform/cmsis/RTE/Device/IOTKit_CM33_FP/ac6_arm.sct new file mode 100755 index 0000000..b795690 --- /dev/null +++ b/platform/cmsis/RTE/Device/IOTKit_CM33_FP/ac6_arm.sct @@ -0,0 +1,119 @@ +#! armclang -E --target=arm-arm-none-eabi -mcpu=cortex-m33 -xc +; command above MUST be in first line (no comment above!) + +;Note: Add '-mcmse' to first line if your software model is "Secure Mode". +; #! armclang -E --target=arm-arm-none-eabi -mcpu=cortex-m33 -xc -mcmse + + +/* +;-------- <<< Use Configuration Wizard in Context Menu >>> ------------------- +*/ + +/*--------------------- Flash Configuration ---------------------------------- +; Flash Configuration +; Flash Base Address <0x0-0xFFFFFFFF:8> +; Flash Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + *----------------------------------------------------------------------------*/ +#define __ROM_BASE 0x10000000 +#define __ROM_SIZE 0x00200000 + +/*--------------------- Embedded RAM Configuration --------------------------- +; RAM Configuration +; RAM Base Address <0x0-0xFFFFFFFF:8> +; RAM Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + *----------------------------------------------------------------------------*/ +#define __RAM_BASE 0x38000000 +#define __RAM_SIZE 0x00200000 + +/*--------------------- Stack / Heap Configuration --------------------------- +; Stack / Heap Configuration +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + *----------------------------------------------------------------------------*/ +#define __STACK_SIZE 0x00010000 +#define __HEAP_SIZE 0x00040000 + +/*--------------------- CMSE Venner Configuration --------------------------- +; CMSE Venner Configuration +; CMSE Venner Size (in Bytes) <0x0-0xFFFFFFFF:32> +; + *----------------------------------------------------------------------------*/ +#define __CMSEVENEER_SIZE 0x200 + +/* +;------------- <<< end of configuration section >>> --------------------------- +*/ + + +/*---------------------------------------------------------------------------- + User Stack & Heap boundary definition + *----------------------------------------------------------------------------*/ +#define __STACK_TOP (__RAM_BASE + __RAM_SIZE - __STACKSEAL_SIZE) /* starts at end of RAM - 8 byte stack seal */ +#define __HEAP_BASE (AlignExpr(+0, 8)) /* starts after RW_RAM section, 8 byte aligned */ + +/* ---------------------------------------------------------------------------- + Stack seal size definition + *----------------------------------------------------------------------------*/ +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +#define __STACKSEAL_SIZE ( 8 ) +#else +#define __STACKSEAL_SIZE ( 0 ) +#endif + + +/*---------------------------------------------------------------------------- + Region base & size definition + *----------------------------------------------------------------------------*/ +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +#define __CV_BASE ( __ROM_BASE + __ROM_SIZE - __CMSEVENEER_SIZE ) +#define __CV_SIZE ( __CMSEVENEER_SIZE ) +#else +#define __CV_SIZE ( 0 ) +#endif + +#define __RO_BASE ( __ROM_BASE ) +#define __RO_SIZE ( __ROM_SIZE - __CV_SIZE ) + +#define __RW_BASE ( __RAM_BASE ) +#define __RW_SIZE ( __RAM_SIZE - __STACK_SIZE - __HEAP_SIZE ) + + +/*---------------------------------------------------------------------------- + Scatter Region definition + *----------------------------------------------------------------------------*/ +LR_ROM __RO_BASE __RO_SIZE { ; load region size_region + ER_ROM __RO_BASE __RO_SIZE { ; load address = execution address + *.o (RESET, +First) + *(InRoot$$Sections) + .ANY (+RO) + .ANY (+XO) + } + + RW_RAM __RW_BASE __RW_SIZE { ; RW data + .ANY (+RW +ZI +RO-DATA) + } + +#if __HEAP_SIZE > 0 + ARM_LIB_HEAP __HEAP_BASE EMPTY __HEAP_SIZE { ; Reserve empty region for heap + } +#endif + + ARM_LIB_STACK __STACK_TOP EMPTY -__STACK_SIZE { ; Reserve empty region for stack + } + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) + STACKSEAL +0 EMPTY __STACKSEAL_SIZE { ; Reserve empty region for stack seal immediately after stack + } +#endif +} + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +LR_CMSE_VENEER __CV_BASE ALIGN 32 __CV_SIZE { ; own load/execution region for CMSE Venners + ER_CMSE_VENEER __CV_BASE __CV_SIZE { + *(Veneer$$CMSE) + } +} +#endif diff --git a/platform/cmsis/RTE/Device/IOTKit_CM33_FP/ac6_arm.sct.base@1.0.0 b/platform/cmsis/RTE/Device/IOTKit_CM33_FP/ac6_arm.sct.base@1.0.0 new file mode 100644 index 0000000..2682594 --- /dev/null +++ b/platform/cmsis/RTE/Device/IOTKit_CM33_FP/ac6_arm.sct.base@1.0.0 @@ -0,0 +1,119 @@ +#! armclang -E --target=arm-arm-none-eabi -mcpu=cortex-m33 -xc +; command above MUST be in first line (no comment above!) + +;Note: Add '-mcmse' to first line if your software model is "Secure Mode". +; #! armclang -E --target=arm-arm-none-eabi -mcpu=cortex-m33 -xc -mcmse + + +/* +;-------- <<< Use Configuration Wizard in Context Menu >>> ------------------- +*/ + +/*--------------------- Flash Configuration ---------------------------------- +; Flash Configuration +; Flash Base Address <0x0-0xFFFFFFFF:8> +; Flash Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + *----------------------------------------------------------------------------*/ +#define __ROM_BASE 0x10000000 +#define __ROM_SIZE 0x00200000 + +/*--------------------- Embedded RAM Configuration --------------------------- +; RAM Configuration +; RAM Base Address <0x0-0xFFFFFFFF:8> +; RAM Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + *----------------------------------------------------------------------------*/ +#define __RAM_BASE 0x38000000 +#define __RAM_SIZE 0x00200000 + +/*--------------------- Stack / Heap Configuration --------------------------- +; Stack / Heap Configuration +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + *----------------------------------------------------------------------------*/ +#define __STACK_SIZE 0x00000400 +#define __HEAP_SIZE 0x00000C00 + +/*--------------------- CMSE Venner Configuration --------------------------- +; CMSE Venner Configuration +; CMSE Venner Size (in Bytes) <0x0-0xFFFFFFFF:32> +; + *----------------------------------------------------------------------------*/ +#define __CMSEVENEER_SIZE 0x200 + +/* +;------------- <<< end of configuration section >>> --------------------------- +*/ + + +/*---------------------------------------------------------------------------- + User Stack & Heap boundary definition + *----------------------------------------------------------------------------*/ +#define __STACK_TOP (__RAM_BASE + __RAM_SIZE - __STACKSEAL_SIZE) /* starts at end of RAM - 8 byte stack seal */ +#define __HEAP_BASE (AlignExpr(+0, 8)) /* starts after RW_RAM section, 8 byte aligned */ + +/* ---------------------------------------------------------------------------- + Stack seal size definition + *----------------------------------------------------------------------------*/ +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +#define __STACKSEAL_SIZE ( 8 ) +#else +#define __STACKSEAL_SIZE ( 0 ) +#endif + + +/*---------------------------------------------------------------------------- + Region base & size definition + *----------------------------------------------------------------------------*/ +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +#define __CV_BASE ( __ROM_BASE + __ROM_SIZE - __CMSEVENEER_SIZE ) +#define __CV_SIZE ( __CMSEVENEER_SIZE ) +#else +#define __CV_SIZE ( 0 ) +#endif + +#define __RO_BASE ( __ROM_BASE ) +#define __RO_SIZE ( __ROM_SIZE - __CV_SIZE ) + +#define __RW_BASE ( __RAM_BASE ) +#define __RW_SIZE ( __RAM_SIZE - __STACK_SIZE - __HEAP_SIZE ) + + +/*---------------------------------------------------------------------------- + Scatter Region definition + *----------------------------------------------------------------------------*/ +LR_ROM __RO_BASE __RO_SIZE { ; load region size_region + ER_ROM __RO_BASE __RO_SIZE { ; load address = execution address + *.o (RESET, +First) + *(InRoot$$Sections) + .ANY (+RO) + .ANY (+XO) + } + + RW_RAM __RW_BASE __RW_SIZE { ; RW data + .ANY (+RW +ZI) + } + +#if __HEAP_SIZE > 0 + ARM_LIB_HEAP __HEAP_BASE EMPTY __HEAP_SIZE { ; Reserve empty region for heap + } +#endif + + ARM_LIB_STACK __STACK_TOP EMPTY -__STACK_SIZE { ; Reserve empty region for stack + } + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) + STACKSEAL +0 EMPTY __STACKSEAL_SIZE { ; Reserve empty region for stack seal immediately after stack + } +#endif +} + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +LR_CMSE_VENEER __CV_BASE ALIGN 32 __CV_SIZE { ; own load/execution region for CMSE Venners + ER_CMSE_VENEER __CV_BASE __CV_SIZE { + *(Veneer$$CMSE) + } +} +#endif diff --git a/platform/cmsis/RTE/Device/IOTKit_CM33_FP/partition_IOTKit_CM33.h b/platform/cmsis/RTE/Device/IOTKit_CM33_FP/partition_IOTKit_CM33.h new file mode 100755 index 0000000..45cb6ed --- /dev/null +++ b/platform/cmsis/RTE/Device/IOTKit_CM33_FP/partition_IOTKit_CM33.h @@ -0,0 +1,637 @@ +/****************************************************************************** + * @file partition_IOTKit_CM33.h + * @brief CMSIS-Core Initial Setup for Secure / Non-Secure Zones for IOTKit_CM33 + ******************************************************************************/ +/* Copyright (c) 2015 - 2022 ARM LIMITED + + All rights reserved. + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + - Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + - Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + - Neither the name of ARM nor the names of its contributors may be used + to endorse or promote products derived from this software without + specific prior written permission. + * + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. + ---------------------------------------------------------------------------*/ + +#ifndef PARTITION_IOTKit_CM33_H +#define PARTITION_IOTKit_CM33_H + +/* +//-------- <<< Use Configuration Wizard in Context Menu >>> ----------------- +*/ + +/* +// Initialize Security Attribution Unit (SAU) CTRL register +*/ +#define SAU_INIT_CTRL 1 + +/* +// Enable SAU +// Value for SAU->CTRL register bit ENABLE +*/ +#define SAU_INIT_CTRL_ENABLE 1 + +/* +// When SAU is disabled +// <0=> All Memory is Secure +// <1=> All Memory is Non-Secure +// Value for SAU->CTRL register bit ALLNS +// When all Memory is Non-Secure (ALLNS is 1), IDAU can override memory map configuration. +*/ +#define SAU_INIT_CTRL_ALLNS 0 + +/* +// +*/ + +/* +// Initialize Security Attribution Unit (SAU) Address Regions +// SAU configuration specifies regions to be one of: +// - Secure and Non-Secure Callable +// - Non-Secure +// Note: All memory regions not configured by SAU are Secure +*/ +#define SAU_REGIONS_MAX 8 /* Max. number of SAU regions */ + +/* +// Initialize SAU Region 0 +// Setup SAU Region 0 memory attributes +*/ +#define SAU_INIT_REGION0 1 + +/* +// Start Address <0-0xFFFFFFE0> +*/ +#define SAU_INIT_START0 0x10000000 /* start address of SAU region 0 */ + +/* +// End Address <0x1F-0xFFFFFFFF> +*/ +#define SAU_INIT_END0 0x101FFFFF /* end address of SAU region 0 */ + +/* +// Region is +// <0=>Non-Secure +// <1=>Secure, Non-Secure Callable +*/ +#define SAU_INIT_NSC0 1 +/* +// +*/ + +/* +// Initialize SAU Region 1 +// Setup SAU Region 1 memory attributes +*/ +#define SAU_INIT_REGION1 1 + +/* +// Start Address <0-0xFFFFFFE0> +*/ +#define SAU_INIT_START1 0x00200000 + +/* +// End Address <0x1F-0xFFFFFFFF> +*/ +#define SAU_INIT_END1 0x003FFFFF + +/* +// Region is +// <0=>Non-Secure +// <1=>Secure, Non-Secure Callable +*/ +#define SAU_INIT_NSC1 0 +/* +// +*/ + +/* +// Initialize SAU Region 2 +// Setup SAU Region 2 memory attributes +*/ +#define SAU_INIT_REGION2 1 + +/* +// Start Address <0-0xFFFFFFE0> +*/ +#define SAU_INIT_START2 0x28200000 + +/* +// End Address <0x1F-0xFFFFFFFF> +*/ +#define SAU_INIT_END2 0x283FFFFF + +/* +// Region is +// <0=>Non-Secure +// <1=>Secure, Non-Secure Callable +*/ +#define SAU_INIT_NSC2 0 +/* +// +*/ + +/* +// Initialize SAU Region 3 +// Setup SAU Region 3 memory attributes +*/ +#define SAU_INIT_REGION3 1 + +/* +// Start Address <0-0xFFFFFFE0> +*/ +#define SAU_INIT_START3 0x40000000 + +/* +// End Address <0x1F-0xFFFFFFFF> +*/ +#define SAU_INIT_END3 0x403FFFFF + +/* +// Region is +// <0=>Non-Secure +// <1=>Secure, Non-Secure Callable +*/ +#define SAU_INIT_NSC3 0 +/* +// +*/ + +/* +// Initialize SAU Region 4 +// Setup SAU Region 4 memory attributes +*/ +#define SAU_INIT_REGION4 0 + +/* +// Start Address <0-0xFFFFFFE0> +*/ +#define SAU_INIT_START4 0x00000000 /* start address of SAU region 4 */ + +/* +// End Address <0x1F-0xFFFFFFFF> +*/ +#define SAU_INIT_END4 0x00000000 /* end address of SAU region 4 */ + +/* +// Region is +// <0=>Non-Secure +// <1=>Secure, Non-Secure Callable +*/ +#define SAU_INIT_NSC4 0 +/* +// +*/ + +/* +// Initialize SAU Region 5 +// Setup SAU Region 5 memory attributes +*/ +#define SAU_INIT_REGION5 0 + +/* +// Start Address <0-0xFFFFFFE0> +*/ +#define SAU_INIT_START5 0x00000000 + +/* +// End Address <0x1F-0xFFFFFFFF> +*/ +#define SAU_INIT_END5 0x00000000 + +/* +// Region is +// <0=>Non-Secure +// <1=>Secure, Non-Secure Callable +*/ +#define SAU_INIT_NSC5 0 +/* +// +*/ + +/* +// Initialize SAU Region 6 +// Setup SAU Region 6 memory attributes +*/ +#define SAU_INIT_REGION6 0 + +/* +// Start Address <0-0xFFFFFFE0> +*/ +#define SAU_INIT_START6 0x00000000 + +/* +// End Address <0x1F-0xFFFFFFFF> +*/ +#define SAU_INIT_END6 0x00000000 + +/* +// Region is +// <0=>Non-Secure +// <1=>Secure, Non-Secure Callable +*/ +#define SAU_INIT_NSC6 0 +/* +// +*/ + +/* +// Initialize SAU Region 7 +// Setup SAU Region 7 memory attributes +*/ +#define SAU_INIT_REGION7 0 + +/* +// Start Address <0-0xFFFFFFE0> +*/ +#define SAU_INIT_START7 0x00000000 + +/* +// End Address <0x1F-0xFFFFFFFF> +*/ +#define SAU_INIT_END7 0x00000000 + +/* +// Region is +// <0=>Non-Secure +// <1=>Secure, Non-Secure Callable +*/ +#define SAU_INIT_NSC7 0 +/* +// +*/ + +/* +// +*/ + +/* +// Setup behaviour of Sleep and Exception Handling +*/ +#define SCB_CSR_AIRCR_INIT 1 + +/* +// Deep Sleep can be enabled by +// <0=>Secure and Non-Secure state +// <1=>Secure state only +// Value for SCB->CSR register bit DEEPSLEEPS +*/ +#define SCB_CSR_DEEPSLEEPS_VAL 1 + +/* +// System reset request accessible from +// <0=> Secure and Non-Secure state +// <1=> Secure state only +// Value for SCB->AIRCR register bit SYSRESETREQS +*/ +#define SCB_AIRCR_SYSRESETREQS_VAL 0 + +/* +// Priority of Non-Secure exceptions is +// <0=> Not altered +// <1=> Lowered to 0x80-0xFF +// Value for SCB->AIRCR register bit PRIS +*/ +#define SCB_AIRCR_PRIS_VAL 1 + +/* +// BusFault, HardFault, and NMI target +// <0=> Secure state +// <1=> Non-Secure state +// Value for SCB->AIRCR register bit BFHFNMINS +*/ +#define SCB_AIRCR_BFHFNMINS_VAL 0 + +/* +// +*/ + +/* +// Setup behaviour of Floating Point Unit +*/ +#define TZ_FPU_NS_USAGE 1 + +/* +// Floating Point Unit usage +// <0=> Secure state only +// <3=> Secure and Non-Secure state +// Value for SCB->NSACR register bits CP10, CP11 +*/ +#define SCB_NSACR_CP10_11_VAL 3 + +/* +// Treat floating-point registers as Secure +// <0=> Disabled +// <1=> Enabled +// Value for FPU->FPCCR register bit TS +*/ +#define FPU_FPCCR_TS_VAL 0 + +/* +// Clear on return (CLRONRET) accessibility +// <0=> Secure and Non-Secure state +// <1=> Secure state only +// Value for FPU->FPCCR register bit CLRONRETS +*/ +#define FPU_FPCCR_CLRONRETS_VAL 0 + +/* +// Clear floating-point caller saved registers on exception return +// <0=> Disabled +// <1=> Enabled +// Value for FPU->FPCCR register bit CLRONRET +*/ +#define FPU_FPCCR_CLRONRET_VAL 1 + +/* +// +*/ + +/* +// Setup Interrupt Target +*/ + +/* +// Initialize ITNS 0 (Interrupts 0..31) +*/ +#define NVIC_INIT_ITNS0 0 + +/* +// Interrupts 0..31 +// Non-Secure Watchdog Reset Request <0=> Secure state <1=> Non-Secure state +// Non-Secure Watchdog interrupt <0=> Secure state <1=> Non-Secure state +// S32K Timer interrupt <0=> Secure state <1=> Non-Secure state +// Timer 0 interrupt <0=> Secure state <1=> Non-Secure state +// Timer 1 interrupt <0=> Secure state <1=> Non-Secure state +// Dual Timer interrupt <0=> Secure state <1=> Non-Secure state +*/ +#define NVIC_INIT_ITNS0_VAL 0x00000000 + +/* +// +*/ + +/* +// Initialize ITNS 1 (Interrupts 32..63) +*/ +#define NVIC_INIT_ITNS1 0 + +/* +// Interrupts 32..63 +// UART 0 receive interrupt <0=> Secure state <1=> Non-Secure state +// UART 0 transmit interrupt <0=> Secure state <1=> Non-Secure state +// UART 1 receive interrupt <0=> Secure state <1=> Non-Secure state +// UART 1 transmit interrupt <0=> Secure state <1=> Non-Secure state +// UART 2 teceive interrupt <0=> Secure state <1=> Non-Secure state +// UART 2 transmit interrupt <0=> Secure state <1=> Non-Secure state +// UART 3 receive interrupt <0=> Secure state <1=> Non-Secure state +// UART 3 transmit interrupt <0=> Secure state <1=> Non-Secure state +// UART 4 receive interrupt <0=> Secure state <1=> Non-Secure state +// UART 4 transmit interrupt <0=> Secure state <1=> Non-Secure state +// UART 0 combined interrupt <0=> Secure state <1=> Non-Secure state +// UART 1 combined interrupt <0=> Secure state <1=> Non-Secure state +// UART 2 combined interrupt <0=> Secure state <1=> Non-Secure state +// UART 3 combined interrupt <0=> Secure state <1=> Non-Secure state +// UART 4 combined interrupt <0=> Secure state <1=> Non-Secure state +// UART 0, 1, 2, 3, 4 overflow interrupt <0=> Secure state <1=> Non-Secure state +// Ethernet interrupt <0=> Secure state <1=> Non-Secure state +// Audio I2S interrupt <0=> Secure state <1=> Non-Secure state +// Touch Screen interrupt <0=> Secure state <1=> Non-Secure state +// SPI 0 (SPI Header) interrupt <0=> Secure state <1=> Non-Secure state +// SPI 1 (CLCD) interrupt <0=> Secure state <1=> Non-Secure state +// SPI 2 (Shield ADC) interrupt <0=> Secure state <1=> Non-Secure state +// SPI 3 (Shield 0 SPI) interrupt <0=> Secure state <1=> Non-Secure state +// SPI 4 (Shield 1 SPI) interrupt <0=> Secure state <1=> Non-Secure state +// DMA 0 error interrupt <0=> Secure state <1=> Non-Secure state +// DMA 0 terminal count interrupt <0=> Secure state <1=> Non-Secure state +// DMA 0 combined interrupt <0=> Secure state <1=> Non-Secure state +// DMA 1 error interrupt <0=> Secure state <1=> Non-Secure state +// DMA 1 terminal count interrupt <0=> Secure state <1=> Non-Secure state +// DMA 1 combined interrupt <0=> Secure state <1=> Non-Secure state +// DMA 2 error interrupt <0=> Secure state <1=> Non-Secure state +// DMA 2 terminal count interrupt <0=> Secure state <1=> Non-Secure state +*/ +#define NVIC_INIT_ITNS1_VAL 0x00000000 + +/* +// +*/ + +/* +// Initialize ITNS 2 (Interrupts 64..95) +*/ +#define NVIC_INIT_ITNS2 0 + +/* +// Interrupts 64..95 +// DMA 2 combined interrupt <0=> Secure state <1=> Non-Secure state +// DMA 3 error interrupt <0=> Secure state <1=> Non-Secure state +// DMA 3 terminal count interrupt <0=> Secure state <1=> Non-Secure state +// DMA 3 combined interrupt <0=> Secure state <1=> Non-Secure state +// GPIO 0 combined interrupt <0=> Secure state <1=> Non-Secure state +// GPIO 1 combined interrupt <0=> Secure state <1=> Non-Secure state +// GPIO 2 combined interrupt <0=> Secure state <1=> Non-Secure state +// GPIO 3 combined interrupt <0=> Secure state <1=> Non-Secure state +// GPIO 0 individual interrupt ( 0) <0=> Secure state <1=> Non-Secure state +// GPIO 0 individual interrupt ( 1) <0=> Secure state <1=> Non-Secure state +// GPIO 0 individual interrupt ( 2) <0=> Secure state <1=> Non-Secure state +// GPIO 0 individual interrupt ( 3) <0=> Secure state <1=> Non-Secure state +// GPIO 0 individual interrupt ( 4) <0=> Secure state <1=> Non-Secure state +// GPIO 0 individual interrupt ( 5) <0=> Secure state <1=> Non-Secure state +// GPIO 0 individual interrupt ( 6) <0=> Secure state <1=> Non-Secure state +// GPIO 0 individual interrupt ( 7) <0=> Secure state <1=> Non-Secure state +// GPIO 0 individual interrupt ( 8) <0=> Secure state <1=> Non-Secure state +// GPIO 0 individual interrupt ( 9) <0=> Secure state <1=> Non-Secure state +// GPIO 0 individual interrupt (10) <0=> Secure state <1=> Non-Secure state +// GPIO 0 individual interrupt (11) <0=> Secure state <1=> Non-Secure state +// GPIO 0 individual interrupt (12) <0=> Secure state <1=> Non-Secure state +// GPIO 0 individual interrupt (13) <0=> Secure state <1=> Non-Secure state +// GPIO 0 individual interrupt (14) <0=> Secure state <1=> Non-Secure state +// GPIO 0 individual interrupt (15) <0=> Secure state <1=> Non-Secure state +// GPIO 1 individual interrupt ( 0) <0=> Secure state <1=> Non-Secure state +// GPIO 1 individual interrupt ( 1) <0=> Secure state <1=> Non-Secure state +// GPIO 1 individual interrupt ( 2) <0=> Secure state <1=> Non-Secure state +// GPIO 1 individual interrupt ( 3) <0=> Secure state <1=> Non-Secure state +// GPIO 1 individual interrupt ( 4) <0=> Secure state <1=> Non-Secure state +// GPIO 1 individual interrupt ( 5) <0=> Secure state <1=> Non-Secure state +// GPIO 1 individual interrupt ( 6) <0=> Secure state <1=> Non-Secure state +// GPIO 1 individual interrupt ( 7) <0=> Secure state <1=> Non-Secure state +*/ +#define NVIC_INIT_ITNS2_VAL 0x00000000 + +/* +// +*/ + +/* +// Initialize ITNS 3 (Interrupts 96..127) +*/ +#define NVIC_INIT_ITNS3 0 + +/* +// Interrupts 96..127 +// GPIO 1 individual interrupt ( 8) <0=> Secure state <1=> Non-Secure state +// GPIO 1 individual interrupt ( 9) <0=> Secure state <1=> Non-Secure state +// GPIO 1 individual interrupt (10) <0=> Secure state <1=> Non-Secure state +// GPIO 1 individual interrupt (11) <0=> Secure state <1=> Non-Secure state +// GPIO 1 individual interrupt (12) <0=> Secure state <1=> Non-Secure state +// GPIO 1 individual interrupt (13) <0=> Secure state <1=> Non-Secure state +// GPIO 1 individual interrupt (14) <0=> Secure state <1=> Non-Secure state +// GPIO 1 individual interrupt (15) <0=> Secure state <1=> Non-Secure state +// GPIO 2 individual interrupt ( 0) <0=> Secure state <1=> Non-Secure state +// GPIO 2 individual interrupt ( 1) <0=> Secure state <1=> Non-Secure state +// GPIO 2 individual interrupt ( 2) <0=> Secure state <1=> Non-Secure state +// GPIO 2 individual interrupt ( 3) <0=> Secure state <1=> Non-Secure state +// GPIO 2 individual interrupt ( 4) <0=> Secure state <1=> Non-Secure state +// GPIO 2 individual interrupt ( 5) <0=> Secure state <1=> Non-Secure state +// GPIO 2 individual interrupt ( 6) <0=> Secure state <1=> Non-Secure state +// GPIO 2 individual interrupt ( 7) <0=> Secure state <1=> Non-Secure state +// GPIO 2 individual interrupt ( 8) <0=> Secure state <1=> Non-Secure state +// GPIO 2 individual interrupt ( 9) <0=> Secure state <1=> Non-Secure state +// GPIO 2 individual interrupt (10) <0=> Secure state <1=> Non-Secure state +// GPIO 2 individual interrupt (11) <0=> Secure state <1=> Non-Secure state +// GPIO 2 individual interrupt (12) <0=> Secure state <1=> Non-Secure state +// GPIO 2 individual interrupt (13) <0=> Secure state <1=> Non-Secure state +// GPIO 2 individual interrupt (14) <0=> Secure state <1=> Non-Secure state +// GPIO 2 individual interrupt (15) <0=> Secure state <1=> Non-Secure state +// GPIO 3 individual interrupt ( 0) <0=> Secure state <1=> Non-Secure state +// GPIO 3 individual interrupt ( 1) <0=> Secure state <1=> Non-Secure state +// GPIO 3 individual interrupt ( 2) <0=> Secure state <1=> Non-Secure state +// GPIO 3 individual interrupt ( 3) <0=> Secure state <1=> Non-Secure state +*/ +#define NVIC_INIT_ITNS3_VAL 0x00000000 + +/* +// +*/ + +/* +// +*/ + + + +/* + max 128 SAU regions. + SAU regions are defined in partition.h + */ + +#define SAU_INIT_REGION(n) \ + SAU->RNR = (n & SAU_RNR_REGION_Msk); \ + SAU->RBAR = (SAU_INIT_START##n & SAU_RBAR_BADDR_Msk); \ + SAU->RLAR = (SAU_INIT_END##n & SAU_RLAR_LADDR_Msk) | \ + ((SAU_INIT_NSC##n << SAU_RLAR_NSC_Pos) & SAU_RLAR_NSC_Msk) | 1U + +/** + \brief Setup a SAU Region + \details Writes the region information contained in SAU_Region to the + registers SAU_RNR, SAU_RBAR, and SAU_RLAR + */ +__STATIC_INLINE void TZ_SAU_Setup (void) +{ + +#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) + + #if defined (SAU_INIT_REGION0) && (SAU_INIT_REGION0 == 1U) + SAU_INIT_REGION(0); + #endif + + #if defined (SAU_INIT_REGION1) && (SAU_INIT_REGION1 == 1U) + SAU_INIT_REGION(1); + #endif + + #if defined (SAU_INIT_REGION2) && (SAU_INIT_REGION2 == 1U) + SAU_INIT_REGION(2); + #endif + + #if defined (SAU_INIT_REGION3) && (SAU_INIT_REGION3 == 1U) + SAU_INIT_REGION(3); + #endif + + #if defined (SAU_INIT_REGION4) && (SAU_INIT_REGION4 == 1U) + SAU_INIT_REGION(4); + #endif + + #if defined (SAU_INIT_REGION5) && (SAU_INIT_REGION5 == 1U) + SAU_INIT_REGION(5); + #endif + + #if defined (SAU_INIT_REGION6) && (SAU_INIT_REGION6 == 1U) + SAU_INIT_REGION(6); + #endif + + #if defined (SAU_INIT_REGION7) && (SAU_INIT_REGION7 == 1U) + SAU_INIT_REGION(7); + #endif + + /* repeat this for all possible SAU regions */ + +#endif /* defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) */ + + + #if defined (SAU_INIT_CTRL) && (SAU_INIT_CTRL == 1U) + SAU->CTRL = ((SAU_INIT_CTRL_ENABLE << SAU_CTRL_ENABLE_Pos) & SAU_CTRL_ENABLE_Msk) | + ((SAU_INIT_CTRL_ALLNS << SAU_CTRL_ALLNS_Pos) & SAU_CTRL_ALLNS_Msk) ; + #endif + + #if defined (SCB_CSR_AIRCR_INIT) && (SCB_CSR_AIRCR_INIT == 1U) + SCB->SCR = (SCB->SCR & ~(SCB_SCR_SLEEPDEEPS_Msk )) | + ((SCB_CSR_DEEPSLEEPS_VAL << SCB_SCR_SLEEPDEEPS_Pos) & SCB_SCR_SLEEPDEEPS_Msk); + + SCB->AIRCR = (SCB->AIRCR & ~(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_SYSRESETREQS_Msk | + SCB_AIRCR_BFHFNMINS_Msk | SCB_AIRCR_PRIS_Msk )) | + ((0x05FAU << SCB_AIRCR_VECTKEY_Pos) & SCB_AIRCR_VECTKEY_Msk) | + ((SCB_AIRCR_SYSRESETREQS_VAL << SCB_AIRCR_SYSRESETREQS_Pos) & SCB_AIRCR_SYSRESETREQS_Msk) | + ((SCB_AIRCR_PRIS_VAL << SCB_AIRCR_PRIS_Pos) & SCB_AIRCR_PRIS_Msk) | + ((SCB_AIRCR_BFHFNMINS_VAL << SCB_AIRCR_BFHFNMINS_Pos) & SCB_AIRCR_BFHFNMINS_Msk); + #endif /* defined (SCB_CSR_AIRCR_INIT) && (SCB_CSR_AIRCR_INIT == 1U) */ + + #if defined (__FPU_USED) && (__FPU_USED == 1U) && \ + defined (TZ_FPU_NS_USAGE) && (TZ_FPU_NS_USAGE == 1U) + + SCB->NSACR = (SCB->NSACR & ~(SCB_NSACR_CP10_Msk | SCB_NSACR_CP10_Msk)) | + ((SCB_NSACR_CP10_11_VAL << SCB_NSACR_CP10_Pos) & (SCB_NSACR_CP10_Msk | SCB_NSACR_CP11_Msk)); + + FPU->FPCCR = (FPU->FPCCR & ~(FPU_FPCCR_TS_Msk | FPU_FPCCR_CLRONRETS_Msk | FPU_FPCCR_CLRONRET_Msk)) | + ((FPU_FPCCR_TS_VAL << FPU_FPCCR_TS_Pos ) & FPU_FPCCR_TS_Msk ) | + ((FPU_FPCCR_CLRONRETS_VAL << FPU_FPCCR_CLRONRETS_Pos) & FPU_FPCCR_CLRONRETS_Msk) | + ((FPU_FPCCR_CLRONRET_VAL << FPU_FPCCR_CLRONRET_Pos ) & FPU_FPCCR_CLRONRET_Msk ); + #endif + + #if defined (NVIC_INIT_ITNS0) && (NVIC_INIT_ITNS0 == 1U) + NVIC->ITNS[0] = NVIC_INIT_ITNS0_VAL; + #endif + + #if defined (NVIC_INIT_ITNS1) && (NVIC_INIT_ITNS1 == 1U) + NVIC->ITNS[1] = NVIC_INIT_ITNS1_VAL; + #endif + + #if defined (NVIC_INIT_ITNS2) && (NVIC_INIT_ITNS2 == 1U) + NVIC->ITNS[2] = NVIC_INIT_ITNS2_VAL; + #endif + + #if defined (NVIC_INIT_ITNS3) && (NVIC_INIT_ITNS3 == 1U) + NVIC->ITNS[3] = NVIC_INIT_ITNS3_VAL; + #endif + + /* repeat this for all possible ITNS elements */ + +} + +#endif /* PARTITION_IOTKit_CM33_H */ diff --git a/platform/cmsis/RTE/Device/IOTKit_CM33_FP/partition_IOTKit_CM33.h.base@1.0.0 b/platform/cmsis/RTE/Device/IOTKit_CM33_FP/partition_IOTKit_CM33.h.base@1.0.0 new file mode 100644 index 0000000..45cb6ed --- /dev/null +++ b/platform/cmsis/RTE/Device/IOTKit_CM33_FP/partition_IOTKit_CM33.h.base@1.0.0 @@ -0,0 +1,637 @@ +/****************************************************************************** + * @file partition_IOTKit_CM33.h + * @brief CMSIS-Core Initial Setup for Secure / Non-Secure Zones for IOTKit_CM33 + ******************************************************************************/ +/* Copyright (c) 2015 - 2022 ARM LIMITED + + All rights reserved. + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + - Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + - Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + - Neither the name of ARM nor the names of its contributors may be used + to endorse or promote products derived from this software without + specific prior written permission. + * + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. + ---------------------------------------------------------------------------*/ + +#ifndef PARTITION_IOTKit_CM33_H +#define PARTITION_IOTKit_CM33_H + +/* +//-------- <<< Use Configuration Wizard in Context Menu >>> ----------------- +*/ + +/* +// Initialize Security Attribution Unit (SAU) CTRL register +*/ +#define SAU_INIT_CTRL 1 + +/* +// Enable SAU +// Value for SAU->CTRL register bit ENABLE +*/ +#define SAU_INIT_CTRL_ENABLE 1 + +/* +// When SAU is disabled +// <0=> All Memory is Secure +// <1=> All Memory is Non-Secure +// Value for SAU->CTRL register bit ALLNS +// When all Memory is Non-Secure (ALLNS is 1), IDAU can override memory map configuration. +*/ +#define SAU_INIT_CTRL_ALLNS 0 + +/* +// +*/ + +/* +// Initialize Security Attribution Unit (SAU) Address Regions +// SAU configuration specifies regions to be one of: +// - Secure and Non-Secure Callable +// - Non-Secure +// Note: All memory regions not configured by SAU are Secure +*/ +#define SAU_REGIONS_MAX 8 /* Max. number of SAU regions */ + +/* +// Initialize SAU Region 0 +// Setup SAU Region 0 memory attributes +*/ +#define SAU_INIT_REGION0 1 + +/* +// Start Address <0-0xFFFFFFE0> +*/ +#define SAU_INIT_START0 0x10000000 /* start address of SAU region 0 */ + +/* +// End Address <0x1F-0xFFFFFFFF> +*/ +#define SAU_INIT_END0 0x101FFFFF /* end address of SAU region 0 */ + +/* +// Region is +// <0=>Non-Secure +// <1=>Secure, Non-Secure Callable +*/ +#define SAU_INIT_NSC0 1 +/* +// +*/ + +/* +// Initialize SAU Region 1 +// Setup SAU Region 1 memory attributes +*/ +#define SAU_INIT_REGION1 1 + +/* +// Start Address <0-0xFFFFFFE0> +*/ +#define SAU_INIT_START1 0x00200000 + +/* +// End Address <0x1F-0xFFFFFFFF> +*/ +#define SAU_INIT_END1 0x003FFFFF + +/* +// Region is +// <0=>Non-Secure +// <1=>Secure, Non-Secure Callable +*/ +#define SAU_INIT_NSC1 0 +/* +// +*/ + +/* +// Initialize SAU Region 2 +// Setup SAU Region 2 memory attributes +*/ +#define SAU_INIT_REGION2 1 + +/* +// Start Address <0-0xFFFFFFE0> +*/ +#define SAU_INIT_START2 0x28200000 + +/* +// End Address <0x1F-0xFFFFFFFF> +*/ +#define SAU_INIT_END2 0x283FFFFF + +/* +// Region is +// <0=>Non-Secure +// <1=>Secure, Non-Secure Callable +*/ +#define SAU_INIT_NSC2 0 +/* +// +*/ + +/* +// Initialize SAU Region 3 +// Setup SAU Region 3 memory attributes +*/ +#define SAU_INIT_REGION3 1 + +/* +// Start Address <0-0xFFFFFFE0> +*/ +#define SAU_INIT_START3 0x40000000 + +/* +// End Address <0x1F-0xFFFFFFFF> +*/ +#define SAU_INIT_END3 0x403FFFFF + +/* +// Region is +// <0=>Non-Secure +// <1=>Secure, Non-Secure Callable +*/ +#define SAU_INIT_NSC3 0 +/* +// +*/ + +/* +// Initialize SAU Region 4 +// Setup SAU Region 4 memory attributes +*/ +#define SAU_INIT_REGION4 0 + +/* +// Start Address <0-0xFFFFFFE0> +*/ +#define SAU_INIT_START4 0x00000000 /* start address of SAU region 4 */ + +/* +// End Address <0x1F-0xFFFFFFFF> +*/ +#define SAU_INIT_END4 0x00000000 /* end address of SAU region 4 */ + +/* +// Region is +// <0=>Non-Secure +// <1=>Secure, Non-Secure Callable +*/ +#define SAU_INIT_NSC4 0 +/* +// +*/ + +/* +// Initialize SAU Region 5 +// Setup SAU Region 5 memory attributes +*/ +#define SAU_INIT_REGION5 0 + +/* +// Start Address <0-0xFFFFFFE0> +*/ +#define SAU_INIT_START5 0x00000000 + +/* +// End Address <0x1F-0xFFFFFFFF> +*/ +#define SAU_INIT_END5 0x00000000 + +/* +// Region is +// <0=>Non-Secure +// <1=>Secure, Non-Secure Callable +*/ +#define SAU_INIT_NSC5 0 +/* +// +*/ + +/* +// Initialize SAU Region 6 +// Setup SAU Region 6 memory attributes +*/ +#define SAU_INIT_REGION6 0 + +/* +// Start Address <0-0xFFFFFFE0> +*/ +#define SAU_INIT_START6 0x00000000 + +/* +// End Address <0x1F-0xFFFFFFFF> +*/ +#define SAU_INIT_END6 0x00000000 + +/* +// Region is +// <0=>Non-Secure +// <1=>Secure, Non-Secure Callable +*/ +#define SAU_INIT_NSC6 0 +/* +// +*/ + +/* +// Initialize SAU Region 7 +// Setup SAU Region 7 memory attributes +*/ +#define SAU_INIT_REGION7 0 + +/* +// Start Address <0-0xFFFFFFE0> +*/ +#define SAU_INIT_START7 0x00000000 + +/* +// End Address <0x1F-0xFFFFFFFF> +*/ +#define SAU_INIT_END7 0x00000000 + +/* +// Region is +// <0=>Non-Secure +// <1=>Secure, Non-Secure Callable +*/ +#define SAU_INIT_NSC7 0 +/* +// +*/ + +/* +// +*/ + +/* +// Setup behaviour of Sleep and Exception Handling +*/ +#define SCB_CSR_AIRCR_INIT 1 + +/* +// Deep Sleep can be enabled by +// <0=>Secure and Non-Secure state +// <1=>Secure state only +// Value for SCB->CSR register bit DEEPSLEEPS +*/ +#define SCB_CSR_DEEPSLEEPS_VAL 1 + +/* +// System reset request accessible from +// <0=> Secure and Non-Secure state +// <1=> Secure state only +// Value for SCB->AIRCR register bit SYSRESETREQS +*/ +#define SCB_AIRCR_SYSRESETREQS_VAL 0 + +/* +// Priority of Non-Secure exceptions is +// <0=> Not altered +// <1=> Lowered to 0x80-0xFF +// Value for SCB->AIRCR register bit PRIS +*/ +#define SCB_AIRCR_PRIS_VAL 1 + +/* +// BusFault, HardFault, and NMI target +// <0=> Secure state +// <1=> Non-Secure state +// Value for SCB->AIRCR register bit BFHFNMINS +*/ +#define SCB_AIRCR_BFHFNMINS_VAL 0 + +/* +// +*/ + +/* +// Setup behaviour of Floating Point Unit +*/ +#define TZ_FPU_NS_USAGE 1 + +/* +// Floating Point Unit usage +// <0=> Secure state only +// <3=> Secure and Non-Secure state +// Value for SCB->NSACR register bits CP10, CP11 +*/ +#define SCB_NSACR_CP10_11_VAL 3 + +/* +// Treat floating-point registers as Secure +// <0=> Disabled +// <1=> Enabled +// Value for FPU->FPCCR register bit TS +*/ +#define FPU_FPCCR_TS_VAL 0 + +/* +// Clear on return (CLRONRET) accessibility +// <0=> Secure and Non-Secure state +// <1=> Secure state only +// Value for FPU->FPCCR register bit CLRONRETS +*/ +#define FPU_FPCCR_CLRONRETS_VAL 0 + +/* +// Clear floating-point caller saved registers on exception return +// <0=> Disabled +// <1=> Enabled +// Value for FPU->FPCCR register bit CLRONRET +*/ +#define FPU_FPCCR_CLRONRET_VAL 1 + +/* +// +*/ + +/* +// Setup Interrupt Target +*/ + +/* +// Initialize ITNS 0 (Interrupts 0..31) +*/ +#define NVIC_INIT_ITNS0 0 + +/* +// Interrupts 0..31 +// Non-Secure Watchdog Reset Request <0=> Secure state <1=> Non-Secure state +// Non-Secure Watchdog interrupt <0=> Secure state <1=> Non-Secure state +// S32K Timer interrupt <0=> Secure state <1=> Non-Secure state +// Timer 0 interrupt <0=> Secure state <1=> Non-Secure state +// Timer 1 interrupt <0=> Secure state <1=> Non-Secure state +// Dual Timer interrupt <0=> Secure state <1=> Non-Secure state +*/ +#define NVIC_INIT_ITNS0_VAL 0x00000000 + +/* +// +*/ + +/* +// Initialize ITNS 1 (Interrupts 32..63) +*/ +#define NVIC_INIT_ITNS1 0 + +/* +// Interrupts 32..63 +// UART 0 receive interrupt <0=> Secure state <1=> Non-Secure state +// UART 0 transmit interrupt <0=> Secure state <1=> Non-Secure state +// UART 1 receive interrupt <0=> Secure state <1=> Non-Secure state +// UART 1 transmit interrupt <0=> Secure state <1=> Non-Secure state +// UART 2 teceive interrupt <0=> Secure state <1=> Non-Secure state +// UART 2 transmit interrupt <0=> Secure state <1=> Non-Secure state +// UART 3 receive interrupt <0=> Secure state <1=> Non-Secure state +// UART 3 transmit interrupt <0=> Secure state <1=> Non-Secure state +// UART 4 receive interrupt <0=> Secure state <1=> Non-Secure state +// UART 4 transmit interrupt <0=> Secure state <1=> Non-Secure state +// UART 0 combined interrupt <0=> Secure state <1=> Non-Secure state +// UART 1 combined interrupt <0=> Secure state <1=> Non-Secure state +// UART 2 combined interrupt <0=> Secure state <1=> Non-Secure state +// UART 3 combined interrupt <0=> Secure state <1=> Non-Secure state +// UART 4 combined interrupt <0=> Secure state <1=> Non-Secure state +// UART 0, 1, 2, 3, 4 overflow interrupt <0=> Secure state <1=> Non-Secure state +// Ethernet interrupt <0=> Secure state <1=> Non-Secure state +// Audio I2S interrupt <0=> Secure state <1=> Non-Secure state +// Touch Screen interrupt <0=> Secure state <1=> Non-Secure state +// SPI 0 (SPI Header) interrupt <0=> Secure state <1=> Non-Secure state +// SPI 1 (CLCD) interrupt <0=> Secure state <1=> Non-Secure state +// SPI 2 (Shield ADC) interrupt <0=> Secure state <1=> Non-Secure state +// SPI 3 (Shield 0 SPI) interrupt <0=> Secure state <1=> Non-Secure state +// SPI 4 (Shield 1 SPI) interrupt <0=> Secure state <1=> Non-Secure state +// DMA 0 error interrupt <0=> Secure state <1=> Non-Secure state +// DMA 0 terminal count interrupt <0=> Secure state <1=> Non-Secure state +// DMA 0 combined interrupt <0=> Secure state <1=> Non-Secure state +// DMA 1 error interrupt <0=> Secure state <1=> Non-Secure state +// DMA 1 terminal count interrupt <0=> Secure state <1=> Non-Secure state +// DMA 1 combined interrupt <0=> Secure state <1=> Non-Secure state +// DMA 2 error interrupt <0=> Secure state <1=> Non-Secure state +// DMA 2 terminal count interrupt <0=> Secure state <1=> Non-Secure state +*/ +#define NVIC_INIT_ITNS1_VAL 0x00000000 + +/* +// +*/ + +/* +// Initialize ITNS 2 (Interrupts 64..95) +*/ +#define NVIC_INIT_ITNS2 0 + +/* +// Interrupts 64..95 +// DMA 2 combined interrupt <0=> Secure state <1=> Non-Secure state +// DMA 3 error interrupt <0=> Secure state <1=> Non-Secure state +// DMA 3 terminal count interrupt <0=> Secure state <1=> Non-Secure state +// DMA 3 combined interrupt <0=> Secure state <1=> Non-Secure state +// GPIO 0 combined interrupt <0=> Secure state <1=> Non-Secure state +// GPIO 1 combined interrupt <0=> Secure state <1=> Non-Secure state +// GPIO 2 combined interrupt <0=> Secure state <1=> Non-Secure state +// GPIO 3 combined interrupt <0=> Secure state <1=> Non-Secure state +// GPIO 0 individual interrupt ( 0) <0=> Secure state <1=> Non-Secure state +// GPIO 0 individual interrupt ( 1) <0=> Secure state <1=> Non-Secure state +// GPIO 0 individual interrupt ( 2) <0=> Secure state <1=> Non-Secure state +// GPIO 0 individual interrupt ( 3) <0=> Secure state <1=> Non-Secure state +// GPIO 0 individual interrupt ( 4) <0=> Secure state <1=> Non-Secure state +// GPIO 0 individual interrupt ( 5) <0=> Secure state <1=> Non-Secure state +// GPIO 0 individual interrupt ( 6) <0=> Secure state <1=> Non-Secure state +// GPIO 0 individual interrupt ( 7) <0=> Secure state <1=> Non-Secure state +// GPIO 0 individual interrupt ( 8) <0=> Secure state <1=> Non-Secure state +// GPIO 0 individual interrupt ( 9) <0=> Secure state <1=> Non-Secure state +// GPIO 0 individual interrupt (10) <0=> Secure state <1=> Non-Secure state +// GPIO 0 individual interrupt (11) <0=> Secure state <1=> Non-Secure state +// GPIO 0 individual interrupt (12) <0=> Secure state <1=> Non-Secure state +// GPIO 0 individual interrupt (13) <0=> Secure state <1=> Non-Secure state +// GPIO 0 individual interrupt (14) <0=> Secure state <1=> Non-Secure state +// GPIO 0 individual interrupt (15) <0=> Secure state <1=> Non-Secure state +// GPIO 1 individual interrupt ( 0) <0=> Secure state <1=> Non-Secure state +// GPIO 1 individual interrupt ( 1) <0=> Secure state <1=> Non-Secure state +// GPIO 1 individual interrupt ( 2) <0=> Secure state <1=> Non-Secure state +// GPIO 1 individual interrupt ( 3) <0=> Secure state <1=> Non-Secure state +// GPIO 1 individual interrupt ( 4) <0=> Secure state <1=> Non-Secure state +// GPIO 1 individual interrupt ( 5) <0=> Secure state <1=> Non-Secure state +// GPIO 1 individual interrupt ( 6) <0=> Secure state <1=> Non-Secure state +// GPIO 1 individual interrupt ( 7) <0=> Secure state <1=> Non-Secure state +*/ +#define NVIC_INIT_ITNS2_VAL 0x00000000 + +/* +// +*/ + +/* +// Initialize ITNS 3 (Interrupts 96..127) +*/ +#define NVIC_INIT_ITNS3 0 + +/* +// Interrupts 96..127 +// GPIO 1 individual interrupt ( 8) <0=> Secure state <1=> Non-Secure state +// GPIO 1 individual interrupt ( 9) <0=> Secure state <1=> Non-Secure state +// GPIO 1 individual interrupt (10) <0=> Secure state <1=> Non-Secure state +// GPIO 1 individual interrupt (11) <0=> Secure state <1=> Non-Secure state +// GPIO 1 individual interrupt (12) <0=> Secure state <1=> Non-Secure state +// GPIO 1 individual interrupt (13) <0=> Secure state <1=> Non-Secure state +// GPIO 1 individual interrupt (14) <0=> Secure state <1=> Non-Secure state +// GPIO 1 individual interrupt (15) <0=> Secure state <1=> Non-Secure state +// GPIO 2 individual interrupt ( 0) <0=> Secure state <1=> Non-Secure state +// GPIO 2 individual interrupt ( 1) <0=> Secure state <1=> Non-Secure state +// GPIO 2 individual interrupt ( 2) <0=> Secure state <1=> Non-Secure state +// GPIO 2 individual interrupt ( 3) <0=> Secure state <1=> Non-Secure state +// GPIO 2 individual interrupt ( 4) <0=> Secure state <1=> Non-Secure state +// GPIO 2 individual interrupt ( 5) <0=> Secure state <1=> Non-Secure state +// GPIO 2 individual interrupt ( 6) <0=> Secure state <1=> Non-Secure state +// GPIO 2 individual interrupt ( 7) <0=> Secure state <1=> Non-Secure state +// GPIO 2 individual interrupt ( 8) <0=> Secure state <1=> Non-Secure state +// GPIO 2 individual interrupt ( 9) <0=> Secure state <1=> Non-Secure state +// GPIO 2 individual interrupt (10) <0=> Secure state <1=> Non-Secure state +// GPIO 2 individual interrupt (11) <0=> Secure state <1=> Non-Secure state +// GPIO 2 individual interrupt (12) <0=> Secure state <1=> Non-Secure state +// GPIO 2 individual interrupt (13) <0=> Secure state <1=> Non-Secure state +// GPIO 2 individual interrupt (14) <0=> Secure state <1=> Non-Secure state +// GPIO 2 individual interrupt (15) <0=> Secure state <1=> Non-Secure state +// GPIO 3 individual interrupt ( 0) <0=> Secure state <1=> Non-Secure state +// GPIO 3 individual interrupt ( 1) <0=> Secure state <1=> Non-Secure state +// GPIO 3 individual interrupt ( 2) <0=> Secure state <1=> Non-Secure state +// GPIO 3 individual interrupt ( 3) <0=> Secure state <1=> Non-Secure state +*/ +#define NVIC_INIT_ITNS3_VAL 0x00000000 + +/* +// +*/ + +/* +// +*/ + + + +/* + max 128 SAU regions. + SAU regions are defined in partition.h + */ + +#define SAU_INIT_REGION(n) \ + SAU->RNR = (n & SAU_RNR_REGION_Msk); \ + SAU->RBAR = (SAU_INIT_START##n & SAU_RBAR_BADDR_Msk); \ + SAU->RLAR = (SAU_INIT_END##n & SAU_RLAR_LADDR_Msk) | \ + ((SAU_INIT_NSC##n << SAU_RLAR_NSC_Pos) & SAU_RLAR_NSC_Msk) | 1U + +/** + \brief Setup a SAU Region + \details Writes the region information contained in SAU_Region to the + registers SAU_RNR, SAU_RBAR, and SAU_RLAR + */ +__STATIC_INLINE void TZ_SAU_Setup (void) +{ + +#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) + + #if defined (SAU_INIT_REGION0) && (SAU_INIT_REGION0 == 1U) + SAU_INIT_REGION(0); + #endif + + #if defined (SAU_INIT_REGION1) && (SAU_INIT_REGION1 == 1U) + SAU_INIT_REGION(1); + #endif + + #if defined (SAU_INIT_REGION2) && (SAU_INIT_REGION2 == 1U) + SAU_INIT_REGION(2); + #endif + + #if defined (SAU_INIT_REGION3) && (SAU_INIT_REGION3 == 1U) + SAU_INIT_REGION(3); + #endif + + #if defined (SAU_INIT_REGION4) && (SAU_INIT_REGION4 == 1U) + SAU_INIT_REGION(4); + #endif + + #if defined (SAU_INIT_REGION5) && (SAU_INIT_REGION5 == 1U) + SAU_INIT_REGION(5); + #endif + + #if defined (SAU_INIT_REGION6) && (SAU_INIT_REGION6 == 1U) + SAU_INIT_REGION(6); + #endif + + #if defined (SAU_INIT_REGION7) && (SAU_INIT_REGION7 == 1U) + SAU_INIT_REGION(7); + #endif + + /* repeat this for all possible SAU regions */ + +#endif /* defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) */ + + + #if defined (SAU_INIT_CTRL) && (SAU_INIT_CTRL == 1U) + SAU->CTRL = ((SAU_INIT_CTRL_ENABLE << SAU_CTRL_ENABLE_Pos) & SAU_CTRL_ENABLE_Msk) | + ((SAU_INIT_CTRL_ALLNS << SAU_CTRL_ALLNS_Pos) & SAU_CTRL_ALLNS_Msk) ; + #endif + + #if defined (SCB_CSR_AIRCR_INIT) && (SCB_CSR_AIRCR_INIT == 1U) + SCB->SCR = (SCB->SCR & ~(SCB_SCR_SLEEPDEEPS_Msk )) | + ((SCB_CSR_DEEPSLEEPS_VAL << SCB_SCR_SLEEPDEEPS_Pos) & SCB_SCR_SLEEPDEEPS_Msk); + + SCB->AIRCR = (SCB->AIRCR & ~(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_SYSRESETREQS_Msk | + SCB_AIRCR_BFHFNMINS_Msk | SCB_AIRCR_PRIS_Msk )) | + ((0x05FAU << SCB_AIRCR_VECTKEY_Pos) & SCB_AIRCR_VECTKEY_Msk) | + ((SCB_AIRCR_SYSRESETREQS_VAL << SCB_AIRCR_SYSRESETREQS_Pos) & SCB_AIRCR_SYSRESETREQS_Msk) | + ((SCB_AIRCR_PRIS_VAL << SCB_AIRCR_PRIS_Pos) & SCB_AIRCR_PRIS_Msk) | + ((SCB_AIRCR_BFHFNMINS_VAL << SCB_AIRCR_BFHFNMINS_Pos) & SCB_AIRCR_BFHFNMINS_Msk); + #endif /* defined (SCB_CSR_AIRCR_INIT) && (SCB_CSR_AIRCR_INIT == 1U) */ + + #if defined (__FPU_USED) && (__FPU_USED == 1U) && \ + defined (TZ_FPU_NS_USAGE) && (TZ_FPU_NS_USAGE == 1U) + + SCB->NSACR = (SCB->NSACR & ~(SCB_NSACR_CP10_Msk | SCB_NSACR_CP10_Msk)) | + ((SCB_NSACR_CP10_11_VAL << SCB_NSACR_CP10_Pos) & (SCB_NSACR_CP10_Msk | SCB_NSACR_CP11_Msk)); + + FPU->FPCCR = (FPU->FPCCR & ~(FPU_FPCCR_TS_Msk | FPU_FPCCR_CLRONRETS_Msk | FPU_FPCCR_CLRONRET_Msk)) | + ((FPU_FPCCR_TS_VAL << FPU_FPCCR_TS_Pos ) & FPU_FPCCR_TS_Msk ) | + ((FPU_FPCCR_CLRONRETS_VAL << FPU_FPCCR_CLRONRETS_Pos) & FPU_FPCCR_CLRONRETS_Msk) | + ((FPU_FPCCR_CLRONRET_VAL << FPU_FPCCR_CLRONRET_Pos ) & FPU_FPCCR_CLRONRET_Msk ); + #endif + + #if defined (NVIC_INIT_ITNS0) && (NVIC_INIT_ITNS0 == 1U) + NVIC->ITNS[0] = NVIC_INIT_ITNS0_VAL; + #endif + + #if defined (NVIC_INIT_ITNS1) && (NVIC_INIT_ITNS1 == 1U) + NVIC->ITNS[1] = NVIC_INIT_ITNS1_VAL; + #endif + + #if defined (NVIC_INIT_ITNS2) && (NVIC_INIT_ITNS2 == 1U) + NVIC->ITNS[2] = NVIC_INIT_ITNS2_VAL; + #endif + + #if defined (NVIC_INIT_ITNS3) && (NVIC_INIT_ITNS3 == 1U) + NVIC->ITNS[3] = NVIC_INIT_ITNS3_VAL; + #endif + + /* repeat this for all possible ITNS elements */ + +} + +#endif /* PARTITION_IOTKit_CM33_H */ diff --git a/platform/cmsis/RTE/Device/IOTKit_CM33_FP/startup_IOTKit_CM33.c b/platform/cmsis/RTE/Device/IOTKit_CM33_FP/startup_IOTKit_CM33.c new file mode 100755 index 0000000..bb3e1af --- /dev/null +++ b/platform/cmsis/RTE/Device/IOTKit_CM33_FP/startup_IOTKit_CM33.c @@ -0,0 +1,513 @@ +/****************************************************************************** + * @file startup_IOTKit_CM33.c + * @brief CMSIS Startup File for IOTKit_CM33 Device + ******************************************************************************/ +/* Copyright (c) 2015 - 2022 ARM LIMITED + + All rights reserved. + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + - Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + - Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + - Neither the name of ARM nor the names of its contributors may be used + to endorse or promote products derived from this software without + specific prior written permission. + * + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. + ---------------------------------------------------------------------------*/ + +#if defined (IOTKit_CM33) || defined (IOTKit_CM33_VHT) + #include "IOTKit_CM33.h" +#elif defined (IOTKit_CM33_FP) || defined (IOTKit_CM33_FP_VHT) + #include "IOTKit_CM33_FP.h" +#else + #error device not specified! +#endif + +/*---------------------------------------------------------------------------- + External References + *----------------------------------------------------------------------------*/ +extern uint32_t __INITIAL_SP; +extern uint32_t __STACK_LIMIT; +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +extern uint32_t __STACK_SEAL; +#endif + +extern __NO_RETURN void __PROGRAM_START(void); + +/*---------------------------------------------------------------------------- + Internal References + *----------------------------------------------------------------------------*/ +__NO_RETURN void Reset_Handler (void); + void Default_Handler(void); + +/*---------------------------------------------------------------------------- + Exception / Interrupt Handler + *----------------------------------------------------------------------------*/ +/* Exceptions */ +void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void HardFault_Handler (void) __attribute__ ((weak)); +void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void SecureFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); + +/* Core IoT Interrupts */ +void NONSEC_WATCHDOG_RESET_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void NONSEC_WATCHDOG_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void S32K_TIMER_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void TIMER0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void TIMER1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void DUALTIMER_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void MPC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void PPC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void MSC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void BRIDGE_ERROR_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); + +/* External Interrupts */ +void UART0RX_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART0TX_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART1RX_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART1TX_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART2RX_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART2TX_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART3RX_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART3TX_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART4RX_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART4TX_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UARTOVF_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void ETHERNET_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void I2S_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void TSC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void SPI0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void SPI1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void SPI2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void SPI3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void SPI4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void DMA0_ERROR_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void DMA0_TC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void DMA0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void DMA1_ERROR_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void DMA1_TC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void DMA1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void DMA2_ERROR_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void DMA2_TC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void DMA2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void DMA3_ERROR_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void DMA3_TC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void DMA3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_10_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_11_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_12_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_13_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_14_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_15_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO1_0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO1_1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO1_2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO1_3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO1_4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO1_5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO1_6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO1_7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO1_8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO1_9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO1_10_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO1_11_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO1_12_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO1_13_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO1_14_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO1_15_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO2_0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO2_1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO2_2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO2_3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO2_4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO2_5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO2_6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO2_7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO2_8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO2_9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO2_10_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO2_11_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO2_12_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO2_13_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO2_14_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO2_15_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO3_0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO3_1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO3_2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO3_3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); + +/* VSI Interrupts */ +#if defined (IOTKit_CM33_VHT) || defined (IOTKit_CM33_FP_VHT) +void ARM_VSI0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void ARM_VSI1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void ARM_VSI2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void ARM_VSI3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void ARM_VSI4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void ARM_VSI5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void ARM_VSI6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void ARM_VSI7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +#endif + + +/*---------------------------------------------------------------------------- + Exception / Interrupt Vector table + *----------------------------------------------------------------------------*/ + +#if defined ( __GNUC__ ) +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wpedantic" +#endif + +extern const VECTOR_TABLE_Type __VECTOR_TABLE[256]; + const VECTOR_TABLE_Type __VECTOR_TABLE[256] __VECTOR_TABLE_ATTRIBUTE = { + (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ + Reset_Handler, /* Reset Handler */ + NMI_Handler, /* -14 NMI Handler */ + HardFault_Handler, /* -13 Hard Fault Handler */ + MemManage_Handler, /* -12 MPU Fault Handler */ + BusFault_Handler, /* -11 Bus Fault Handler */ + UsageFault_Handler, /* -10 Usage Fault Handler */ + SecureFault_Handler, /* -9 Secure Fault Handler */ + 0, /* Reserved */ + 0, /* Reserved */ + 0, /* Reserved */ + SVC_Handler, /* -5 SVC Handler */ + DebugMon_Handler, /* -4 Debug Monitor Handler */ + 0, /* Reserved */ + PendSV_Handler, /* -2 PendSV Handler */ + SysTick_Handler, /* -1 SysTick Handler */ + + /* Core IoT Interrupts */ + NONSEC_WATCHDOG_RESET_Handler, /* 0 Non-Secure Watchdog Reset Handler */ + NONSEC_WATCHDOG_Handler, /* 1 Non-Secure Watchdog Handler */ + S32K_TIMER_Handler, /* 2 S32K Timer Handler */ + TIMER0_Handler, /* 3 TIMER 0 Handler */ + TIMER1_Handler, /* 4 TIMER 1 Handler */ + DUALTIMER_Handler, /* 5 Dual Timer Handler */ + 0, /* 6 Reserved */ + 0, /* 7 Reserved */ + 0, /* 8 Reserved */ + MPC_Handler, /* 9 MPC Combined (Secure) Handler */ + PPC_Handler, /* 10 PPC Combined (Secure) Handler */ + MSC_Handler, /* 11 MSC Combined (Secure) Handler */ + BRIDGE_ERROR_Handler, /* 12 Bridge Error Combined (Secure) Handler */ + 0, /* 13 Reserved */ + 0, /* 14 Reserved */ + 0, /* 15 Reserved */ + 0, /* 16 Reserved */ + 0, /* 17 Reserved */ + 0, /* 18 Reserved */ + 0, /* 19 Reserved */ + 0, /* 20 Reserved */ + 0, /* 21 Reserved */ + 0, /* 22 Reserved */ + 0, /* 23 Reserved */ + 0, /* 24 Reserved */ + 0, /* 25 Reserved */ + 0, /* 26 Reserved */ + 0, /* 27 Reserved */ + 0, /* 28 Reserved */ + 0, /* 29 Reserved */ + 0, /* 30 Reserved */ + 0, /* 31 Reserved */ + + /* External Interrupts */ + UART0RX_Handler, /* 32 UART 0 RX Handler */ + UART0TX_Handler, /* 33 UART 0 TX Handler */ + UART1RX_Handler, /* 34 UART 1 RX Handler */ + UART1TX_Handler, /* 35 UART 1 TX Handler */ + UART2RX_Handler, /* 36 UART 2 RX Handler */ + UART2TX_Handler, /* 37 UART 2 TX Handler */ + UART3RX_Handler, /* 38 UART 2 RX Handler */ + UART3TX_Handler, /* 39 UART 2 TX Handler */ + UART4RX_Handler, /* 40 UART 2 RX Handler */ + UART4TX_Handler, /* 41 UART 2 TX Handler */ + UART0_Handler, /* 42 UART 0 combined Handler */ + UART1_Handler, /* 43 UART 1 combined Handler */ + UART2_Handler, /* 44 UART 2 combined Handler */ + UART3_Handler, /* 45 UART 3 combined Handler */ + UART4_Handler, /* 46 UART 4 combined Handler */ + UARTOVF_Handler, /* 47 UART 0,1,2,3,4 Overflow Handler */ + ETHERNET_Handler , /* 48 Ethernet Handler */ + I2S_Handler, /* 49 I2S Handler */ + TSC_Handler, /* 50 Touch Screen Handler */ + SPI0_Handler, /* 51 SPI 0 Handler */ + SPI1_Handler, /* 52 SPI 1 Handler */ + SPI2_Handler, /* 53 SPI 2 Handler */ + SPI3_Handler, /* 54 SPI 3 Handler */ + SPI4_Handler, /* 55 SPI 4 Handler */ + DMA0_ERROR_Handler, /* 56 DMA 0 Error Handler */ + DMA0_TC_Handler, /* 57 DMA 0 Terminal Count Handler */ + DMA0_Handler, /* 58 DMA 0 Combined Handler */ + DMA1_ERROR_Handler, /* 59 DMA 1 Error Handler */ + DMA1_TC_Handler, /* 60 DMA 1 Terminal Count Handler */ + DMA1_Handler, /* 61 DMA 1 Combined Handler */ + DMA2_ERROR_Handler, /* 62 DMA 2 Error Handler */ + DMA2_TC_Handler, /* 63 DMA 2 Terminal Count Handler */ + DMA2_Handler, /* 64 DMA 2 Combined Handler */ + DMA3_ERROR_Handler, /* 65 DMA 3 Error Handler */ + DMA3_TC_Handler, /* 66 DMA 3 Terminal Count Handler */ + DMA3_Handler, /* 67 DMA 3 Combined Handler */ + GPIO0_Handler, /* 68 GPIO 0 Combined Handler */ + GPIO1_Handler, /* 69 GPIO 1 Combined Handler */ + GPIO2_Handler, /* 70 GPIO 2 Combined Handler */ + GPIO3_Handler, /* 71 GPIO 3 Combined Handler */ + GPIO0_0_Handler, /* 72 */ /* All P0 I/O pins used as irq source */ + GPIO0_1_Handler, /* 73 */ /* There are 16 pins in total */ + GPIO0_2_Handler, /* 74 */ + GPIO0_3_Handler, /* 75 */ + GPIO0_4_Handler, /* 76 */ + GPIO0_5_Handler, /* 77 */ + GPIO0_6_Handler, /* 78 */ + GPIO0_7_Handler, /* 79 */ + GPIO0_8_Handler, /* 80 */ + GPIO0_9_Handler, /* 81 */ + GPIO0_10_Handler, /* 82 */ + GPIO0_11_Handler, /* 83 */ + GPIO0_12_Handler, /* 84 */ + GPIO0_13_Handler, /* 85 */ + GPIO0_14_Handler, /* 86 */ + GPIO0_15_Handler, /* 87 */ + GPIO1_0_Handler, /* 88 */ /* All P1 I/O pins used as irq source */ + GPIO1_1_Handler, /* 89 */ /* There are 16 pins in total */ + GPIO1_2_Handler, /* 90 */ + GPIO1_3_Handler, /* 91 */ + GPIO1_4_Handler, /* 92 */ + GPIO1_5_Handler, /* 93 */ + GPIO1_6_Handler, /* 94 */ + GPIO1_7_Handler, /* 95 */ + GPIO1_8_Handler, /* 96 */ + GPIO1_9_Handler, /* 97 */ + GPIO1_10_Handler, /* 98 */ + GPIO1_11_Handler, /* 99 */ + GPIO1_12_Handler, /* 100 */ + GPIO1_13_Handler, /* 101 */ + GPIO1_14_Handler, /* 102 */ + GPIO1_15_Handler, /* 103 */ + GPIO2_0_Handler, /* 104 */ /* All P2 I/O pins used as irq source */ + GPIO2_1_Handler, /* 105 */ /* There are 16 pins in total */ + GPIO2_2_Handler, /* 106 */ + GPIO2_3_Handler, /* 107 */ + GPIO2_4_Handler, /* 108 */ + GPIO2_5_Handler, /* 109 */ + GPIO2_6_Handler, /* 110 */ + GPIO2_7_Handler, /* 111 */ + GPIO2_8_Handler, /* 112 */ + GPIO2_9_Handler, /* 113 */ + GPIO2_10_Handler, /* 114 */ + GPIO2_11_Handler, /* 115 */ + GPIO2_12_Handler, /* 116 */ + GPIO2_13_Handler, /* 117 */ + GPIO2_14_Handler, /* 118 */ + GPIO2_15_Handler, /* 119 */ + GPIO3_0_Handler, /* 120 */ /* All P3 I/O pins used as irq source */ + GPIO3_1_Handler, /* 121 */ /* There are 4 pins in total */ + GPIO3_2_Handler, /* 122 */ + GPIO3_3_Handler, /* 123 */ + 0, /* 124 Reserved */ + 0, /* 125 Reserved */ + 0, /* 126 Reserved */ + 0, /* 127 Reserved */ + 0, /* 128 Reserved */ + 0, /* 129 Reserved */ + 0, /* 130 Reserved */ + 0, /* 131 Reserved */ + 0, /* 132 Reserved */ + 0, /* 133 Reserved */ + 0, /* 134 Reserved */ + 0, /* 135 Reserved */ + 0, /* 136 Reserved */ + 0, /* 137 Reserved */ + 0, /* 138 Reserved */ + 0, /* 139 Reserved */ + 0, /* 140 Reserved */ + 0, /* 141 Reserved */ + 0, /* 142 Reserved */ + 0, /* 143 Reserved */ + 0, /* 144 Reserved */ + 0, /* 145 Reserved */ + 0, /* 146 Reserved */ + 0, /* 147 Reserved */ + 0, /* 148 Reserved */ + 0, /* 149 Reserved */ + 0, /* 150 Reserved */ + 0, /* 151 Reserved */ + 0, /* 152 Reserved */ + 0, /* 153 Reserved */ + 0, /* 154 Reserved */ + 0, /* 155 Reserved */ + 0, /* 156 Reserved */ + 0, /* 157 Reserved */ + 0, /* 158 Reserved */ + 0, /* 159 Reserved */ + 0, /* 160 Reserved */ + 0, /* 161 Reserved */ + 0, /* 162 Reserved */ + 0, /* 163 Reserved */ + 0, /* 164 Reserved */ + 0, /* 165 Reserved */ + 0, /* 166 Reserved */ + 0, /* 167 Reserved */ + 0, /* 168 Reserved */ + 0, /* 169 Reserved */ + 0, /* 170 Reserved */ + 0, /* 171 Reserved */ + 0, /* 172 Reserved */ + 0, /* 173 Reserved */ + 0, /* 174 Reserved */ + 0, /* 175 Reserved */ + 0, /* 176 Reserved */ + 0, /* 177 Reserved */ + 0, /* 178 Reserved */ + 0, /* 179 Reserved */ + 0, /* 180 Reserved */ + 0, /* 181 Reserved */ + 0, /* 182 Reserved */ + 0, /* 183 Reserved */ + 0, /* 184 Reserved */ + 0, /* 185 Reserved */ + 0, /* 186 Reserved */ + 0, /* 187 Reserved */ + 0, /* 188 Reserved */ + 0, /* 189 Reserved */ + 0, /* 190 Reserved */ + 0, /* 191 Reserved */ + 0, /* 192 Reserved */ + 0, /* 193 Reserved */ + 0, /* 194 Reserved */ + 0, /* 195 Reserved */ + 0, /* 196 Reserved */ + 0, /* 197 Reserved */ + 0, /* 198 Reserved */ + 0, /* 199 Reserved */ + 0, /* 200 Reserved */ + 0, /* 201 Reserved */ + 0, /* 202 Reserved */ + 0, /* 203 Reserved */ + 0, /* 204 Reserved */ + 0, /* 205 Reserved */ + 0, /* 206 Reserved */ + 0, /* 207 Reserved */ + 0, /* 208 Reserved */ + 0, /* 209 Reserved */ + 0, /* 210 Reserved */ + 0, /* 211 Reserved */ + 0, /* 212 Reserved */ + 0, /* 213 Reserved */ + 0, /* 214 Reserved */ + 0, /* 215 Reserved */ + 0, /* 216 Reserved */ + 0, /* 217 Reserved */ + 0, /* 218 Reserved */ + 0, /* 219 Reserved */ + 0, /* 220 Reserved */ + 0, /* 221 Reserved */ + 0, /* 222 Reserved */ + 0, /* 223 Reserved */ +#if defined (IOTKit_CM33_VHT) || defined (IOTKit_CM33_FP_VHT) + ARM_VSI0_Handler, /* 224 VSI 0 interrupt */ + ARM_VSI1_Handler, /* 225 VSI 1 interrupt */ + ARM_VSI2_Handler, /* 226 VSI 2 interrupt */ + ARM_VSI3_Handler, /* 227 VSI 3 interrupt */ + ARM_VSI4_Handler, /* 228 VSI 4 interrupt */ + ARM_VSI5_Handler, /* 229 VSI 5 interrupt */ + ARM_VSI6_Handler, /* 230 VSI 6 interrupt */ + ARM_VSI7_Handler /* 231 VSI 7 interrupt */ +#else + 0, /* 224 Reserved */ + 0, /* 225 Reserved */ + 0, /* 226 Reserved */ + 0, /* 227 Reserved */ + 0, /* 228 Reserved */ + 0, /* 229 Reserved */ + 0, /* 230 Reserved */ + 0 /* 231 Reserved */ +#endif +}; + +#if defined ( __GNUC__ ) +#pragma GCC diagnostic pop +#endif + +/*---------------------------------------------------------------------------- + Reset Handler called on controller reset + *----------------------------------------------------------------------------*/ +__NO_RETURN void Reset_Handler(void) +{ + __set_PSP((uint32_t)(&__INITIAL_SP)); + + __set_MSPLIM((uint32_t)(&__STACK_LIMIT)); + __set_PSPLIM((uint32_t)(&__STACK_LIMIT)); + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) + __TZ_set_STACKSEAL_S((uint32_t *)(&__STACK_SEAL)); +#endif + + SystemInit(); /* CMSIS System Initialization */ + __PROGRAM_START(); /* Enter PreMain (C library entry point) */ +} + + +#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #pragma clang diagnostic push + #pragma clang diagnostic ignored "-Wmissing-noreturn" +#endif + +/*---------------------------------------------------------------------------- + Hard Fault Handler + *----------------------------------------------------------------------------*/ +void HardFault_Handler(void) +{ + while(1); +} + +/*---------------------------------------------------------------------------- + Default Handler for Exceptions / Interrupts + *----------------------------------------------------------------------------*/ +void Default_Handler(void) +{ + while(1); +} + +#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #pragma clang diagnostic pop +#endif diff --git a/platform/cmsis/RTE/Device/IOTKit_CM33_FP/startup_IOTKit_CM33.c.base@1.2.0 b/platform/cmsis/RTE/Device/IOTKit_CM33_FP/startup_IOTKit_CM33.c.base@1.2.0 new file mode 100644 index 0000000..bb3e1af --- /dev/null +++ b/platform/cmsis/RTE/Device/IOTKit_CM33_FP/startup_IOTKit_CM33.c.base@1.2.0 @@ -0,0 +1,513 @@ +/****************************************************************************** + * @file startup_IOTKit_CM33.c + * @brief CMSIS Startup File for IOTKit_CM33 Device + ******************************************************************************/ +/* Copyright (c) 2015 - 2022 ARM LIMITED + + All rights reserved. + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + - Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + - Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + - Neither the name of ARM nor the names of its contributors may be used + to endorse or promote products derived from this software without + specific prior written permission. + * + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. + ---------------------------------------------------------------------------*/ + +#if defined (IOTKit_CM33) || defined (IOTKit_CM33_VHT) + #include "IOTKit_CM33.h" +#elif defined (IOTKit_CM33_FP) || defined (IOTKit_CM33_FP_VHT) + #include "IOTKit_CM33_FP.h" +#else + #error device not specified! +#endif + +/*---------------------------------------------------------------------------- + External References + *----------------------------------------------------------------------------*/ +extern uint32_t __INITIAL_SP; +extern uint32_t __STACK_LIMIT; +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +extern uint32_t __STACK_SEAL; +#endif + +extern __NO_RETURN void __PROGRAM_START(void); + +/*---------------------------------------------------------------------------- + Internal References + *----------------------------------------------------------------------------*/ +__NO_RETURN void Reset_Handler (void); + void Default_Handler(void); + +/*---------------------------------------------------------------------------- + Exception / Interrupt Handler + *----------------------------------------------------------------------------*/ +/* Exceptions */ +void NMI_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void HardFault_Handler (void) __attribute__ ((weak)); +void MemManage_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void BusFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UsageFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void SecureFault_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void SVC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void DebugMon_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void PendSV_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void SysTick_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); + +/* Core IoT Interrupts */ +void NONSEC_WATCHDOG_RESET_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void NONSEC_WATCHDOG_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void S32K_TIMER_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void TIMER0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void TIMER1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void DUALTIMER_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void MPC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void PPC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void MSC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void BRIDGE_ERROR_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); + +/* External Interrupts */ +void UART0RX_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART0TX_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART1RX_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART1TX_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART2RX_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART2TX_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART3RX_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART3TX_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART4RX_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART4TX_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UART4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void UARTOVF_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void ETHERNET_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void I2S_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void TSC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void SPI0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void SPI1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void SPI2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void SPI3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void SPI4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void DMA0_ERROR_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void DMA0_TC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void DMA0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void DMA1_ERROR_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void DMA1_TC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void DMA1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void DMA2_ERROR_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void DMA2_TC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void DMA2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void DMA3_ERROR_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void DMA3_TC_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void DMA3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_10_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_11_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_12_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_13_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_14_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO0_15_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO1_0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO1_1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO1_2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO1_3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO1_4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO1_5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO1_6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO1_7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO1_8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO1_9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO1_10_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO1_11_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO1_12_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO1_13_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO1_14_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO1_15_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO2_0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO2_1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO2_2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO2_3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO2_4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO2_5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO2_6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO2_7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO2_8_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO2_9_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO2_10_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO2_11_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO2_12_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO2_13_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO2_14_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO2_15_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO3_0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO3_1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO3_2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void GPIO3_3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); + +/* VSI Interrupts */ +#if defined (IOTKit_CM33_VHT) || defined (IOTKit_CM33_FP_VHT) +void ARM_VSI0_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void ARM_VSI1_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void ARM_VSI2_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void ARM_VSI3_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void ARM_VSI4_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void ARM_VSI5_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void ARM_VSI6_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +void ARM_VSI7_Handler (void) __attribute__ ((weak, alias("Default_Handler"))); +#endif + + +/*---------------------------------------------------------------------------- + Exception / Interrupt Vector table + *----------------------------------------------------------------------------*/ + +#if defined ( __GNUC__ ) +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wpedantic" +#endif + +extern const VECTOR_TABLE_Type __VECTOR_TABLE[256]; + const VECTOR_TABLE_Type __VECTOR_TABLE[256] __VECTOR_TABLE_ATTRIBUTE = { + (VECTOR_TABLE_Type)(&__INITIAL_SP), /* Initial Stack Pointer */ + Reset_Handler, /* Reset Handler */ + NMI_Handler, /* -14 NMI Handler */ + HardFault_Handler, /* -13 Hard Fault Handler */ + MemManage_Handler, /* -12 MPU Fault Handler */ + BusFault_Handler, /* -11 Bus Fault Handler */ + UsageFault_Handler, /* -10 Usage Fault Handler */ + SecureFault_Handler, /* -9 Secure Fault Handler */ + 0, /* Reserved */ + 0, /* Reserved */ + 0, /* Reserved */ + SVC_Handler, /* -5 SVC Handler */ + DebugMon_Handler, /* -4 Debug Monitor Handler */ + 0, /* Reserved */ + PendSV_Handler, /* -2 PendSV Handler */ + SysTick_Handler, /* -1 SysTick Handler */ + + /* Core IoT Interrupts */ + NONSEC_WATCHDOG_RESET_Handler, /* 0 Non-Secure Watchdog Reset Handler */ + NONSEC_WATCHDOG_Handler, /* 1 Non-Secure Watchdog Handler */ + S32K_TIMER_Handler, /* 2 S32K Timer Handler */ + TIMER0_Handler, /* 3 TIMER 0 Handler */ + TIMER1_Handler, /* 4 TIMER 1 Handler */ + DUALTIMER_Handler, /* 5 Dual Timer Handler */ + 0, /* 6 Reserved */ + 0, /* 7 Reserved */ + 0, /* 8 Reserved */ + MPC_Handler, /* 9 MPC Combined (Secure) Handler */ + PPC_Handler, /* 10 PPC Combined (Secure) Handler */ + MSC_Handler, /* 11 MSC Combined (Secure) Handler */ + BRIDGE_ERROR_Handler, /* 12 Bridge Error Combined (Secure) Handler */ + 0, /* 13 Reserved */ + 0, /* 14 Reserved */ + 0, /* 15 Reserved */ + 0, /* 16 Reserved */ + 0, /* 17 Reserved */ + 0, /* 18 Reserved */ + 0, /* 19 Reserved */ + 0, /* 20 Reserved */ + 0, /* 21 Reserved */ + 0, /* 22 Reserved */ + 0, /* 23 Reserved */ + 0, /* 24 Reserved */ + 0, /* 25 Reserved */ + 0, /* 26 Reserved */ + 0, /* 27 Reserved */ + 0, /* 28 Reserved */ + 0, /* 29 Reserved */ + 0, /* 30 Reserved */ + 0, /* 31 Reserved */ + + /* External Interrupts */ + UART0RX_Handler, /* 32 UART 0 RX Handler */ + UART0TX_Handler, /* 33 UART 0 TX Handler */ + UART1RX_Handler, /* 34 UART 1 RX Handler */ + UART1TX_Handler, /* 35 UART 1 TX Handler */ + UART2RX_Handler, /* 36 UART 2 RX Handler */ + UART2TX_Handler, /* 37 UART 2 TX Handler */ + UART3RX_Handler, /* 38 UART 2 RX Handler */ + UART3TX_Handler, /* 39 UART 2 TX Handler */ + UART4RX_Handler, /* 40 UART 2 RX Handler */ + UART4TX_Handler, /* 41 UART 2 TX Handler */ + UART0_Handler, /* 42 UART 0 combined Handler */ + UART1_Handler, /* 43 UART 1 combined Handler */ + UART2_Handler, /* 44 UART 2 combined Handler */ + UART3_Handler, /* 45 UART 3 combined Handler */ + UART4_Handler, /* 46 UART 4 combined Handler */ + UARTOVF_Handler, /* 47 UART 0,1,2,3,4 Overflow Handler */ + ETHERNET_Handler , /* 48 Ethernet Handler */ + I2S_Handler, /* 49 I2S Handler */ + TSC_Handler, /* 50 Touch Screen Handler */ + SPI0_Handler, /* 51 SPI 0 Handler */ + SPI1_Handler, /* 52 SPI 1 Handler */ + SPI2_Handler, /* 53 SPI 2 Handler */ + SPI3_Handler, /* 54 SPI 3 Handler */ + SPI4_Handler, /* 55 SPI 4 Handler */ + DMA0_ERROR_Handler, /* 56 DMA 0 Error Handler */ + DMA0_TC_Handler, /* 57 DMA 0 Terminal Count Handler */ + DMA0_Handler, /* 58 DMA 0 Combined Handler */ + DMA1_ERROR_Handler, /* 59 DMA 1 Error Handler */ + DMA1_TC_Handler, /* 60 DMA 1 Terminal Count Handler */ + DMA1_Handler, /* 61 DMA 1 Combined Handler */ + DMA2_ERROR_Handler, /* 62 DMA 2 Error Handler */ + DMA2_TC_Handler, /* 63 DMA 2 Terminal Count Handler */ + DMA2_Handler, /* 64 DMA 2 Combined Handler */ + DMA3_ERROR_Handler, /* 65 DMA 3 Error Handler */ + DMA3_TC_Handler, /* 66 DMA 3 Terminal Count Handler */ + DMA3_Handler, /* 67 DMA 3 Combined Handler */ + GPIO0_Handler, /* 68 GPIO 0 Combined Handler */ + GPIO1_Handler, /* 69 GPIO 1 Combined Handler */ + GPIO2_Handler, /* 70 GPIO 2 Combined Handler */ + GPIO3_Handler, /* 71 GPIO 3 Combined Handler */ + GPIO0_0_Handler, /* 72 */ /* All P0 I/O pins used as irq source */ + GPIO0_1_Handler, /* 73 */ /* There are 16 pins in total */ + GPIO0_2_Handler, /* 74 */ + GPIO0_3_Handler, /* 75 */ + GPIO0_4_Handler, /* 76 */ + GPIO0_5_Handler, /* 77 */ + GPIO0_6_Handler, /* 78 */ + GPIO0_7_Handler, /* 79 */ + GPIO0_8_Handler, /* 80 */ + GPIO0_9_Handler, /* 81 */ + GPIO0_10_Handler, /* 82 */ + GPIO0_11_Handler, /* 83 */ + GPIO0_12_Handler, /* 84 */ + GPIO0_13_Handler, /* 85 */ + GPIO0_14_Handler, /* 86 */ + GPIO0_15_Handler, /* 87 */ + GPIO1_0_Handler, /* 88 */ /* All P1 I/O pins used as irq source */ + GPIO1_1_Handler, /* 89 */ /* There are 16 pins in total */ + GPIO1_2_Handler, /* 90 */ + GPIO1_3_Handler, /* 91 */ + GPIO1_4_Handler, /* 92 */ + GPIO1_5_Handler, /* 93 */ + GPIO1_6_Handler, /* 94 */ + GPIO1_7_Handler, /* 95 */ + GPIO1_8_Handler, /* 96 */ + GPIO1_9_Handler, /* 97 */ + GPIO1_10_Handler, /* 98 */ + GPIO1_11_Handler, /* 99 */ + GPIO1_12_Handler, /* 100 */ + GPIO1_13_Handler, /* 101 */ + GPIO1_14_Handler, /* 102 */ + GPIO1_15_Handler, /* 103 */ + GPIO2_0_Handler, /* 104 */ /* All P2 I/O pins used as irq source */ + GPIO2_1_Handler, /* 105 */ /* There are 16 pins in total */ + GPIO2_2_Handler, /* 106 */ + GPIO2_3_Handler, /* 107 */ + GPIO2_4_Handler, /* 108 */ + GPIO2_5_Handler, /* 109 */ + GPIO2_6_Handler, /* 110 */ + GPIO2_7_Handler, /* 111 */ + GPIO2_8_Handler, /* 112 */ + GPIO2_9_Handler, /* 113 */ + GPIO2_10_Handler, /* 114 */ + GPIO2_11_Handler, /* 115 */ + GPIO2_12_Handler, /* 116 */ + GPIO2_13_Handler, /* 117 */ + GPIO2_14_Handler, /* 118 */ + GPIO2_15_Handler, /* 119 */ + GPIO3_0_Handler, /* 120 */ /* All P3 I/O pins used as irq source */ + GPIO3_1_Handler, /* 121 */ /* There are 4 pins in total */ + GPIO3_2_Handler, /* 122 */ + GPIO3_3_Handler, /* 123 */ + 0, /* 124 Reserved */ + 0, /* 125 Reserved */ + 0, /* 126 Reserved */ + 0, /* 127 Reserved */ + 0, /* 128 Reserved */ + 0, /* 129 Reserved */ + 0, /* 130 Reserved */ + 0, /* 131 Reserved */ + 0, /* 132 Reserved */ + 0, /* 133 Reserved */ + 0, /* 134 Reserved */ + 0, /* 135 Reserved */ + 0, /* 136 Reserved */ + 0, /* 137 Reserved */ + 0, /* 138 Reserved */ + 0, /* 139 Reserved */ + 0, /* 140 Reserved */ + 0, /* 141 Reserved */ + 0, /* 142 Reserved */ + 0, /* 143 Reserved */ + 0, /* 144 Reserved */ + 0, /* 145 Reserved */ + 0, /* 146 Reserved */ + 0, /* 147 Reserved */ + 0, /* 148 Reserved */ + 0, /* 149 Reserved */ + 0, /* 150 Reserved */ + 0, /* 151 Reserved */ + 0, /* 152 Reserved */ + 0, /* 153 Reserved */ + 0, /* 154 Reserved */ + 0, /* 155 Reserved */ + 0, /* 156 Reserved */ + 0, /* 157 Reserved */ + 0, /* 158 Reserved */ + 0, /* 159 Reserved */ + 0, /* 160 Reserved */ + 0, /* 161 Reserved */ + 0, /* 162 Reserved */ + 0, /* 163 Reserved */ + 0, /* 164 Reserved */ + 0, /* 165 Reserved */ + 0, /* 166 Reserved */ + 0, /* 167 Reserved */ + 0, /* 168 Reserved */ + 0, /* 169 Reserved */ + 0, /* 170 Reserved */ + 0, /* 171 Reserved */ + 0, /* 172 Reserved */ + 0, /* 173 Reserved */ + 0, /* 174 Reserved */ + 0, /* 175 Reserved */ + 0, /* 176 Reserved */ + 0, /* 177 Reserved */ + 0, /* 178 Reserved */ + 0, /* 179 Reserved */ + 0, /* 180 Reserved */ + 0, /* 181 Reserved */ + 0, /* 182 Reserved */ + 0, /* 183 Reserved */ + 0, /* 184 Reserved */ + 0, /* 185 Reserved */ + 0, /* 186 Reserved */ + 0, /* 187 Reserved */ + 0, /* 188 Reserved */ + 0, /* 189 Reserved */ + 0, /* 190 Reserved */ + 0, /* 191 Reserved */ + 0, /* 192 Reserved */ + 0, /* 193 Reserved */ + 0, /* 194 Reserved */ + 0, /* 195 Reserved */ + 0, /* 196 Reserved */ + 0, /* 197 Reserved */ + 0, /* 198 Reserved */ + 0, /* 199 Reserved */ + 0, /* 200 Reserved */ + 0, /* 201 Reserved */ + 0, /* 202 Reserved */ + 0, /* 203 Reserved */ + 0, /* 204 Reserved */ + 0, /* 205 Reserved */ + 0, /* 206 Reserved */ + 0, /* 207 Reserved */ + 0, /* 208 Reserved */ + 0, /* 209 Reserved */ + 0, /* 210 Reserved */ + 0, /* 211 Reserved */ + 0, /* 212 Reserved */ + 0, /* 213 Reserved */ + 0, /* 214 Reserved */ + 0, /* 215 Reserved */ + 0, /* 216 Reserved */ + 0, /* 217 Reserved */ + 0, /* 218 Reserved */ + 0, /* 219 Reserved */ + 0, /* 220 Reserved */ + 0, /* 221 Reserved */ + 0, /* 222 Reserved */ + 0, /* 223 Reserved */ +#if defined (IOTKit_CM33_VHT) || defined (IOTKit_CM33_FP_VHT) + ARM_VSI0_Handler, /* 224 VSI 0 interrupt */ + ARM_VSI1_Handler, /* 225 VSI 1 interrupt */ + ARM_VSI2_Handler, /* 226 VSI 2 interrupt */ + ARM_VSI3_Handler, /* 227 VSI 3 interrupt */ + ARM_VSI4_Handler, /* 228 VSI 4 interrupt */ + ARM_VSI5_Handler, /* 229 VSI 5 interrupt */ + ARM_VSI6_Handler, /* 230 VSI 6 interrupt */ + ARM_VSI7_Handler /* 231 VSI 7 interrupt */ +#else + 0, /* 224 Reserved */ + 0, /* 225 Reserved */ + 0, /* 226 Reserved */ + 0, /* 227 Reserved */ + 0, /* 228 Reserved */ + 0, /* 229 Reserved */ + 0, /* 230 Reserved */ + 0 /* 231 Reserved */ +#endif +}; + +#if defined ( __GNUC__ ) +#pragma GCC diagnostic pop +#endif + +/*---------------------------------------------------------------------------- + Reset Handler called on controller reset + *----------------------------------------------------------------------------*/ +__NO_RETURN void Reset_Handler(void) +{ + __set_PSP((uint32_t)(&__INITIAL_SP)); + + __set_MSPLIM((uint32_t)(&__STACK_LIMIT)); + __set_PSPLIM((uint32_t)(&__STACK_LIMIT)); + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) + __TZ_set_STACKSEAL_S((uint32_t *)(&__STACK_SEAL)); +#endif + + SystemInit(); /* CMSIS System Initialization */ + __PROGRAM_START(); /* Enter PreMain (C library entry point) */ +} + + +#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #pragma clang diagnostic push + #pragma clang diagnostic ignored "-Wmissing-noreturn" +#endif + +/*---------------------------------------------------------------------------- + Hard Fault Handler + *----------------------------------------------------------------------------*/ +void HardFault_Handler(void) +{ + while(1); +} + +/*---------------------------------------------------------------------------- + Default Handler for Exceptions / Interrupts + *----------------------------------------------------------------------------*/ +void Default_Handler(void) +{ + while(1); +} + +#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + #pragma clang diagnostic pop +#endif diff --git a/platform/cmsis/RTE/Device/IOTKit_CM33_FP/system_IOTKit_CM33.c b/platform/cmsis/RTE/Device/IOTKit_CM33_FP/system_IOTKit_CM33.c new file mode 100755 index 0000000..2c1d14c --- /dev/null +++ b/platform/cmsis/RTE/Device/IOTKit_CM33_FP/system_IOTKit_CM33.c @@ -0,0 +1,149 @@ +/****************************************************************************** + * @file system_IOTKit_CM33.c + * @brief CMSIS System Source File for IOTKit_CM33 Device + ******************************************************************************/ +/* Copyright (c) 2015 - 2022 ARM LIMITED + + All rights reserved. + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + - Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + - Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + - Neither the name of ARM nor the names of its contributors may be used + to endorse or promote products derived from this software without + specific prior written permission. + * + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. + ---------------------------------------------------------------------------*/ + +#if defined (IOTKit_CM33) || defined (IOTKit_CM33_VHT) + #include "IOTKit_CM33.h" +#elif defined (IOTKit_CM33_FP) || defined (IOTKit_CM33_FP_VHT) + #include "IOTKit_CM33_FP.h" +#else + #error device not specified! +#endif + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) + #include "partition_IOTKit_CM33.h" +#endif + +/*---------------------------------------------------------------------------- + Define clocks + *----------------------------------------------------------------------------*/ +#define XTAL (50000000UL) /* Oscillator frequency */ + +#define SYSTEM_CLOCK (XTAL / 2U) + +/*---------------------------------------------------------------------------- + Exception / Interrupt Vector table + *----------------------------------------------------------------------------*/ +extern const VECTOR_TABLE_Type __VECTOR_TABLE[256]; + +/*---------------------------------------------------------------------------- + System Core Clock Variable + *----------------------------------------------------------------------------*/ +uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ + +/*---------------------------------------------------------------------------- + System Core Clock update function + *----------------------------------------------------------------------------*/ +void SystemCoreClockUpdate (void) +{ + SystemCoreClock = SYSTEM_CLOCK; +} + +/*---------------------------------------------------------------------------- + System initialization function + *----------------------------------------------------------------------------*/ +void SystemInit (void) +{ +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +// uint32_t blk_cfg, blk_max, blk_size, blk_cnt; +#endif + +#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) + SCB->VTOR = (uint32_t) &(__VECTOR_TABLE[0]); +#endif + +#if defined (__FPU_USED) && (__FPU_USED == 1U) + SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */ + (3U << 11U*2U) ); /* enable CP11 Full Access */ +#endif + +#ifdef UNALIGNED_SUPPORT_DISABLE + SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk; +#endif + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +/* start IOT Green configuration ------------------------- */ + + /* Enable BusFault, UsageFault, MemManageFault and SecureFault to ease diagnostic */ + SCB->SHCSR |= (SCB_SHCSR_USGFAULTENA_Msk | + SCB_SHCSR_BUSFAULTENA_Msk | + SCB_SHCSR_MEMFAULTENA_Msk | + SCB_SHCSR_SECUREFAULTENA_Msk); + + /* BFSR register setting to enable precise errors */ + SCB->CFSR |= SCB_CFSR_PRECISERR_Msk; + + + /* configure MPC --------------- */ + + /* configure unsecure code area MPSSSRAM1 (0x00200000 - 0x003FFFFF) */ +// blk_max = IOTKIT_MPCSSRAM1->BLK_MAX; /* = 0x1 */ +// blk_cfg = IOTKIT_MPCSSRAM1->BLK_CFG; /* = 0xC */ +// blk_size = 1UL << (blk_cfg + 5U); /* = 0x20000 */ +// blk_cnt = 0x200000U / blk_size; /* = 0x10 */ + + IOTKIT_MPCSSRAM1->CTRL &= ~(1UL << 8U); /* clear auto increment */ + IOTKIT_MPCSSRAM1->BLK_IDX = 0; /* write LUT index */ + IOTKIT_MPCSSRAM1->BLK_LUT = 0xFFFF0000UL; /* configure blocks */ + + + /* configure unsecure data area MPSSSRAM3 (0x28200000 - 0x283FFFFF) */ +// blk_max = IOTKIT_MPCSSRAM3->BLK_MAX; /* = 0x1 */ +// blk_cfg = IOTKIT_MPCSSRAM3->BLK_CFG; /* = 0xB */ +// blk_size = 1UL << (blk_cfg + 5U); /* = 0x10000 */ +// blk_cnt = 0x200000U / blk_size; /* = 0x20 */ + + IOTKIT_MPCSSRAM3->CTRL &= ~(1UL << 8U); /* clear auto increment */ + IOTKIT_MPCSSRAM3->BLK_IDX = 1; /* write LUT index */ + IOTKIT_MPCSSRAM3->BLK_LUT = 0xFFFFFFFFUL; /* configure blocks */ + + + + /* enable the Non Secure Callable Configuration for IDAU (NSCCFG register) */ + IOTKIT_SPC->NSCCFG |= 1U; + + + /* configure PPC --------------- */ +#if !defined (__USE_SECURE) + /* Allow Non-secure access for SCC/FPGAIO registers */ + IOTKIT_SPC->APBNSPPCEXP[2U] |= ((1UL << 0U) | + (1UL << 2U) ); + /* Allow Non-secure access for SPI1/UART0 registers */ + IOTKIT_SPC->APBNSPPCEXP[1U] |= ((1UL << 1U) | + (1UL << 5U) ); +#endif + +/* end IOT Green configuration --------------------------- */ + + TZ_SAU_Setup(); +#endif + + SystemCoreClock = SYSTEM_CLOCK; +} diff --git a/platform/cmsis/RTE/Device/IOTKit_CM33_FP/system_IOTKit_CM33.c.base@1.2.0 b/platform/cmsis/RTE/Device/IOTKit_CM33_FP/system_IOTKit_CM33.c.base@1.2.0 new file mode 100644 index 0000000..2c1d14c --- /dev/null +++ b/platform/cmsis/RTE/Device/IOTKit_CM33_FP/system_IOTKit_CM33.c.base@1.2.0 @@ -0,0 +1,149 @@ +/****************************************************************************** + * @file system_IOTKit_CM33.c + * @brief CMSIS System Source File for IOTKit_CM33 Device + ******************************************************************************/ +/* Copyright (c) 2015 - 2022 ARM LIMITED + + All rights reserved. + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + - Redistributions of source code must retain the above copyright + notice, this list of conditions and the following disclaimer. + - Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + - Neither the name of ARM nor the names of its contributors may be used + to endorse or promote products derived from this software without + specific prior written permission. + * + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. + ---------------------------------------------------------------------------*/ + +#if defined (IOTKit_CM33) || defined (IOTKit_CM33_VHT) + #include "IOTKit_CM33.h" +#elif defined (IOTKit_CM33_FP) || defined (IOTKit_CM33_FP_VHT) + #include "IOTKit_CM33_FP.h" +#else + #error device not specified! +#endif + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) + #include "partition_IOTKit_CM33.h" +#endif + +/*---------------------------------------------------------------------------- + Define clocks + *----------------------------------------------------------------------------*/ +#define XTAL (50000000UL) /* Oscillator frequency */ + +#define SYSTEM_CLOCK (XTAL / 2U) + +/*---------------------------------------------------------------------------- + Exception / Interrupt Vector table + *----------------------------------------------------------------------------*/ +extern const VECTOR_TABLE_Type __VECTOR_TABLE[256]; + +/*---------------------------------------------------------------------------- + System Core Clock Variable + *----------------------------------------------------------------------------*/ +uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */ + +/*---------------------------------------------------------------------------- + System Core Clock update function + *----------------------------------------------------------------------------*/ +void SystemCoreClockUpdate (void) +{ + SystemCoreClock = SYSTEM_CLOCK; +} + +/*---------------------------------------------------------------------------- + System initialization function + *----------------------------------------------------------------------------*/ +void SystemInit (void) +{ +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +// uint32_t blk_cfg, blk_max, blk_size, blk_cnt; +#endif + +#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U) + SCB->VTOR = (uint32_t) &(__VECTOR_TABLE[0]); +#endif + +#if defined (__FPU_USED) && (__FPU_USED == 1U) + SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */ + (3U << 11U*2U) ); /* enable CP11 Full Access */ +#endif + +#ifdef UNALIGNED_SUPPORT_DISABLE + SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk; +#endif + +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) +/* start IOT Green configuration ------------------------- */ + + /* Enable BusFault, UsageFault, MemManageFault and SecureFault to ease diagnostic */ + SCB->SHCSR |= (SCB_SHCSR_USGFAULTENA_Msk | + SCB_SHCSR_BUSFAULTENA_Msk | + SCB_SHCSR_MEMFAULTENA_Msk | + SCB_SHCSR_SECUREFAULTENA_Msk); + + /* BFSR register setting to enable precise errors */ + SCB->CFSR |= SCB_CFSR_PRECISERR_Msk; + + + /* configure MPC --------------- */ + + /* configure unsecure code area MPSSSRAM1 (0x00200000 - 0x003FFFFF) */ +// blk_max = IOTKIT_MPCSSRAM1->BLK_MAX; /* = 0x1 */ +// blk_cfg = IOTKIT_MPCSSRAM1->BLK_CFG; /* = 0xC */ +// blk_size = 1UL << (blk_cfg + 5U); /* = 0x20000 */ +// blk_cnt = 0x200000U / blk_size; /* = 0x10 */ + + IOTKIT_MPCSSRAM1->CTRL &= ~(1UL << 8U); /* clear auto increment */ + IOTKIT_MPCSSRAM1->BLK_IDX = 0; /* write LUT index */ + IOTKIT_MPCSSRAM1->BLK_LUT = 0xFFFF0000UL; /* configure blocks */ + + + /* configure unsecure data area MPSSSRAM3 (0x28200000 - 0x283FFFFF) */ +// blk_max = IOTKIT_MPCSSRAM3->BLK_MAX; /* = 0x1 */ +// blk_cfg = IOTKIT_MPCSSRAM3->BLK_CFG; /* = 0xB */ +// blk_size = 1UL << (blk_cfg + 5U); /* = 0x10000 */ +// blk_cnt = 0x200000U / blk_size; /* = 0x20 */ + + IOTKIT_MPCSSRAM3->CTRL &= ~(1UL << 8U); /* clear auto increment */ + IOTKIT_MPCSSRAM3->BLK_IDX = 1; /* write LUT index */ + IOTKIT_MPCSSRAM3->BLK_LUT = 0xFFFFFFFFUL; /* configure blocks */ + + + + /* enable the Non Secure Callable Configuration for IDAU (NSCCFG register) */ + IOTKIT_SPC->NSCCFG |= 1U; + + + /* configure PPC --------------- */ +#if !defined (__USE_SECURE) + /* Allow Non-secure access for SCC/FPGAIO registers */ + IOTKIT_SPC->APBNSPPCEXP[2U] |= ((1UL << 0U) | + (1UL << 2U) ); + /* Allow Non-secure access for SPI1/UART0 registers */ + IOTKIT_SPC->APBNSPPCEXP[1U] |= ((1UL << 1U) | + (1UL << 5U) ); +#endif + +/* end IOT Green configuration --------------------------- */ + + TZ_SAU_Setup(); +#endif + + SystemCoreClock = SYSTEM_CLOCK; +} diff --git a/platform/cmsis/audiomark.cbuild-idx.yml b/platform/cmsis/audiomark.cbuild-idx.yml deleted file mode 100644 index 825d8ef..0000000 --- a/platform/cmsis/audiomark.cbuild-idx.yml +++ /dev/null @@ -1,70 +0,0 @@ -build-idx: - csolution: audiomark.csolution.yml - cprojects: - - cproject: testanr.cproject.yml - clayers: - - clayer: boot.clayer.yml - - clayer: speex.clayer.yml - - clayer: audiomark_core.clayer.yml - - clayer: printf_mps3.clayer.yml - - cproject: testaec.cproject.yml - clayers: - - clayer: boot.clayer.yml - - clayer: speex.clayer.yml - - clayer: audiomark_core.clayer.yml - - clayer: printf_mps3.clayer.yml - - cproject: testabf.cproject.yml - clayers: - - clayer: boot.clayer.yml - - clayer: speex.clayer.yml - - clayer: audiomark_core.clayer.yml - - clayer: printf_mps3.clayer.yml - - cproject: testkws.cproject.yml - clayers: - - clayer: boot.clayer.yml - - clayer: speex.clayer.yml - - clayer: audiomark_core.clayer.yml - - clayer: printf_mps3.clayer.yml - - cproject: testmfcc.cproject.yml - clayers: - - clayer: boot.clayer.yml - - clayer: speex.clayer.yml - - clayer: audiomark_core.clayer.yml - - clayer: printf_mps3.clayer.yml - - cproject: audiomark_app.cproject.yml - clayers: - - clayer: boot.clayer.yml - - clayer: speex.clayer.yml - - clayer: audiomark_core.clayer.yml - - clayer: printf_mps3.clayer.yml - cbuilds: - - cbuild: testanr.Release+MPS3-Corstone-300.cbuild.yml - - cbuild: testanr.Release+MPS3-Corstone-310.cbuild.yml - - cbuild: testanr.Release+VHT-Corstone-300.cbuild.yml - - cbuild: testanr.Release+VHT-Corstone-310.cbuild.yml - - cbuild: testanr.Release+VHT_M85.cbuild.yml - - cbuild: testaec.Release+MPS3-Corstone-300.cbuild.yml - - cbuild: testaec.Release+MPS3-Corstone-310.cbuild.yml - - cbuild: testaec.Release+VHT-Corstone-300.cbuild.yml - - cbuild: testaec.Release+VHT-Corstone-310.cbuild.yml - - cbuild: testaec.Release+VHT_M85.cbuild.yml - - cbuild: testabf.Release+MPS3-Corstone-300.cbuild.yml - - cbuild: testabf.Release+MPS3-Corstone-310.cbuild.yml - - cbuild: testabf.Release+VHT-Corstone-300.cbuild.yml - - cbuild: testabf.Release+VHT-Corstone-310.cbuild.yml - - cbuild: testabf.Release+VHT_M85.cbuild.yml - - cbuild: testkws.Release+MPS3-Corstone-300.cbuild.yml - - cbuild: testkws.Release+MPS3-Corstone-310.cbuild.yml - - cbuild: testkws.Release+VHT-Corstone-300.cbuild.yml - - cbuild: testkws.Release+VHT-Corstone-310.cbuild.yml - - cbuild: testkws.Release+VHT_M85.cbuild.yml - - cbuild: testmfcc.Release+MPS3-Corstone-300.cbuild.yml - - cbuild: testmfcc.Release+MPS3-Corstone-310.cbuild.yml - - cbuild: testmfcc.Release+VHT-Corstone-300.cbuild.yml - - cbuild: testmfcc.Release+VHT-Corstone-310.cbuild.yml - - cbuild: testmfcc.Release+VHT_M85.cbuild.yml - - cbuild: audiomark_app.Release+MPS3-Corstone-300.cbuild.yml - - cbuild: audiomark_app.Release+MPS3-Corstone-310.cbuild.yml - - cbuild: audiomark_app.Release+VHT-Corstone-300.cbuild.yml - - cbuild: audiomark_app.Release+VHT-Corstone-310.cbuild.yml - - cbuild: audiomark_app.Release+VHT_M85.cbuild.yml diff --git a/platform/cmsis/audiomark.csolution.yml b/platform/cmsis/audiomark.csolution.yml index 7a97d82..12d2be7 100755 --- a/platform/cmsis/audiomark.csolution.yml +++ b/platform/cmsis/audiomark.csolution.yml @@ -30,6 +30,8 @@ solution: - pack: Keil::ARM_Compiler@1.7.2 - pack: ARM::DMA350@1.0.0 - pack: GorgonMeducer::perf_counter@1.9.11 + - pack: Keil::V2M-MPS2_IOTKit_BSP@1.5.0 + - pack: Keil::V2M-MPS2_CMx_BSP@1.8.0 target-types: @@ -49,6 +51,21 @@ solution: - type: VHT-Corstone-300 device: ARM::SSE-300-MPS3 + - type: MPS2-IOTKit-CM33 + device: ARM::IOTKit_CM33_FP + define: + - GENERIC_ARCH + + - type: MPS2-CMSDK_CM4_FP + device: ARM::CMSDK_CM4_FP + define: + - GENERIC_ARCH + + - type: MPS2-CMSDK_CM7_SP + device: ARM::CMSDK_CM7_SP + define: + - GENERIC_ARCH + build-types: - type: Release diff --git a/platform/cmsis/audiomark_app.Release+MPS2-CMSDK_CM4_FP.cprj b/platform/cmsis/audiomark_app.Release+MPS2-CMSDK_CM4_FP.cprj new file mode 100644 index 0000000..46a3661 --- /dev/null +++ b/platform/cmsis/audiomark_app.Release+MPS2-CMSDK_CM4_FP.cprj @@ -0,0 +1,88 @@ + + + + + + Automatically generated project + + + + + + + + + + + + + + + + + + + + + + + OS_SUPPORT_CUSTOM;GENERIC_ARCH + .;../../lib/speexdsp/include;../../lib/speexdsp/libspeexdsp;../../ports/arm/;../../ports/arm/libs/CMSIS-NN/Include;../../src/;../../lib/speexdsp/include/speex/;../../lib/speexdsp/ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/platform/cmsis/audiomark_app.Release+MPS2-CMSDK_CM7_SP.cprj b/platform/cmsis/audiomark_app.Release+MPS2-CMSDK_CM7_SP.cprj new file mode 100644 index 0000000..75d5d9e --- /dev/null +++ b/platform/cmsis/audiomark_app.Release+MPS2-CMSDK_CM7_SP.cprj @@ -0,0 +1,88 @@ + + + + + + Automatically generated project + + + + + + + + + + + + + + + + + + + + + + + OS_SUPPORT_CUSTOM;GENERIC_ARCH + .;../../lib/speexdsp/include;../../lib/speexdsp/libspeexdsp;../../ports/arm/;../../ports/arm/libs/CMSIS-NN/Include;../../src/;../../lib/speexdsp/include/speex/;../../lib/speexdsp/ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/platform/cmsis/audiomark_app.Release+MPS2-IOTKit-CM33.cprj b/platform/cmsis/audiomark_app.Release+MPS2-IOTKit-CM33.cprj new file mode 100644 index 0000000..31e0441 --- /dev/null +++ b/platform/cmsis/audiomark_app.Release+MPS2-IOTKit-CM33.cprj @@ -0,0 +1,89 @@ + + + + + + Automatically generated project + + + + + + + + + + + + + + + + + + + + + + + OS_SUPPORT_CUSTOM;GENERIC_ARCH + .;../../lib/speexdsp/include;../../lib/speexdsp/libspeexdsp;../../ports/arm/;../../ports/arm/libs/CMSIS-NN/Include;../../src/;../../lib/speexdsp/include/speex/;../../lib/speexdsp/ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/platform/cmsis/audiomark_app.Release+MPS3-Corstone-300.cprj b/platform/cmsis/audiomark_app.Release+MPS3-Corstone-300.cprj index 4440982..52c1ee2 100644 --- a/platform/cmsis/audiomark_app.Release+MPS3-Corstone-300.cprj +++ b/platform/cmsis/audiomark_app.Release+MPS3-Corstone-300.cprj @@ -1,6 +1,6 @@ - + Automatically generated project diff --git a/platform/cmsis/audiomark_app.Release+MPS3-Corstone-310.cprj b/platform/cmsis/audiomark_app.Release+MPS3-Corstone-310.cprj index 0a7e48a..e73576d 100644 --- a/platform/cmsis/audiomark_app.Release+MPS3-Corstone-310.cprj +++ b/platform/cmsis/audiomark_app.Release+MPS3-Corstone-310.cprj @@ -1,6 +1,6 @@ - + Automatically generated project diff --git a/platform/cmsis/audiomark_app.Release+VHT-Corstone-300.cprj b/platform/cmsis/audiomark_app.Release+VHT-Corstone-300.cprj index 0c0b485..bf21636 100644 --- a/platform/cmsis/audiomark_app.Release+VHT-Corstone-300.cprj +++ b/platform/cmsis/audiomark_app.Release+VHT-Corstone-300.cprj @@ -1,6 +1,6 @@ - + Automatically generated project diff --git a/platform/cmsis/audiomark_app.Release+VHT-Corstone-310.cprj b/platform/cmsis/audiomark_app.Release+VHT-Corstone-310.cprj index 438662b..c16c219 100644 --- a/platform/cmsis/audiomark_app.Release+VHT-Corstone-310.cprj +++ b/platform/cmsis/audiomark_app.Release+VHT-Corstone-310.cprj @@ -1,6 +1,6 @@ - + Automatically generated project diff --git a/platform/cmsis/audiomark_app.Release+VHT_M85.cprj b/platform/cmsis/audiomark_app.Release+VHT_M85.cprj index e940297..fc80a49 100644 --- a/platform/cmsis/audiomark_app.Release+VHT_M85.cprj +++ b/platform/cmsis/audiomark_app.Release+VHT_M85.cprj @@ -1,6 +1,6 @@ - + Automatically generated project diff --git a/platform/cmsis/audiomark_app.cproject.yml b/platform/cmsis/audiomark_app.cproject.yml index 40e0e6e..3b2b20c 100755 --- a/platform/cmsis/audiomark_app.cproject.yml +++ b/platform/cmsis/audiomark_app.cproject.yml @@ -43,9 +43,10 @@ project: - layer: boot.clayer.yml - layer: speex.clayer.yml - layer: audiomark_core.clayer.yml - - layer: printf_mps3.clayer.yml - for-type: - - +MPS3-Corstone-300 - - +MPS3-Corstone-310 + - layer: printf_mpsx.clayer.yml + not-for-context: + - +VHT-Corstone-300 + - +VHT-Corstone-310 + - +VHT_M85 diff --git a/platform/cmsis/boot.clayer.yml b/platform/cmsis/boot.clayer.yml index 32e41e9..888989a 100644 --- a/platform/cmsis/boot.clayer.yml +++ b/platform/cmsis/boot.clayer.yml @@ -4,73 +4,73 @@ layer: components: - component: Device:Startup&C Startup - not-for-type: + not-for-context: - +VHT-Corstone-300 - +VHT-Corstone-310 - +MPS3-Corstone-300 - +MPS3-Corstone-310 - component: ARM::Device:Definition - for-type: + for-context: - +VHT-Corstone-300 - +VHT-Corstone-310 - +MPS3-Corstone-300 - +MPS3-Corstone-310 - component: ARM::Device:Startup&Baremetal - for-type: + for-context: - +VHT-Corstone-300 - +VHT-Corstone-310 - +MPS3-Corstone-300 - +MPS3-Corstone-310 - component: ARM::Native Driver:Timeout - for-type: + for-context: - +VHT-Corstone-300 - +VHT-Corstone-310 - +MPS3-Corstone-300 - +MPS3-Corstone-310 - component: ARM::Native Driver:SysCounter - for-type: + for-context: - +VHT-Corstone-300 - +VHT-Corstone-310 - +MPS3-Corstone-300 - +MPS3-Corstone-310 - component: ARM::Native Driver:SysTimer - for-type: + for-context: - +VHT-Corstone-300 - +VHT-Corstone-310 - +MPS3-Corstone-300 - +MPS3-Corstone-310 - component: ARM::MCU Driver HAL:DMA350 - for-type: + for-context: - +VHT-Corstone-310 - +MPS3-Corstone-310 - component: ARM::Native Driver:DMA350 - for-type: + for-context: - +VHT-Corstone-310 - +MPS3-Corstone-310 - component: DMA350 - for-type: + for-context: - +VHT-Corstone-310 - component: ARM::Native Driver:DMA350 Remap - for-type: + for-context: - +VHT-Corstone-310 - +MPS3-Corstone-310 - component: ARM::Native Driver:DMA350 Remap:SSE-310 - for-type: + for-context: - +VHT-Corstone-310 - +MPS3-Corstone-310 - component: DMA350 Remap - for-type: + for-context: - +VHT-Corstone-310 - +MPS3-Corstone-310 diff --git a/platform/cmsis/printf_mps3.clayer.yml b/platform/cmsis/printf_mps3.clayer.yml deleted file mode 100644 index c44003c..0000000 --- a/platform/cmsis/printf_mps3.clayer.yml +++ /dev/null @@ -1,12 +0,0 @@ -layer: - description: Printf retarget for MPS3 - - groups: - - group: Printf retarget - files: - - file: stdout_USART.c - - components: - - component: Keil::Compiler&ARM Compiler:I/O:STDOUT&User@1.2.0 - - component: ARM::Native Driver:UART - - component: ARM::CMSIS Driver:USART \ No newline at end of file diff --git a/platform/cmsis/printf_mpsx.clayer.yml b/platform/cmsis/printf_mpsx.clayer.yml new file mode 100644 index 0000000..40ef85d --- /dev/null +++ b/platform/cmsis/printf_mpsx.clayer.yml @@ -0,0 +1,35 @@ +layer: + description: Printf retarget for ARM MPS2 & MPS3 FPGA + + groups: + - group: Printf retarget + files: + - file: stdout_USART.c + + components: + - component: Keil::Compiler&ARM Compiler:I/O:STDOUT&User@1.2.0 + - component: ARM::Native Driver:UART + for-context: + - +MPS3-Corstone-300 + - +MPS3-Corstone-310 + + - component: ARM::CMSIS Driver:USART + for-context: + - +MPS3-Corstone-300 + - +MPS3-Corstone-310 + + - component: Keil::Board Support&V2M-MPS2 IOT-Kit:Common@2.0.0 + for-context: + - +MPS2-IOTKit-CM33 + + - component: Keil::Board Support&V2M-MPS2:Common@2.0.0 + for-context: + - +MPS2-CMSDK_CM4_FP + - +MPS2-CMSDK_CM7_SP + + - component: Keil::CMSIS Driver:USART + not-for-context: + - +MPS3-Corstone-300 + - +MPS3-Corstone-310 + + diff --git a/platform/cmsis/testabf.Release+MPS2-CMSDK_CM4_FP.cprj b/platform/cmsis/testabf.Release+MPS2-CMSDK_CM4_FP.cprj new file mode 100644 index 0000000..b2db4f6 --- /dev/null +++ b/platform/cmsis/testabf.Release+MPS2-CMSDK_CM4_FP.cprj @@ -0,0 +1,90 @@ + + + + + + Automatically generated project + + + + + + + + + + + + + + + + + + + + + + + OS_SUPPORT_CUSTOM;GENERIC_ARCH + .;../../lib/speexdsp/include;../../lib/speexdsp/libspeexdsp;../../ports/arm/;../../ports/arm/libs/CMSIS-NN/Include;../../src/;../../lib/speexdsp/include/speex/;../../lib/speexdsp/ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/platform/cmsis/testabf.Release+MPS2-CMSDK_CM7_SP.cprj b/platform/cmsis/testabf.Release+MPS2-CMSDK_CM7_SP.cprj new file mode 100644 index 0000000..df252ce --- /dev/null +++ b/platform/cmsis/testabf.Release+MPS2-CMSDK_CM7_SP.cprj @@ -0,0 +1,90 @@ + + + + + + Automatically generated project + + + + + + + + + + + + + + + + + + + + + + + OS_SUPPORT_CUSTOM;GENERIC_ARCH + .;../../lib/speexdsp/include;../../lib/speexdsp/libspeexdsp;../../ports/arm/;../../ports/arm/libs/CMSIS-NN/Include;../../src/;../../lib/speexdsp/include/speex/;../../lib/speexdsp/ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/platform/cmsis/testabf.Release+MPS2-IOTKit-CM33.cprj b/platform/cmsis/testabf.Release+MPS2-IOTKit-CM33.cprj new file mode 100644 index 0000000..c3fe88a --- /dev/null +++ b/platform/cmsis/testabf.Release+MPS2-IOTKit-CM33.cprj @@ -0,0 +1,91 @@ + + + + + + Automatically generated project + + + + + + + + + + + + + + + + + + + + + + + OS_SUPPORT_CUSTOM;GENERIC_ARCH + .;../../lib/speexdsp/include;../../lib/speexdsp/libspeexdsp;../../ports/arm/;../../ports/arm/libs/CMSIS-NN/Include;../../src/;../../lib/speexdsp/include/speex/;../../lib/speexdsp/ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/platform/cmsis/testabf.Release+MPS3-Corstone-300.cprj b/platform/cmsis/testabf.Release+MPS3-Corstone-300.cprj index 5275ce8..9fc9fca 100644 --- a/platform/cmsis/testabf.Release+MPS3-Corstone-300.cprj +++ b/platform/cmsis/testabf.Release+MPS3-Corstone-300.cprj @@ -1,6 +1,6 @@ - + Automatically generated project diff --git a/platform/cmsis/testabf.Release+MPS3-Corstone-310.cbuild.yml b/platform/cmsis/testabf.Release+MPS3-Corstone-310.cbuild.yml deleted file mode 100644 index 51e54d4..0000000 --- a/platform/cmsis/testabf.Release+MPS3-Corstone-310.cbuild.yml +++ /dev/null @@ -1,499 +0,0 @@ -build: - solution: audiomark.csolution.yml - project: testabf.cproject.yml - context: testabf.Release+MPS3-Corstone-310 - compiler: AC6 - device: ARM::SSE-310-MPS3 - processor: - fpu: on - trustzone: non-secure - packs: - - pack: ARM::CMSIS-DSP@1.14.2 - path: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2 - - pack: ARM::CMSIS-NN@4.0.0 - path: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0 - - pack: ARM::CMSIS@5.9.0 - path: ${CMSIS_PACK_ROOT}/ARM/CMSIS/5.9.0 - - pack: ARM::DMA350@1.0.0 - path: ${CMSIS_PACK_ROOT}/ARM/DMA350/1.0.0 - - pack: ARM::V2M_MPS3_SSE_310_BSP@1.1.0 - path: ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0 - - pack: GorgonMeducer::perf_counter@1.9.11 - path: ${CMSIS_PACK_ROOT}/GorgonMeducer/perf_counter/1.9.11 - debug: on - misc: - ASM: - - -masm=auto - C: - - -std=gnu11 - - -fshort-enums -fshort-wchar - - -Ofast - - -ffast-math - CPP: - - -std=c++11 - - -fno-rtti - - -Ofast - - -ffast-math - Link: - - --info=summarysizes - - --info=sizes - - --info=totals - - --info=unused - - --info=veneers - define: - - OS_SUPPORT_CUSTOM - - _RTE_ - add-path: - - . - - ../../lib/speexdsp/include - - ../../lib/speexdsp/libspeexdsp - - ../../ports/arm/ - - ../../ports/arm/libs/CMSIS-NN/Include - - ../../src/ - - ../../lib/speexdsp/include/speex/ - - ../../lib/speexdsp/ - - RTE/Device/SSE-310-MPS3 - - RTE/_Release_MPS3-Corstone-310 - - ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Include - - ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/PrivateInclude - - ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Include - - ${CMSIS_PACK_ROOT}/ARM/CMSIS/5.9.0/CMSIS/Core/Include - - ${CMSIS_PACK_ROOT}/ARM/DMA350/1.0.0/MDH_API - - ${CMSIS_PACK_ROOT}/ARM/DMA350/1.0.0/Native_Driver - - ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0/Board/Device_Definition - - ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0/Board/Platform - - ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0/Device/Include - - ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0/MDH_Driver - - ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0/Native_Driver - - ${CMSIS_PACK_ROOT}/GorgonMeducer/perf_counter/1.9.11/lib - output-type: exe - output-dirs: - intdir: tmp/testabf/MPS3-Corstone-310/Release - outdir: out/testabf/MPS3-Corstone-310/Release - rtedir: RTE - components: - - component: ARM::CMSIS:CORE@5.6.0 - condition: ARMv6_7_8-M Device - from-pack: ARM::CMSIS@5.9.0 - selected-by: ARM::CMSIS:CORE - - component: ARM::CMSIS:DSP&Source@1.14.2 - condition: CMSISCORE - from-pack: ARM::CMSIS-DSP@1.14.2 - selected-by: ARM::CMSIS:DSP&Source@1.14.2 - files: - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/BasicMathFunctions/BasicMathFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/BasicMathFunctions/BasicMathFunctionsF16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/BayesFunctions/BayesFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/BayesFunctions/BayesFunctionsF16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/CommonTables/CommonTables.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/CommonTables/CommonTablesF16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/ComplexMathFunctions/ComplexMathFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/ComplexMathFunctions/ComplexMathFunctionsF16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/ControllerFunctions/ControllerFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/DistanceFunctions/DistanceFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/DistanceFunctions/DistanceFunctionsF16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/FastMathFunctions/FastMathFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/FastMathFunctions/FastMathFunctionsF16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/FilteringFunctions/FilteringFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/FilteringFunctions/FilteringFunctionsF16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/InterpolationFunctions/InterpolationFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/InterpolationFunctions/InterpolationFunctionsF16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/MatrixFunctions/MatrixFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/MatrixFunctions/MatrixFunctionsF16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/QuaternionMathFunctions/QuaternionMathFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/SVMFunctions/SVMFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/SVMFunctions/SVMFunctionsF16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/StatisticsFunctions/StatisticsFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/StatisticsFunctions/StatisticsFunctionsF16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/SupportFunctions/SupportFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/SupportFunctions/SupportFunctionsF16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/TransformFunctions/TransformFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/TransformFunctions/TransformFunctionsF16.c - category: source - - component: ARM::CMSIS:NN Lib@4.0.0 - condition: CMSIS-NN - from-pack: ARM::CMSIS-NN@4.0.0 - selected-by: ARM::CMSIS:NN@4.0.0 - files: - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ActivationFunctions/arm_nn_activation_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ActivationFunctions/arm_relu6_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ActivationFunctions/arm_relu_q15.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ActivationFunctions/arm_relu_q7.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/BasicMathFunctions/arm_elementwise_add_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/BasicMathFunctions/arm_elementwise_add_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/BasicMathFunctions/arm_elementwise_mul_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/BasicMathFunctions/arm_elementwise_mul_s16_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/BasicMathFunctions/arm_elementwise_mul_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConcatenationFunctions/arm_concatenation_s8_w.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConcatenationFunctions/arm_concatenation_s8_x.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConcatenationFunctions/arm_concatenation_s8_y.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConcatenationFunctions/arm_concatenation_s8_z.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_convolve_1_x_n_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_convolve_1x1_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_convolve_1x1_s8_fast.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_convolve_fast_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_convolve_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_convolve_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_convolve_wrapper_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_convolve_wrapper_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_depthwise_conv_3x3_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_depthwise_conv_fast_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_depthwise_conv_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_depthwise_conv_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_depthwise_conv_s8_opt.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_depthwise_conv_wrapper_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_depthwise_conv_wrapper_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_nn_depthwise_conv_s8_core.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_s8_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_nn_mat_mult_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/FullyConnectedFunctions/arm_fully_connected_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/FullyConnectedFunctions/arm_fully_connected_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/LSTMFunctions/arm_lstm_unidirectional_s8_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_depthwise_conv_nt_t_padded_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_depthwise_conv_nt_t_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_depthwise_conv_nt_t_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_lstm_calculate_gate_s8_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_lstm_step_s8_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_lstm_update_cell_state_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_lstm_update_output_s8_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_mat_mul_core_1x_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_mat_mul_core_4x_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_mat_mul_kernel_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_mat_mult_nt_t_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_vec_mat_mul_result_acc_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_svdf_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nntables.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_q7_to_q15_with_offset.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/PoolingFunctions/arm_avgpool_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/PoolingFunctions/arm_avgpool_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/PoolingFunctions/arm_max_pool_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/PoolingFunctions/arm_max_pool_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ReshapeFunctions/arm_reshape_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/SVDFunctions/arm_svdf_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/SVDFunctions/arm_svdf_state_s16_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/SoftmaxFunctions/arm_nn_softmax_common_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/SoftmaxFunctions/arm_softmax_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/SoftmaxFunctions/arm_softmax_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/SoftmaxFunctions/arm_softmax_s8_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/SoftmaxFunctions/arm_softmax_u8.c - category: source - - component: ARM::Device:Definition@1.1.0 - condition: SSE-310-MPS3 Device - from-pack: ARM::V2M_MPS3_SSE_310_BSP@1.1.0 - selected-by: ARM::Device:Definition - files: - - file: ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0/Board/Device_Definition/device_definition.c - category: source - - file: RTE/Device/SSE-310-MPS3/platform_base_address.h - category: header - attr: config - version: 1.0.0 - - component: ARM::Device:Startup&Baremetal@1.0.1 - condition: SSE-310-MPS3 Device - from-pack: ARM::V2M_MPS3_SSE_310_BSP@1.1.0 - selected-by: ARM::Device:Startup&Baremetal - files: - - file: RTE/Device/SSE-310-MPS3/cmsis_driver_config.h - category: header - attr: config - version: 1.0.0 - - file: RTE/Device/SSE-310-MPS3/RTE_Device.h - category: header - attr: config - version: 1.0.0 - - file: RTE/Device/SSE-310-MPS3/device_cfg.h - category: header - attr: config - version: 1.0.0 - - file: RTE/Device/SSE-310-MPS3/region_defs.h - category: header - attr: config - version: 1.0.0 - - file: RTE/Device/SSE-310-MPS3/region_limits.h - category: header - attr: config - version: 1.0.0 - - file: RTE/Device/SSE-310-MPS3/system_SSE310MPS3.h - category: header - attr: config - version: 1.0.0 - - file: RTE/Device/SSE-310-MPS3/corstone310_mps3_s.sct - category: linkerScript - attr: config - version: 1.0.0 - - file: RTE/Device/SSE-310-MPS3/startup_SSE310MPS3.c - category: source - attr: config - version: 1.0.0 - - file: RTE/Device/SSE-310-MPS3/system_SSE310MPS3.c - category: source - attr: config - version: 1.0.0 - - component: ARM::MCU Driver HAL:DMA350@1.0.0 - condition: SSE-310-MPS3 MDH DMA350 - from-pack: ARM::V2M_MPS3_SSE_310_BSP@1.1.0 - selected-by: ARM::MCU Driver HAL:DMA350 - files: - - file: ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0/MDH_Driver/mps3_dma.c - category: source - - component: ARM::Native Driver:DMA350 Remap:Custom@1.0.0 - condition: DMA350 Remap - from-pack: ARM::DMA350@1.0.0 - selected-by: ARM::Native Driver:DMA350 Remap - - component: ARM::Native Driver:DMA350 Remap:SSE-310 Remap@1.0.0 - condition: SSE-310-MPS3 DMA350 - from-pack: ARM::V2M_MPS3_SSE_310_BSP@1.1.0 - selected-by: ARM::Native Driver:DMA350 Remap:SSE-310 - files: - - file: ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0/Device/Source/dma350_address_remap.c - category: source - - component: ARM::Native Driver:DMA350@1.1.0 - condition: DMA350 - from-pack: ARM::DMA350@1.0.0 - selected-by: ARM::Native Driver:DMA350 - files: - - file: ${CMSIS_PACK_ROOT}/ARM/DMA350/1.0.0/Native_Driver/dma350_ch_drv.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/DMA350/1.0.0/Native_Driver/dma350_drv.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/DMA350/1.0.0/Native_Driver/dma350_lib.c - category: source - - component: ARM::Native Driver:SysCounter@1.0.0 - condition: SSE-310-MPS3 Device - from-pack: ARM::V2M_MPS3_SSE_310_BSP@1.1.0 - selected-by: ARM::Native Driver:SysCounter - files: - - file: ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0/Native_Driver/syscounter_armv8-m_cntrl_drv.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0/Native_Driver/syscounter_armv8-m_read_drv.c - category: source - - component: ARM::Native Driver:SysTimer@1.0.0 - condition: SSE-310-MPS3 Device - from-pack: ARM::V2M_MPS3_SSE_310_BSP@1.1.0 - selected-by: ARM::Native Driver:SysTimer - files: - - file: ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0/Native_Driver/systimer_armv8-m_drv.c - category: source - - component: ARM::Native Driver:Timeout@1.0.0 - condition: SSE-310-MPS3 Systimer Syscounter - from-pack: ARM::V2M_MPS3_SSE_310_BSP@1.1.0 - selected-by: ARM::Native Driver:Timeout - files: - - file: ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0/Native_Driver/systimer_armv8-m_timeout.c - category: source - - component: GorgonMeducer::Utilities&Performance Counter:perf_counter:Core&Library@1.9.11 - condition: CMSIS-CORE - from-pack: GorgonMeducer::perf_counter@1.9.11 - selected-by: perf_counter:Core - misc: - C: - - -DARM_DSP_CONFIG_TABLES - - -DARM_FAST_ALLOW_TABLES - - -DARM_FFT_ALLOW_TABLES - - -DARM_ALL_FAST_TABLES - - -DARM_MATH_LOOPUNROLL - - -DARM_TABLE_BITREVIDX_FXT_128 - - -DARM_TABLE_BITREVIDX_FXT_256 - - -DARM_TABLE_BITREVIDX_FXT_512 - - -DARM_TABLE_TWIDDLECOEF_F32_128 -DARM_TABLE_BITREVIDX_FLT_128 - - -DARM_TABLE_TWIDDLECOEF_F32_256 -DARM_TABLE_BITREVIDX_FLT_256 - - -DARM_TABLE_TWIDDLECOEF_F32_512 -DARM_TABLE_BITREVIDX_FLT_512 - - -DARM_TABLE_TWIDDLECOEF_RFFT_F32_128 - - -DARM_TABLE_TWIDDLECOEF_RFFT_F32_256 - - -DARM_TABLE_TWIDDLECOEF_RFFT_F32_512 - files: - - file: ${CMSIS_PACK_ROOT}/GorgonMeducer/perf_counter/1.9.11/lib/perf_counter.lib - category: library - groups: - - group: App - files: - - file: ../../tests/data/abf_f32_expected.c - category: sourceC - - file: ../../tests/data/abf_f32_input_ch1.c - category: sourceC - - file: ../../tests/data/abf_f32_input_ch2.c - category: sourceC - - file: ../../tests/test_abf_f32.c - category: sourceC - - file: platform_init.c - category: sourceC - - group: AudioMarkCore - misc: - C: - - -DFLOATING_POINT - files: - - file: ../../src/ee_abf_f32.c - category: sourceC - - file: ../../src/ee_abf_f32_tables.c - category: sourceC - - file: ../../src/ee_aec_f32.c - category: sourceC - - file: ../../src/ee_anr_f32.c - category: sourceC - - file: ../../src/ee_kws.c - category: sourceC - - file: ../../src/ee_mfcc_f32.c - category: sourceC - - file: ../../src/ee_mfcc_f32_tables.c - category: sourceC - - file: ../../src/ee_nn_tables.c - category: sourceC - - file: ../../ports/arm/th_api.c - category: sourceC - - group: Libspeex - misc: - C: - - -DUSE_CMSIS_DSP - - -DFLOATING_POINT - - -DOVERRIDE_FB_COMPUTE_BANK32 - - -DOVERRIDE_FB_COMPUTE_PSD16 - - -DOVERRIDE_ANR_VEC_MUL - - -DOVERRIDE_ANR_UPDATE_NOISE_ESTIMATE - - -DOVERRIDE_ANR_APOSTERIORI_SNR - - -DOVERRIDE_ANR_POWER_SPECTRUM - - -DOVERRIDE_ANR_COMPUTE_GAIN_FLOOR - - -DOVERRIDE_ANR_UPDATE_ZETA - - -DOVERRIDE_ANR_UPDATE_GAINS_CRITICAL_BANDS - - -DOVERRIDE_ANR_UPDATE_GAINS_LINEAR - - -DOVERRIDE_ANR_APPLY_SPEC_GAIN - - -DOVERRIDE_ANR_OLA - - -DOVERRIDE_ANR_UPDATE_NOISE_PROB - - -DOVERRIDE_MDF_DC_NOTCH - - -DOVERRIDE_MDF_INNER_PROD - - -DOVERRIDE_MDF_POWER_SPECTRUM - - -DOVERRIDE_MDF_POWER_SPECTRUM_ACCUM - - -DOVERRIDE_MDF_SPECTRAL_MUL_ACCUM - - -DOVERRIDE_MDF_WEIGHT_SPECT_MUL_CONJ - - -DOVERRIDE_MDF_ADJUST_PROP - - -DOVERRIDE_MDF_PREEMPH_FLT - - -DOVERRIDE_MDF_STRIDED_PREEMPH_FLT - - -DOVERRIDE_MDF_VEC_SUB - - -DOVERRIDE_MDF_VEC_SUB16 - - -DOVERRIDE_MDF_VEC_ADD - - -DOVERRIDE_MDF_SMOOTHED_ADD - - -DOVERRIDE_MDF_DEEMPH - - -DOVERRIDE_MDF_SMOOTH_FE_NRG - - -DOVERRIDE_MDF_FILTERED_SPEC_AD_XCORR - - -DOVERRIDE_MDF_NORM_LEARN_RATE_CALC - - -DOVERRIDE_MDF_CONVERG_LEARN_RATE_CALC - - -DOVERRIDE_MDF_VEC_SCALE - - -DEXPORT=/**/ - files: - - file: ../../lib/speexdsp/libspeexdsp/buffer.c - category: sourceC - - file: ../../lib/speexdsp/libspeexdsp/fftwrap.c - category: sourceC - - file: ../../lib/speexdsp/libspeexdsp/filterbank.c - category: sourceC - - file: ../../lib/speexdsp/libspeexdsp/jitter.c - category: sourceC - - file: ../../lib/speexdsp/libspeexdsp/kiss_fft.c - category: sourceC - - file: ../../lib/speexdsp/libspeexdsp/kiss_fftr.c - category: sourceC - - file: ../../lib/speexdsp/libspeexdsp/mdf.c - category: sourceC - - file: ../../lib/speexdsp/libspeexdsp/preprocess.c - category: sourceC - - file: ../../lib/speexdsp/libspeexdsp/resample.c - category: sourceC - - file: ../../lib/speexdsp/libspeexdsp/scal.c - category: sourceC - - file: ../../lib/speexdsp/libspeexdsp/smallft.c - category: sourceC - constructed-files: - - file: RTE/_Release_MPS3-Corstone-310/Pre_Include_Global.h - category: preIncludeGlobal - - file: RTE/_Release_MPS3-Corstone-310/RTE_Components.h - category: header diff --git a/platform/cmsis/testabf.Release+MPS3-Corstone-310.cprj b/platform/cmsis/testabf.Release+MPS3-Corstone-310.cprj index 128239d..cf07871 100644 --- a/platform/cmsis/testabf.Release+MPS3-Corstone-310.cprj +++ b/platform/cmsis/testabf.Release+MPS3-Corstone-310.cprj @@ -1,6 +1,6 @@ - + Automatically generated project @@ -13,6 +13,7 @@ + @@ -31,6 +32,7 @@ + @@ -55,9 +57,11 @@ + + @@ -80,6 +84,9 @@ + + + diff --git a/platform/cmsis/testabf.Release+VHT-Corstone-300.cprj b/platform/cmsis/testabf.Release+VHT-Corstone-300.cprj index 8d84af7..eccafcc 100644 --- a/platform/cmsis/testabf.Release+VHT-Corstone-300.cprj +++ b/platform/cmsis/testabf.Release+VHT-Corstone-300.cprj @@ -1,6 +1,6 @@ - + Automatically generated project diff --git a/platform/cmsis/testabf.Release+VHT-Corstone-310.cprj b/platform/cmsis/testabf.Release+VHT-Corstone-310.cprj index 8220e59..5511e45 100644 --- a/platform/cmsis/testabf.Release+VHT-Corstone-310.cprj +++ b/platform/cmsis/testabf.Release+VHT-Corstone-310.cprj @@ -1,6 +1,6 @@ - + Automatically generated project diff --git a/platform/cmsis/testabf.Release+VHT_M85.cprj b/platform/cmsis/testabf.Release+VHT_M85.cprj index 76e5aec..fc31e58 100644 --- a/platform/cmsis/testabf.Release+VHT_M85.cprj +++ b/platform/cmsis/testabf.Release+VHT_M85.cprj @@ -1,6 +1,6 @@ - + Automatically generated project diff --git a/platform/cmsis/testabf.cproject.yml b/platform/cmsis/testabf.cproject.yml index 3493309..1751330 100755 --- a/platform/cmsis/testabf.cproject.yml +++ b/platform/cmsis/testabf.cproject.yml @@ -41,6 +41,8 @@ project: - layer: boot.clayer.yml - layer: speex.clayer.yml - layer: audiomark_core.clayer.yml - - layer: printf_mps3.clayer.yml - for-type: - - +MPS3-Corstone-300 + - layer: printf_mpsx.clayer.yml + not-for-context: + - +VHT-Corstone-300 + - +VHT-Corstone-310 + - +VHT_M85 diff --git a/platform/cmsis/testaec.Release+MPS2-CMSDK_CM4_FP.cprj b/platform/cmsis/testaec.Release+MPS2-CMSDK_CM4_FP.cprj new file mode 100644 index 0000000..7098117 --- /dev/null +++ b/platform/cmsis/testaec.Release+MPS2-CMSDK_CM4_FP.cprj @@ -0,0 +1,90 @@ + + + + + + Automatically generated project + + + + + + + + + + + + + + + + + + + + + + + OS_SUPPORT_CUSTOM;GENERIC_ARCH + .;../../lib/speexdsp/include;../../lib/speexdsp/libspeexdsp;../../ports/arm/;../../ports/arm/libs/CMSIS-NN/Include;../../src/;../../lib/speexdsp/include/speex/;../../lib/speexdsp/ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/platform/cmsis/testaec.Release+MPS2-CMSDK_CM7_SP.cprj b/platform/cmsis/testaec.Release+MPS2-CMSDK_CM7_SP.cprj new file mode 100644 index 0000000..c717080 --- /dev/null +++ b/platform/cmsis/testaec.Release+MPS2-CMSDK_CM7_SP.cprj @@ -0,0 +1,90 @@ + + + + + + Automatically generated project + + + + + + + + + + + + + + + + + + + + + + + OS_SUPPORT_CUSTOM;GENERIC_ARCH + .;../../lib/speexdsp/include;../../lib/speexdsp/libspeexdsp;../../ports/arm/;../../ports/arm/libs/CMSIS-NN/Include;../../src/;../../lib/speexdsp/include/speex/;../../lib/speexdsp/ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/platform/cmsis/testaec.Release+MPS2-IOTKit-CM33.cprj b/platform/cmsis/testaec.Release+MPS2-IOTKit-CM33.cprj new file mode 100644 index 0000000..f8cdf73 --- /dev/null +++ b/platform/cmsis/testaec.Release+MPS2-IOTKit-CM33.cprj @@ -0,0 +1,91 @@ + + + + + + Automatically generated project + + + + + + + + + + + + + + + + + + + + + + + OS_SUPPORT_CUSTOM;GENERIC_ARCH + .;../../lib/speexdsp/include;../../lib/speexdsp/libspeexdsp;../../ports/arm/;../../ports/arm/libs/CMSIS-NN/Include;../../src/;../../lib/speexdsp/include/speex/;../../lib/speexdsp/ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/platform/cmsis/testaec.Release+MPS3-Corstone-300.cprj b/platform/cmsis/testaec.Release+MPS3-Corstone-300.cprj index 3480550..b75bb12 100644 --- a/platform/cmsis/testaec.Release+MPS3-Corstone-300.cprj +++ b/platform/cmsis/testaec.Release+MPS3-Corstone-300.cprj @@ -1,6 +1,6 @@ - + Automatically generated project diff --git a/platform/cmsis/testaec.Release+MPS3-Corstone-310.cbuild.yml b/platform/cmsis/testaec.Release+MPS3-Corstone-310.cbuild.yml deleted file mode 100644 index 18dde93..0000000 --- a/platform/cmsis/testaec.Release+MPS3-Corstone-310.cbuild.yml +++ /dev/null @@ -1,499 +0,0 @@ -build: - solution: audiomark.csolution.yml - project: testaec.cproject.yml - context: testaec.Release+MPS3-Corstone-310 - compiler: AC6 - device: ARM::SSE-310-MPS3 - processor: - fpu: on - trustzone: non-secure - packs: - - pack: ARM::CMSIS-DSP@1.14.2 - path: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2 - - pack: ARM::CMSIS-NN@4.0.0 - path: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0 - - pack: ARM::CMSIS@5.9.0 - path: ${CMSIS_PACK_ROOT}/ARM/CMSIS/5.9.0 - - pack: ARM::DMA350@1.0.0 - path: ${CMSIS_PACK_ROOT}/ARM/DMA350/1.0.0 - - pack: ARM::V2M_MPS3_SSE_310_BSP@1.1.0 - path: ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0 - - pack: GorgonMeducer::perf_counter@1.9.11 - path: ${CMSIS_PACK_ROOT}/GorgonMeducer/perf_counter/1.9.11 - debug: on - misc: - ASM: - - -masm=auto - C: - - -std=gnu11 - - -fshort-enums -fshort-wchar - - -Ofast - - -ffast-math - CPP: - - -std=c++11 - - -fno-rtti - - -Ofast - - -ffast-math - Link: - - --info=summarysizes - - --info=sizes - - --info=totals - - --info=unused - - --info=veneers - define: - - OS_SUPPORT_CUSTOM - - _RTE_ - add-path: - - . - - ../../lib/speexdsp/include - - ../../lib/speexdsp/libspeexdsp - - ../../ports/arm/ - - ../../ports/arm/libs/CMSIS-NN/Include - - ../../src/ - - ../../lib/speexdsp/include/speex/ - - ../../lib/speexdsp/ - - RTE/Device/SSE-310-MPS3 - - RTE/_Release_MPS3-Corstone-310 - - ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Include - - ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/PrivateInclude - - ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Include - - ${CMSIS_PACK_ROOT}/ARM/CMSIS/5.9.0/CMSIS/Core/Include - - ${CMSIS_PACK_ROOT}/ARM/DMA350/1.0.0/MDH_API - - ${CMSIS_PACK_ROOT}/ARM/DMA350/1.0.0/Native_Driver - - ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0/Board/Device_Definition - - ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0/Board/Platform - - ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0/Device/Include - - ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0/MDH_Driver - - ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0/Native_Driver - - ${CMSIS_PACK_ROOT}/GorgonMeducer/perf_counter/1.9.11/lib - output-type: exe - output-dirs: - intdir: tmp/testaec/MPS3-Corstone-310/Release - outdir: out/testaec/MPS3-Corstone-310/Release - rtedir: RTE - components: - - component: ARM::CMSIS:CORE@5.6.0 - condition: ARMv6_7_8-M Device - from-pack: ARM::CMSIS@5.9.0 - selected-by: ARM::CMSIS:CORE - - component: ARM::CMSIS:DSP&Source@1.14.2 - condition: CMSISCORE - from-pack: ARM::CMSIS-DSP@1.14.2 - selected-by: ARM::CMSIS:DSP&Source@1.14.2 - files: - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/BasicMathFunctions/BasicMathFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/BasicMathFunctions/BasicMathFunctionsF16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/BayesFunctions/BayesFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/BayesFunctions/BayesFunctionsF16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/CommonTables/CommonTables.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/CommonTables/CommonTablesF16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/ComplexMathFunctions/ComplexMathFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/ComplexMathFunctions/ComplexMathFunctionsF16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/ControllerFunctions/ControllerFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/DistanceFunctions/DistanceFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/DistanceFunctions/DistanceFunctionsF16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/FastMathFunctions/FastMathFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/FastMathFunctions/FastMathFunctionsF16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/FilteringFunctions/FilteringFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/FilteringFunctions/FilteringFunctionsF16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/InterpolationFunctions/InterpolationFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/InterpolationFunctions/InterpolationFunctionsF16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/MatrixFunctions/MatrixFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/MatrixFunctions/MatrixFunctionsF16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/QuaternionMathFunctions/QuaternionMathFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/SVMFunctions/SVMFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/SVMFunctions/SVMFunctionsF16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/StatisticsFunctions/StatisticsFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/StatisticsFunctions/StatisticsFunctionsF16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/SupportFunctions/SupportFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/SupportFunctions/SupportFunctionsF16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/TransformFunctions/TransformFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/TransformFunctions/TransformFunctionsF16.c - category: source - - component: ARM::CMSIS:NN Lib@4.0.0 - condition: CMSIS-NN - from-pack: ARM::CMSIS-NN@4.0.0 - selected-by: ARM::CMSIS:NN@4.0.0 - files: - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ActivationFunctions/arm_nn_activation_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ActivationFunctions/arm_relu6_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ActivationFunctions/arm_relu_q15.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ActivationFunctions/arm_relu_q7.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/BasicMathFunctions/arm_elementwise_add_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/BasicMathFunctions/arm_elementwise_add_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/BasicMathFunctions/arm_elementwise_mul_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/BasicMathFunctions/arm_elementwise_mul_s16_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/BasicMathFunctions/arm_elementwise_mul_s8.c - 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- file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_depthwise_conv_nt_t_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_depthwise_conv_nt_t_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_lstm_calculate_gate_s8_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_lstm_step_s8_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_lstm_update_cell_state_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_lstm_update_output_s8_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_mat_mul_core_1x_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_mat_mul_core_4x_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_mat_mul_kernel_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_mat_mult_nt_t_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_vec_mat_mul_result_acc_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_svdf_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nntables.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_q7_to_q15_with_offset.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/PoolingFunctions/arm_avgpool_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/PoolingFunctions/arm_avgpool_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/PoolingFunctions/arm_max_pool_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/PoolingFunctions/arm_max_pool_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ReshapeFunctions/arm_reshape_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/SVDFunctions/arm_svdf_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/SVDFunctions/arm_svdf_state_s16_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/SoftmaxFunctions/arm_nn_softmax_common_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/SoftmaxFunctions/arm_softmax_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/SoftmaxFunctions/arm_softmax_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/SoftmaxFunctions/arm_softmax_s8_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/SoftmaxFunctions/arm_softmax_u8.c - category: source - - component: ARM::Device:Definition@1.1.0 - condition: SSE-310-MPS3 Device - from-pack: ARM::V2M_MPS3_SSE_310_BSP@1.1.0 - selected-by: ARM::Device:Definition - files: - - file: ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0/Board/Device_Definition/device_definition.c - category: source - - file: RTE/Device/SSE-310-MPS3/platform_base_address.h - category: header - attr: config - version: 1.0.0 - - component: ARM::Device:Startup&Baremetal@1.0.1 - condition: SSE-310-MPS3 Device - from-pack: ARM::V2M_MPS3_SSE_310_BSP@1.1.0 - selected-by: ARM::Device:Startup&Baremetal - files: - - file: RTE/Device/SSE-310-MPS3/cmsis_driver_config.h - category: header - attr: config - version: 1.0.0 - - file: RTE/Device/SSE-310-MPS3/RTE_Device.h - category: header - attr: config - version: 1.0.0 - - file: RTE/Device/SSE-310-MPS3/device_cfg.h - category: header - attr: config - version: 1.0.0 - - file: RTE/Device/SSE-310-MPS3/region_defs.h - category: header - attr: config - version: 1.0.0 - - file: RTE/Device/SSE-310-MPS3/region_limits.h - category: header - attr: config - version: 1.0.0 - - file: RTE/Device/SSE-310-MPS3/system_SSE310MPS3.h - category: header - attr: config - version: 1.0.0 - - file: RTE/Device/SSE-310-MPS3/corstone310_mps3_s.sct - category: linkerScript - attr: config - version: 1.0.0 - - file: RTE/Device/SSE-310-MPS3/startup_SSE310MPS3.c - category: source - attr: config - version: 1.0.0 - - file: RTE/Device/SSE-310-MPS3/system_SSE310MPS3.c - category: source - attr: config - version: 1.0.0 - - component: ARM::MCU Driver HAL:DMA350@1.0.0 - condition: SSE-310-MPS3 MDH DMA350 - from-pack: ARM::V2M_MPS3_SSE_310_BSP@1.1.0 - selected-by: ARM::MCU Driver HAL:DMA350 - files: - - file: ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0/MDH_Driver/mps3_dma.c - category: source - - component: ARM::Native Driver:DMA350 Remap:Custom@1.0.0 - condition: DMA350 Remap - from-pack: ARM::DMA350@1.0.0 - selected-by: ARM::Native Driver:DMA350 Remap - - component: ARM::Native Driver:DMA350 Remap:SSE-310 Remap@1.0.0 - condition: SSE-310-MPS3 DMA350 - from-pack: ARM::V2M_MPS3_SSE_310_BSP@1.1.0 - selected-by: ARM::Native Driver:DMA350 Remap:SSE-310 - files: - - file: ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0/Device/Source/dma350_address_remap.c - category: source - - component: ARM::Native Driver:DMA350@1.1.0 - condition: DMA350 - from-pack: ARM::DMA350@1.0.0 - selected-by: ARM::Native Driver:DMA350 - files: - - file: ${CMSIS_PACK_ROOT}/ARM/DMA350/1.0.0/Native_Driver/dma350_ch_drv.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/DMA350/1.0.0/Native_Driver/dma350_drv.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/DMA350/1.0.0/Native_Driver/dma350_lib.c - category: source - - component: ARM::Native Driver:SysCounter@1.0.0 - condition: SSE-310-MPS3 Device - from-pack: ARM::V2M_MPS3_SSE_310_BSP@1.1.0 - selected-by: ARM::Native Driver:SysCounter - files: - - file: ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0/Native_Driver/syscounter_armv8-m_cntrl_drv.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0/Native_Driver/syscounter_armv8-m_read_drv.c - category: source - - component: ARM::Native Driver:SysTimer@1.0.0 - condition: SSE-310-MPS3 Device - from-pack: ARM::V2M_MPS3_SSE_310_BSP@1.1.0 - selected-by: ARM::Native Driver:SysTimer - files: - - file: ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0/Native_Driver/systimer_armv8-m_drv.c - category: source - - component: ARM::Native Driver:Timeout@1.0.0 - condition: SSE-310-MPS3 Systimer Syscounter - from-pack: ARM::V2M_MPS3_SSE_310_BSP@1.1.0 - selected-by: ARM::Native Driver:Timeout - files: - - file: ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0/Native_Driver/systimer_armv8-m_timeout.c - category: source - - component: GorgonMeducer::Utilities&Performance Counter:perf_counter:Core&Library@1.9.11 - condition: CMSIS-CORE - from-pack: GorgonMeducer::perf_counter@1.9.11 - selected-by: perf_counter:Core - misc: - C: - - -DARM_DSP_CONFIG_TABLES - - -DARM_FAST_ALLOW_TABLES - - -DARM_FFT_ALLOW_TABLES - - -DARM_ALL_FAST_TABLES - - -DARM_MATH_LOOPUNROLL - - -DARM_TABLE_BITREVIDX_FXT_128 - - -DARM_TABLE_BITREVIDX_FXT_256 - - -DARM_TABLE_BITREVIDX_FXT_512 - - -DARM_TABLE_TWIDDLECOEF_F32_128 -DARM_TABLE_BITREVIDX_FLT_128 - - -DARM_TABLE_TWIDDLECOEF_F32_256 -DARM_TABLE_BITREVIDX_FLT_256 - - -DARM_TABLE_TWIDDLECOEF_F32_512 -DARM_TABLE_BITREVIDX_FLT_512 - - -DARM_TABLE_TWIDDLECOEF_RFFT_F32_128 - - -DARM_TABLE_TWIDDLECOEF_RFFT_F32_256 - - -DARM_TABLE_TWIDDLECOEF_RFFT_F32_512 - files: - - file: ${CMSIS_PACK_ROOT}/GorgonMeducer/perf_counter/1.9.11/lib/perf_counter.lib - category: library - groups: - - group: App - files: - - file: ../../tests/data/aec_f32_expected.c - category: sourceC - - file: ../../tests/data/aec_f32_input_echo.c - category: sourceC - - file: ../../tests/data/aec_f32_input_source.c - category: sourceC - - file: ../../tests/test_aec_f32.c - category: sourceC - - file: platform_init.c - category: sourceC - - group: AudioMarkCore - misc: - C: - - -DFLOATING_POINT - files: - - file: ../../src/ee_abf_f32.c - category: sourceC - - file: ../../src/ee_abf_f32_tables.c - category: sourceC - - file: ../../src/ee_aec_f32.c - category: sourceC - - file: ../../src/ee_anr_f32.c - category: sourceC - - file: ../../src/ee_kws.c - category: sourceC - - file: ../../src/ee_mfcc_f32.c - category: sourceC - - file: ../../src/ee_mfcc_f32_tables.c - category: sourceC - - file: ../../src/ee_nn_tables.c - category: sourceC - - file: ../../ports/arm/th_api.c - category: sourceC - - group: Libspeex - misc: - C: - - -DUSE_CMSIS_DSP - - -DFLOATING_POINT - - -DOVERRIDE_FB_COMPUTE_BANK32 - - -DOVERRIDE_FB_COMPUTE_PSD16 - - -DOVERRIDE_ANR_VEC_MUL - - -DOVERRIDE_ANR_UPDATE_NOISE_ESTIMATE - - -DOVERRIDE_ANR_APOSTERIORI_SNR - - -DOVERRIDE_ANR_POWER_SPECTRUM - - -DOVERRIDE_ANR_COMPUTE_GAIN_FLOOR - - -DOVERRIDE_ANR_UPDATE_ZETA - - -DOVERRIDE_ANR_UPDATE_GAINS_CRITICAL_BANDS - - -DOVERRIDE_ANR_UPDATE_GAINS_LINEAR - - -DOVERRIDE_ANR_APPLY_SPEC_GAIN - - -DOVERRIDE_ANR_OLA - - -DOVERRIDE_ANR_UPDATE_NOISE_PROB - - -DOVERRIDE_MDF_DC_NOTCH - - -DOVERRIDE_MDF_INNER_PROD - - -DOVERRIDE_MDF_POWER_SPECTRUM - - -DOVERRIDE_MDF_POWER_SPECTRUM_ACCUM - - -DOVERRIDE_MDF_SPECTRAL_MUL_ACCUM - - -DOVERRIDE_MDF_WEIGHT_SPECT_MUL_CONJ - - -DOVERRIDE_MDF_ADJUST_PROP - - -DOVERRIDE_MDF_PREEMPH_FLT - - -DOVERRIDE_MDF_STRIDED_PREEMPH_FLT - - -DOVERRIDE_MDF_VEC_SUB - - -DOVERRIDE_MDF_VEC_SUB16 - - -DOVERRIDE_MDF_VEC_ADD - - -DOVERRIDE_MDF_SMOOTHED_ADD - - -DOVERRIDE_MDF_DEEMPH - - -DOVERRIDE_MDF_SMOOTH_FE_NRG - - -DOVERRIDE_MDF_FILTERED_SPEC_AD_XCORR - - -DOVERRIDE_MDF_NORM_LEARN_RATE_CALC - - -DOVERRIDE_MDF_CONVERG_LEARN_RATE_CALC - - -DOVERRIDE_MDF_VEC_SCALE - - -DEXPORT=/**/ - files: - - file: ../../lib/speexdsp/libspeexdsp/buffer.c - category: sourceC - - file: ../../lib/speexdsp/libspeexdsp/fftwrap.c - category: sourceC - - file: ../../lib/speexdsp/libspeexdsp/filterbank.c - category: sourceC - - file: ../../lib/speexdsp/libspeexdsp/jitter.c - category: sourceC - - file: ../../lib/speexdsp/libspeexdsp/kiss_fft.c - category: sourceC - - file: ../../lib/speexdsp/libspeexdsp/kiss_fftr.c - category: sourceC - - file: ../../lib/speexdsp/libspeexdsp/mdf.c - category: sourceC - - file: ../../lib/speexdsp/libspeexdsp/preprocess.c - category: sourceC - - file: ../../lib/speexdsp/libspeexdsp/resample.c - category: sourceC - - file: ../../lib/speexdsp/libspeexdsp/scal.c - category: sourceC - - file: ../../lib/speexdsp/libspeexdsp/smallft.c - category: sourceC - constructed-files: - - file: RTE/_Release_MPS3-Corstone-310/Pre_Include_Global.h - category: preIncludeGlobal - - file: RTE/_Release_MPS3-Corstone-310/RTE_Components.h - category: header diff --git a/platform/cmsis/testaec.Release+MPS3-Corstone-310.cprj b/platform/cmsis/testaec.Release+MPS3-Corstone-310.cprj index 119b332..e9409d1 100644 --- a/platform/cmsis/testaec.Release+MPS3-Corstone-310.cprj +++ b/platform/cmsis/testaec.Release+MPS3-Corstone-310.cprj @@ -1,6 +1,6 @@ - + Automatically generated project @@ -13,6 +13,7 @@ + @@ -31,6 +32,7 @@ + @@ -55,9 +57,11 @@ + + @@ -80,6 +84,9 @@ + + + diff --git a/platform/cmsis/testaec.Release+VHT-Corstone-300.cprj b/platform/cmsis/testaec.Release+VHT-Corstone-300.cprj index 9526afe..7f267a8 100644 --- a/platform/cmsis/testaec.Release+VHT-Corstone-300.cprj +++ b/platform/cmsis/testaec.Release+VHT-Corstone-300.cprj @@ -1,6 +1,6 @@ - + Automatically generated project diff --git a/platform/cmsis/testaec.Release+VHT-Corstone-310.cprj b/platform/cmsis/testaec.Release+VHT-Corstone-310.cprj index 5a2a659..1712443 100644 --- a/platform/cmsis/testaec.Release+VHT-Corstone-310.cprj +++ b/platform/cmsis/testaec.Release+VHT-Corstone-310.cprj @@ -1,6 +1,6 @@ - + Automatically generated project diff --git a/platform/cmsis/testaec.Release+VHT_M85.cprj b/platform/cmsis/testaec.Release+VHT_M85.cprj index 9a148ea..a448714 100644 --- a/platform/cmsis/testaec.Release+VHT_M85.cprj +++ b/platform/cmsis/testaec.Release+VHT_M85.cprj @@ -1,6 +1,6 @@ - + Automatically generated project diff --git a/platform/cmsis/testaec.cproject.yml b/platform/cmsis/testaec.cproject.yml index 7d71ccf..bdac805 100755 --- a/platform/cmsis/testaec.cproject.yml +++ b/platform/cmsis/testaec.cproject.yml @@ -41,6 +41,8 @@ project: - layer: boot.clayer.yml - layer: speex.clayer.yml - layer: audiomark_core.clayer.yml - - layer: printf_mps3.clayer.yml - for-type: - - +MPS3-Corstone-300 + - layer: printf_mpsx.clayer.yml + not-for-context: + - +VHT-Corstone-300 + - +VHT-Corstone-310 + - +VHT_M85 diff --git a/platform/cmsis/testanr.Release+MPS2-CMSDK_CM4_FP.cprj b/platform/cmsis/testanr.Release+MPS2-CMSDK_CM4_FP.cprj new file mode 100644 index 0000000..d534db4 --- /dev/null +++ b/platform/cmsis/testanr.Release+MPS2-CMSDK_CM4_FP.cprj @@ -0,0 +1,91 @@ + + + + + + Automatically generated project + + + + + + + + + + + + + + + + + + + + + + + OS_SUPPORT_CUSTOM;GENERIC_ARCH + .;../../lib/speexdsp/include;../../lib/speexdsp/libspeexdsp;../../ports/arm/;../../ports/arm/libs/CMSIS-NN/Include;../../src/;../../lib/speexdsp/include/speex/;../../lib/speexdsp/ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/platform/cmsis/testanr.Release+MPS2-CMSDK_CM7_SP.cprj b/platform/cmsis/testanr.Release+MPS2-CMSDK_CM7_SP.cprj new file mode 100644 index 0000000..5fca88b --- /dev/null +++ b/platform/cmsis/testanr.Release+MPS2-CMSDK_CM7_SP.cprj @@ -0,0 +1,91 @@ + + + + + + Automatically generated project + + + + + + + + + + + + + + + + + + + + + + + OS_SUPPORT_CUSTOM;GENERIC_ARCH + .;../../lib/speexdsp/include;../../lib/speexdsp/libspeexdsp;../../ports/arm/;../../ports/arm/libs/CMSIS-NN/Include;../../src/;../../lib/speexdsp/include/speex/;../../lib/speexdsp/ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/platform/cmsis/testanr.Release+MPS2-IOTKit-CM33.cprj b/platform/cmsis/testanr.Release+MPS2-IOTKit-CM33.cprj new file mode 100644 index 0000000..a636990 --- /dev/null +++ b/platform/cmsis/testanr.Release+MPS2-IOTKit-CM33.cprj @@ -0,0 +1,92 @@ + + + + + + Automatically generated project + + + + + + + + + + + + + + + + + + + + + + + OS_SUPPORT_CUSTOM;GENERIC_ARCH + .;../../lib/speexdsp/include;../../lib/speexdsp/libspeexdsp;../../ports/arm/;../../ports/arm/libs/CMSIS-NN/Include;../../src/;../../lib/speexdsp/include/speex/;../../lib/speexdsp/ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/platform/cmsis/testanr.Release+MPS3-Corstone-300.cprj b/platform/cmsis/testanr.Release+MPS3-Corstone-300.cprj index f86eb20..6365afe 100644 --- a/platform/cmsis/testanr.Release+MPS3-Corstone-300.cprj +++ b/platform/cmsis/testanr.Release+MPS3-Corstone-300.cprj @@ -1,6 +1,6 @@ - + Automatically generated project diff --git a/platform/cmsis/testanr.Release+MPS3-Corstone-310.cbuild.yml b/platform/cmsis/testanr.Release+MPS3-Corstone-310.cbuild.yml deleted file mode 100644 index f4cf5be..0000000 --- a/platform/cmsis/testanr.Release+MPS3-Corstone-310.cbuild.yml +++ /dev/null @@ -1,501 +0,0 @@ -build: - solution: audiomark.csolution.yml - project: testanr.cproject.yml - context: testanr.Release+MPS3-Corstone-310 - compiler: AC6 - device: ARM::SSE-310-MPS3 - processor: - fpu: on - trustzone: non-secure - packs: - - pack: ARM::CMSIS-DSP@1.14.2 - path: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2 - - pack: ARM::CMSIS-NN@4.0.0 - path: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0 - - pack: ARM::CMSIS@5.9.0 - path: ${CMSIS_PACK_ROOT}/ARM/CMSIS/5.9.0 - - pack: ARM::DMA350@1.0.0 - path: ${CMSIS_PACK_ROOT}/ARM/DMA350/1.0.0 - - pack: ARM::V2M_MPS3_SSE_310_BSP@1.1.0 - path: ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0 - - pack: GorgonMeducer::perf_counter@1.9.11 - path: ${CMSIS_PACK_ROOT}/GorgonMeducer/perf_counter/1.9.11 - debug: on - misc: - ASM: - - -masm=auto - C: - - -std=gnu11 - - -fshort-enums -fshort-wchar - - -Ofast - - -ffast-math - CPP: - - -std=c++11 - - -fno-rtti - - -Ofast - - -ffast-math - Link: - - --info=summarysizes - - --info=sizes - - --info=totals - - --info=unused - - --info=veneers - define: - - OS_SUPPORT_CUSTOM - - _RTE_ - add-path: - - . - - ../../lib/speexdsp/include - - ../../lib/speexdsp/libspeexdsp - - ../../ports/arm/ - - ../../ports/arm/libs/CMSIS-NN/Include - - ../../src/ - - ../../lib/speexdsp/include/speex/ - - ../../lib/speexdsp/ - - RTE/Device/SSE-310-MPS3 - - RTE/_Release_MPS3-Corstone-310 - - ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Include - - ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/PrivateInclude - - ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Include - - ${CMSIS_PACK_ROOT}/ARM/CMSIS/5.9.0/CMSIS/Core/Include - - ${CMSIS_PACK_ROOT}/ARM/DMA350/1.0.0/MDH_API - - ${CMSIS_PACK_ROOT}/ARM/DMA350/1.0.0/Native_Driver - - ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0/Board/Device_Definition - - ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0/Board/Platform - - ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0/Device/Include - - ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0/MDH_Driver - - ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0/Native_Driver - - ${CMSIS_PACK_ROOT}/GorgonMeducer/perf_counter/1.9.11/lib - output-type: exe - output-dirs: - intdir: tmp/testanr/MPS3-Corstone-310/Release - outdir: out/testanr/MPS3-Corstone-310/Release - rtedir: RTE - components: - - component: ARM::CMSIS:CORE@5.6.0 - condition: ARMv6_7_8-M Device - from-pack: ARM::CMSIS@5.9.0 - selected-by: ARM::CMSIS:CORE - - component: ARM::CMSIS:DSP&Source@1.14.2 - condition: CMSISCORE - from-pack: ARM::CMSIS-DSP@1.14.2 - selected-by: ARM::CMSIS:DSP&Source@1.14.2 - files: - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/BasicMathFunctions/BasicMathFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/BasicMathFunctions/BasicMathFunctionsF16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/BayesFunctions/BayesFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/BayesFunctions/BayesFunctionsF16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/CommonTables/CommonTables.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/CommonTables/CommonTablesF16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/ComplexMathFunctions/ComplexMathFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/ComplexMathFunctions/ComplexMathFunctionsF16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/ControllerFunctions/ControllerFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/DistanceFunctions/DistanceFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/DistanceFunctions/DistanceFunctionsF16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/FastMathFunctions/FastMathFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/FastMathFunctions/FastMathFunctionsF16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/FilteringFunctions/FilteringFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/FilteringFunctions/FilteringFunctionsF16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/InterpolationFunctions/InterpolationFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/InterpolationFunctions/InterpolationFunctionsF16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/MatrixFunctions/MatrixFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/MatrixFunctions/MatrixFunctionsF16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/QuaternionMathFunctions/QuaternionMathFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/SVMFunctions/SVMFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/SVMFunctions/SVMFunctionsF16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/StatisticsFunctions/StatisticsFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/StatisticsFunctions/StatisticsFunctionsF16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/SupportFunctions/SupportFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/SupportFunctions/SupportFunctionsF16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/TransformFunctions/TransformFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/TransformFunctions/TransformFunctionsF16.c - category: source - - component: ARM::CMSIS:NN Lib@4.0.0 - condition: CMSIS-NN - from-pack: ARM::CMSIS-NN@4.0.0 - selected-by: ARM::CMSIS:NN@4.0.0 - files: - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ActivationFunctions/arm_nn_activation_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ActivationFunctions/arm_relu6_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ActivationFunctions/arm_relu_q15.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ActivationFunctions/arm_relu_q7.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/BasicMathFunctions/arm_elementwise_add_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/BasicMathFunctions/arm_elementwise_add_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/BasicMathFunctions/arm_elementwise_mul_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/BasicMathFunctions/arm_elementwise_mul_s16_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/BasicMathFunctions/arm_elementwise_mul_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConcatenationFunctions/arm_concatenation_s8_w.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConcatenationFunctions/arm_concatenation_s8_x.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConcatenationFunctions/arm_concatenation_s8_y.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConcatenationFunctions/arm_concatenation_s8_z.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_convolve_1_x_n_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_convolve_1x1_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_convolve_1x1_s8_fast.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_convolve_fast_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_convolve_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_convolve_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_convolve_wrapper_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_convolve_wrapper_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_depthwise_conv_3x3_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_depthwise_conv_fast_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_depthwise_conv_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_depthwise_conv_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_depthwise_conv_s8_opt.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_depthwise_conv_wrapper_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_depthwise_conv_wrapper_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_nn_depthwise_conv_s8_core.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_s8_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_nn_mat_mult_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/FullyConnectedFunctions/arm_fully_connected_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/FullyConnectedFunctions/arm_fully_connected_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/LSTMFunctions/arm_lstm_unidirectional_s8_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_depthwise_conv_nt_t_padded_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_depthwise_conv_nt_t_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_depthwise_conv_nt_t_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_lstm_calculate_gate_s8_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_lstm_step_s8_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_lstm_update_cell_state_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_lstm_update_output_s8_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_mat_mul_core_1x_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_mat_mul_core_4x_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_mat_mul_kernel_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_mat_mult_nt_t_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_vec_mat_mul_result_acc_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_svdf_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nntables.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_q7_to_q15_with_offset.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/PoolingFunctions/arm_avgpool_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/PoolingFunctions/arm_avgpool_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/PoolingFunctions/arm_max_pool_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/PoolingFunctions/arm_max_pool_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ReshapeFunctions/arm_reshape_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/SVDFunctions/arm_svdf_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/SVDFunctions/arm_svdf_state_s16_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/SoftmaxFunctions/arm_nn_softmax_common_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/SoftmaxFunctions/arm_softmax_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/SoftmaxFunctions/arm_softmax_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/SoftmaxFunctions/arm_softmax_s8_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/SoftmaxFunctions/arm_softmax_u8.c - category: source - - component: ARM::Device:Definition@1.1.0 - condition: SSE-310-MPS3 Device - from-pack: ARM::V2M_MPS3_SSE_310_BSP@1.1.0 - selected-by: ARM::Device:Definition - files: - - file: ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0/Board/Device_Definition/device_definition.c - category: source - - file: RTE/Device/SSE-310-MPS3/platform_base_address.h - category: header - attr: config - version: 1.0.0 - - component: ARM::Device:Startup&Baremetal@1.0.1 - condition: SSE-310-MPS3 Device - from-pack: ARM::V2M_MPS3_SSE_310_BSP@1.1.0 - selected-by: ARM::Device:Startup&Baremetal - files: - - file: RTE/Device/SSE-310-MPS3/cmsis_driver_config.h - category: header - attr: config - version: 1.0.0 - - file: RTE/Device/SSE-310-MPS3/RTE_Device.h - category: header - attr: config - version: 1.0.0 - - file: RTE/Device/SSE-310-MPS3/device_cfg.h - category: header - attr: config - version: 1.0.0 - - file: RTE/Device/SSE-310-MPS3/region_defs.h - category: header - attr: config - version: 1.0.0 - - file: RTE/Device/SSE-310-MPS3/region_limits.h - category: header - attr: config - version: 1.0.0 - - file: RTE/Device/SSE-310-MPS3/system_SSE310MPS3.h - category: header - attr: config - version: 1.0.0 - - file: RTE/Device/SSE-310-MPS3/corstone310_mps3_s.sct - category: linkerScript - attr: config - version: 1.0.0 - - file: RTE/Device/SSE-310-MPS3/startup_SSE310MPS3.c - category: source - attr: config - version: 1.0.0 - - file: RTE/Device/SSE-310-MPS3/system_SSE310MPS3.c - category: source - attr: config - version: 1.0.0 - - component: ARM::MCU Driver HAL:DMA350@1.0.0 - condition: SSE-310-MPS3 MDH DMA350 - from-pack: ARM::V2M_MPS3_SSE_310_BSP@1.1.0 - selected-by: ARM::MCU Driver HAL:DMA350 - files: - - file: ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0/MDH_Driver/mps3_dma.c - category: source - - component: ARM::Native Driver:DMA350 Remap:Custom@1.0.0 - condition: DMA350 Remap - from-pack: ARM::DMA350@1.0.0 - selected-by: ARM::Native Driver:DMA350 Remap - - component: ARM::Native Driver:DMA350 Remap:SSE-310 Remap@1.0.0 - condition: SSE-310-MPS3 DMA350 - from-pack: ARM::V2M_MPS3_SSE_310_BSP@1.1.0 - selected-by: ARM::Native Driver:DMA350 Remap:SSE-310 - files: - - file: ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0/Device/Source/dma350_address_remap.c - category: source - - component: ARM::Native Driver:DMA350@1.1.0 - condition: DMA350 - from-pack: ARM::DMA350@1.0.0 - selected-by: ARM::Native Driver:DMA350 - files: - - file: ${CMSIS_PACK_ROOT}/ARM/DMA350/1.0.0/Native_Driver/dma350_ch_drv.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/DMA350/1.0.0/Native_Driver/dma350_drv.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/DMA350/1.0.0/Native_Driver/dma350_lib.c - category: source - - component: ARM::Native Driver:SysCounter@1.0.0 - condition: SSE-310-MPS3 Device - from-pack: ARM::V2M_MPS3_SSE_310_BSP@1.1.0 - selected-by: ARM::Native Driver:SysCounter - files: - - file: ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0/Native_Driver/syscounter_armv8-m_cntrl_drv.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0/Native_Driver/syscounter_armv8-m_read_drv.c - category: source - - component: ARM::Native Driver:SysTimer@1.0.0 - condition: SSE-310-MPS3 Device - from-pack: ARM::V2M_MPS3_SSE_310_BSP@1.1.0 - selected-by: ARM::Native Driver:SysTimer - files: - - file: ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0/Native_Driver/systimer_armv8-m_drv.c - category: source - - component: ARM::Native Driver:Timeout@1.0.0 - condition: SSE-310-MPS3 Systimer Syscounter - from-pack: ARM::V2M_MPS3_SSE_310_BSP@1.1.0 - selected-by: ARM::Native Driver:Timeout - files: - - file: ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0/Native_Driver/systimer_armv8-m_timeout.c - category: source - - component: GorgonMeducer::Utilities&Performance Counter:perf_counter:Core&Library@1.9.11 - condition: CMSIS-CORE - from-pack: GorgonMeducer::perf_counter@1.9.11 - selected-by: perf_counter:Core - misc: - C: - - -DARM_DSP_CONFIG_TABLES - - -DARM_FAST_ALLOW_TABLES - - -DARM_FFT_ALLOW_TABLES - - -DARM_ALL_FAST_TABLES - - -DARM_MATH_LOOPUNROLL - - -DARM_TABLE_BITREVIDX_FXT_128 - - -DARM_TABLE_BITREVIDX_FXT_256 - - -DARM_TABLE_BITREVIDX_FXT_512 - - -DARM_TABLE_TWIDDLECOEF_F32_128 -DARM_TABLE_BITREVIDX_FLT_128 - - -DARM_TABLE_TWIDDLECOEF_F32_256 -DARM_TABLE_BITREVIDX_FLT_256 - - -DARM_TABLE_TWIDDLECOEF_F32_512 -DARM_TABLE_BITREVIDX_FLT_512 - - -DARM_TABLE_TWIDDLECOEF_RFFT_F32_128 - - -DARM_TABLE_TWIDDLECOEF_RFFT_F32_256 - - -DARM_TABLE_TWIDDLECOEF_RFFT_F32_512 - files: - - file: ${CMSIS_PACK_ROOT}/GorgonMeducer/perf_counter/1.9.11/lib/perf_counter.lib - category: library - groups: - - group: App - files: - - file: ../../tests/data/anr_f32_expected.c - category: sourceC - - file: ../../tests/data/anr_f32_input.c - category: sourceC - - file: ../../tests/test_anr_f32.c - category: sourceC - - file: ../../src/ee_nn_tables.c - category: sourceC - - file: ../../src/ee_abf_f32_tables.c - category: sourceC - - file: platform_init.c - category: sourceC - - group: AudioMarkCore - misc: - C: - - -DFLOATING_POINT - files: - - file: ../../src/ee_abf_f32.c - category: sourceC - - file: ../../src/ee_abf_f32_tables.c - category: sourceC - - file: ../../src/ee_aec_f32.c - category: sourceC - - file: ../../src/ee_anr_f32.c - category: sourceC - - file: ../../src/ee_kws.c - category: sourceC - - file: ../../src/ee_mfcc_f32.c - category: sourceC - - file: ../../src/ee_mfcc_f32_tables.c - category: sourceC - - file: ../../src/ee_nn_tables.c - category: sourceC - - file: ../../ports/arm/th_api.c - category: sourceC - - group: Libspeex - misc: - C: - - -DUSE_CMSIS_DSP - - -DFLOATING_POINT - - -DOVERRIDE_FB_COMPUTE_BANK32 - - -DOVERRIDE_FB_COMPUTE_PSD16 - - -DOVERRIDE_ANR_VEC_MUL - - -DOVERRIDE_ANR_UPDATE_NOISE_ESTIMATE - - -DOVERRIDE_ANR_APOSTERIORI_SNR - - -DOVERRIDE_ANR_POWER_SPECTRUM - - -DOVERRIDE_ANR_COMPUTE_GAIN_FLOOR - - -DOVERRIDE_ANR_UPDATE_ZETA - - -DOVERRIDE_ANR_UPDATE_GAINS_CRITICAL_BANDS - - -DOVERRIDE_ANR_UPDATE_GAINS_LINEAR - - -DOVERRIDE_ANR_APPLY_SPEC_GAIN - - -DOVERRIDE_ANR_OLA - - -DOVERRIDE_ANR_UPDATE_NOISE_PROB - - -DOVERRIDE_MDF_DC_NOTCH - - -DOVERRIDE_MDF_INNER_PROD - - -DOVERRIDE_MDF_POWER_SPECTRUM - - -DOVERRIDE_MDF_POWER_SPECTRUM_ACCUM - - -DOVERRIDE_MDF_SPECTRAL_MUL_ACCUM - - -DOVERRIDE_MDF_WEIGHT_SPECT_MUL_CONJ - - -DOVERRIDE_MDF_ADJUST_PROP - - -DOVERRIDE_MDF_PREEMPH_FLT - - -DOVERRIDE_MDF_STRIDED_PREEMPH_FLT - - -DOVERRIDE_MDF_VEC_SUB - - -DOVERRIDE_MDF_VEC_SUB16 - - -DOVERRIDE_MDF_VEC_ADD - - -DOVERRIDE_MDF_SMOOTHED_ADD - - -DOVERRIDE_MDF_DEEMPH - - -DOVERRIDE_MDF_SMOOTH_FE_NRG - - -DOVERRIDE_MDF_FILTERED_SPEC_AD_XCORR - - -DOVERRIDE_MDF_NORM_LEARN_RATE_CALC - - -DOVERRIDE_MDF_CONVERG_LEARN_RATE_CALC - - -DOVERRIDE_MDF_VEC_SCALE - - -DEXPORT=/**/ - files: - - file: ../../lib/speexdsp/libspeexdsp/buffer.c - category: sourceC - - file: ../../lib/speexdsp/libspeexdsp/fftwrap.c - category: sourceC - - file: ../../lib/speexdsp/libspeexdsp/filterbank.c - category: sourceC - - file: ../../lib/speexdsp/libspeexdsp/jitter.c - category: sourceC - - file: ../../lib/speexdsp/libspeexdsp/kiss_fft.c - category: sourceC - - file: ../../lib/speexdsp/libspeexdsp/kiss_fftr.c - category: sourceC - - file: ../../lib/speexdsp/libspeexdsp/mdf.c - category: sourceC - - file: ../../lib/speexdsp/libspeexdsp/preprocess.c - category: sourceC - - file: ../../lib/speexdsp/libspeexdsp/resample.c - category: sourceC - - file: ../../lib/speexdsp/libspeexdsp/scal.c - category: sourceC - - file: ../../lib/speexdsp/libspeexdsp/smallft.c - category: sourceC - constructed-files: - - file: RTE/_Release_MPS3-Corstone-310/Pre_Include_Global.h - category: preIncludeGlobal - - file: RTE/_Release_MPS3-Corstone-310/RTE_Components.h - category: header diff --git a/platform/cmsis/testanr.Release+MPS3-Corstone-310.cprj b/platform/cmsis/testanr.Release+MPS3-Corstone-310.cprj index c7e7cd2..db5d3a2 100644 --- a/platform/cmsis/testanr.Release+MPS3-Corstone-310.cprj +++ b/platform/cmsis/testanr.Release+MPS3-Corstone-310.cprj @@ -1,6 +1,6 @@ - + Automatically generated project @@ -13,6 +13,7 @@ + @@ -31,6 +32,7 @@ + @@ -55,9 +57,11 @@ + + @@ -81,6 +85,9 @@ + + + diff --git a/platform/cmsis/testanr.Release+VHT-Corstone-300.cprj b/platform/cmsis/testanr.Release+VHT-Corstone-300.cprj index f857a03..3b6965f 100644 --- a/platform/cmsis/testanr.Release+VHT-Corstone-300.cprj +++ b/platform/cmsis/testanr.Release+VHT-Corstone-300.cprj @@ -1,6 +1,6 @@ - + Automatically generated project diff --git a/platform/cmsis/testanr.Release+VHT-Corstone-310.cprj b/platform/cmsis/testanr.Release+VHT-Corstone-310.cprj index 5d53e8a..e80c821 100644 --- a/platform/cmsis/testanr.Release+VHT-Corstone-310.cprj +++ b/platform/cmsis/testanr.Release+VHT-Corstone-310.cprj @@ -1,6 +1,6 @@ - + Automatically generated project diff --git a/platform/cmsis/testanr.Release+VHT_M85.cprj b/platform/cmsis/testanr.Release+VHT_M85.cprj index 081d7b8..bc82947 100644 --- a/platform/cmsis/testanr.Release+VHT_M85.cprj +++ b/platform/cmsis/testanr.Release+VHT_M85.cprj @@ -1,6 +1,6 @@ - + Automatically generated project diff --git a/platform/cmsis/testanr.cproject.yml b/platform/cmsis/testanr.cproject.yml index 09aa1d8..99d48a8 100755 --- a/platform/cmsis/testanr.cproject.yml +++ b/platform/cmsis/testanr.cproject.yml @@ -42,6 +42,8 @@ project: - layer: boot.clayer.yml - layer: speex.clayer.yml - layer: audiomark_core.clayer.yml - - layer: printf_mps3.clayer.yml - for-type: - - +MPS3-Corstone-300 + - layer: printf_mpsx.clayer.yml + not-for-context: + - +VHT-Corstone-300 + - +VHT-Corstone-310 + - +VHT_M85 \ No newline at end of file diff --git a/platform/cmsis/testkws.Release+MPS2-CMSDK_CM4_FP.cprj b/platform/cmsis/testkws.Release+MPS2-CMSDK_CM4_FP.cprj new file mode 100644 index 0000000..bd8f502 --- /dev/null +++ b/platform/cmsis/testkws.Release+MPS2-CMSDK_CM4_FP.cprj @@ -0,0 +1,91 @@ + + + + + + Automatically generated project + + + + + + + + + + + + + + + + + + + + + + + OS_SUPPORT_CUSTOM;GENERIC_ARCH + .;../../lib/speexdsp/include;../../lib/speexdsp/libspeexdsp;../../ports/arm/;../../ports/arm/libs/CMSIS-NN/Include;../../src/;../../lib/speexdsp/include/speex/;../../lib/speexdsp/ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/platform/cmsis/testkws.Release+MPS2-CMSDK_CM7_SP.cprj b/platform/cmsis/testkws.Release+MPS2-CMSDK_CM7_SP.cprj new file mode 100644 index 0000000..546f9fd --- /dev/null +++ b/platform/cmsis/testkws.Release+MPS2-CMSDK_CM7_SP.cprj @@ -0,0 +1,91 @@ + + + + + + Automatically generated project + + + + + + + + + + + + + + + + + + + + + + + OS_SUPPORT_CUSTOM;GENERIC_ARCH + .;../../lib/speexdsp/include;../../lib/speexdsp/libspeexdsp;../../ports/arm/;../../ports/arm/libs/CMSIS-NN/Include;../../src/;../../lib/speexdsp/include/speex/;../../lib/speexdsp/ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/platform/cmsis/testkws.Release+MPS2-IOTKit-CM33.cprj b/platform/cmsis/testkws.Release+MPS2-IOTKit-CM33.cprj new file mode 100644 index 0000000..d9485c6 --- /dev/null +++ b/platform/cmsis/testkws.Release+MPS2-IOTKit-CM33.cprj @@ -0,0 +1,92 @@ + + + + + + Automatically generated project + + + + + + + + + + + + + + + + + + + + + + + OS_SUPPORT_CUSTOM;GENERIC_ARCH + .;../../lib/speexdsp/include;../../lib/speexdsp/libspeexdsp;../../ports/arm/;../../ports/arm/libs/CMSIS-NN/Include;../../src/;../../lib/speexdsp/include/speex/;../../lib/speexdsp/ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/platform/cmsis/testkws.Release+MPS3-Corstone-300.cprj b/platform/cmsis/testkws.Release+MPS3-Corstone-300.cprj index 5e21a8a..e383f5a 100644 --- a/platform/cmsis/testkws.Release+MPS3-Corstone-300.cprj +++ b/platform/cmsis/testkws.Release+MPS3-Corstone-300.cprj @@ -1,6 +1,6 @@ - + Automatically generated project diff --git a/platform/cmsis/testkws.Release+MPS3-Corstone-310.cbuild.yml b/platform/cmsis/testkws.Release+MPS3-Corstone-310.cbuild.yml deleted file mode 100644 index f3c0130..0000000 --- a/platform/cmsis/testkws.Release+MPS3-Corstone-310.cbuild.yml +++ /dev/null @@ -1,502 +0,0 @@ -build: - solution: audiomark.csolution.yml - project: testkws.cproject.yml - context: testkws.Release+MPS3-Corstone-310 - compiler: AC6 - device: ARM::SSE-310-MPS3 - processor: - fpu: on - trustzone: non-secure - packs: - - pack: ARM::CMSIS-DSP@1.14.2 - path: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2 - - pack: ARM::CMSIS-NN@4.0.0 - path: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0 - - pack: ARM::CMSIS@5.9.0 - path: ${CMSIS_PACK_ROOT}/ARM/CMSIS/5.9.0 - - pack: ARM::DMA350@1.0.0 - path: ${CMSIS_PACK_ROOT}/ARM/DMA350/1.0.0 - - pack: ARM::V2M_MPS3_SSE_310_BSP@1.1.0 - path: ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0 - - pack: GorgonMeducer::perf_counter@1.9.11 - path: ${CMSIS_PACK_ROOT}/GorgonMeducer/perf_counter/1.9.11 - debug: on - misc: - ASM: - - -masm=auto - C: - - -std=gnu11 - - -fshort-enums -fshort-wchar - - -Ofast - - -ffast-math - CPP: - - -std=c++11 - - -fno-rtti - - -Ofast - - -ffast-math - Link: - - --info=summarysizes - - --info=sizes - - --info=totals - - --info=unused - - --info=veneers - define: - - OS_SUPPORT_CUSTOM - - _RTE_ - add-path: - - . - - ../../lib/speexdsp/include - - ../../lib/speexdsp/libspeexdsp - - ../../ports/arm/ - - ../../ports/arm/libs/CMSIS-NN/Include - - ../../src/ - - ../../lib/speexdsp/include/speex/ - - ../../lib/speexdsp/ - - RTE/Device/SSE-310-MPS3 - - RTE/_Release_MPS3-Corstone-310 - - ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Include - - ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/PrivateInclude - - ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Include - - ${CMSIS_PACK_ROOT}/ARM/CMSIS/5.9.0/CMSIS/Core/Include - - ${CMSIS_PACK_ROOT}/ARM/DMA350/1.0.0/MDH_API - - ${CMSIS_PACK_ROOT}/ARM/DMA350/1.0.0/Native_Driver - - ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0/Board/Device_Definition - - ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0/Board/Platform - - ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0/Device/Include - - ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0/MDH_Driver - - ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0/Native_Driver - - ${CMSIS_PACK_ROOT}/GorgonMeducer/perf_counter/1.9.11/lib - output-type: exe - output-dirs: - intdir: tmp/testkws/MPS3-Corstone-310/Release - outdir: out/testkws/MPS3-Corstone-310/Release - rtedir: RTE - components: - - component: ARM::CMSIS:CORE@5.6.0 - condition: ARMv6_7_8-M Device - from-pack: ARM::CMSIS@5.9.0 - selected-by: ARM::CMSIS:CORE - - component: ARM::CMSIS:DSP&Source@1.14.2 - condition: CMSISCORE - from-pack: ARM::CMSIS-DSP@1.14.2 - selected-by: ARM::CMSIS:DSP&Source@1.14.2 - files: - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/BasicMathFunctions/BasicMathFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/BasicMathFunctions/BasicMathFunctionsF16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/BayesFunctions/BayesFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/BayesFunctions/BayesFunctionsF16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/CommonTables/CommonTables.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/CommonTables/CommonTablesF16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/ComplexMathFunctions/ComplexMathFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/ComplexMathFunctions/ComplexMathFunctionsF16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/ControllerFunctions/ControllerFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/DistanceFunctions/DistanceFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/DistanceFunctions/DistanceFunctionsF16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/FastMathFunctions/FastMathFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/FastMathFunctions/FastMathFunctionsF16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/FilteringFunctions/FilteringFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/FilteringFunctions/FilteringFunctionsF16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/InterpolationFunctions/InterpolationFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/InterpolationFunctions/InterpolationFunctionsF16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/MatrixFunctions/MatrixFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/MatrixFunctions/MatrixFunctionsF16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/QuaternionMathFunctions/QuaternionMathFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/SVMFunctions/SVMFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/SVMFunctions/SVMFunctionsF16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/StatisticsFunctions/StatisticsFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/StatisticsFunctions/StatisticsFunctionsF16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/SupportFunctions/SupportFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/SupportFunctions/SupportFunctionsF16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/TransformFunctions/TransformFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/TransformFunctions/TransformFunctionsF16.c - category: source - - component: ARM::CMSIS:NN Lib@4.0.0 - condition: CMSIS-NN - from-pack: ARM::CMSIS-NN@4.0.0 - selected-by: ARM::CMSIS:NN@4.0.0 - files: - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ActivationFunctions/arm_nn_activation_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ActivationFunctions/arm_relu6_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ActivationFunctions/arm_relu_q15.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ActivationFunctions/arm_relu_q7.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/BasicMathFunctions/arm_elementwise_add_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/BasicMathFunctions/arm_elementwise_add_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/BasicMathFunctions/arm_elementwise_mul_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/BasicMathFunctions/arm_elementwise_mul_s16_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/BasicMathFunctions/arm_elementwise_mul_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConcatenationFunctions/arm_concatenation_s8_w.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConcatenationFunctions/arm_concatenation_s8_x.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConcatenationFunctions/arm_concatenation_s8_y.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConcatenationFunctions/arm_concatenation_s8_z.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_convolve_1_x_n_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_convolve_1x1_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_convolve_1x1_s8_fast.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_convolve_fast_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_convolve_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_convolve_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_convolve_wrapper_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_convolve_wrapper_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_depthwise_conv_3x3_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_depthwise_conv_fast_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_depthwise_conv_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_depthwise_conv_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_depthwise_conv_s8_opt.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_depthwise_conv_wrapper_s16.c - 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- file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_depthwise_conv_nt_t_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_depthwise_conv_nt_t_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_lstm_calculate_gate_s8_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_lstm_step_s8_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_lstm_update_cell_state_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_lstm_update_output_s8_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_mat_mul_core_1x_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_mat_mul_core_4x_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_mat_mul_kernel_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_mat_mult_nt_t_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_vec_mat_mul_result_acc_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_svdf_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nntables.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_q7_to_q15_with_offset.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/PoolingFunctions/arm_avgpool_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/PoolingFunctions/arm_avgpool_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/PoolingFunctions/arm_max_pool_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/PoolingFunctions/arm_max_pool_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ReshapeFunctions/arm_reshape_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/SVDFunctions/arm_svdf_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/SVDFunctions/arm_svdf_state_s16_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/SoftmaxFunctions/arm_nn_softmax_common_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/SoftmaxFunctions/arm_softmax_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/SoftmaxFunctions/arm_softmax_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/SoftmaxFunctions/arm_softmax_s8_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/SoftmaxFunctions/arm_softmax_u8.c - category: source - - component: ARM::Device:Definition@1.1.0 - condition: SSE-310-MPS3 Device - from-pack: ARM::V2M_MPS3_SSE_310_BSP@1.1.0 - selected-by: ARM::Device:Definition - files: - - file: ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0/Board/Device_Definition/device_definition.c - category: source - - file: RTE/Device/SSE-310-MPS3/platform_base_address.h - category: header - attr: config - version: 1.0.0 - - component: ARM::Device:Startup&Baremetal@1.0.1 - condition: SSE-310-MPS3 Device - from-pack: ARM::V2M_MPS3_SSE_310_BSP@1.1.0 - selected-by: ARM::Device:Startup&Baremetal - files: - - file: RTE/Device/SSE-310-MPS3/cmsis_driver_config.h - category: header - attr: config - version: 1.0.0 - - file: RTE/Device/SSE-310-MPS3/RTE_Device.h - category: header - attr: config - version: 1.0.0 - - file: RTE/Device/SSE-310-MPS3/device_cfg.h - category: header - attr: config - version: 1.0.0 - - file: RTE/Device/SSE-310-MPS3/region_defs.h - category: header - attr: config - version: 1.0.0 - - file: RTE/Device/SSE-310-MPS3/region_limits.h - category: header - attr: config - version: 1.0.0 - - file: RTE/Device/SSE-310-MPS3/system_SSE310MPS3.h - category: header - attr: config - version: 1.0.0 - - file: RTE/Device/SSE-310-MPS3/corstone310_mps3_s.sct - category: linkerScript - attr: config - version: 1.0.0 - - file: RTE/Device/SSE-310-MPS3/startup_SSE310MPS3.c - category: source - attr: config - version: 1.0.0 - - file: RTE/Device/SSE-310-MPS3/system_SSE310MPS3.c - category: source - attr: config - version: 1.0.0 - - component: ARM::MCU Driver HAL:DMA350@1.0.0 - condition: SSE-310-MPS3 MDH DMA350 - from-pack: ARM::V2M_MPS3_SSE_310_BSP@1.1.0 - selected-by: ARM::MCU Driver HAL:DMA350 - files: - - file: ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0/MDH_Driver/mps3_dma.c - category: source - - component: ARM::Native Driver:DMA350 Remap:Custom@1.0.0 - condition: DMA350 Remap - from-pack: ARM::DMA350@1.0.0 - selected-by: ARM::Native Driver:DMA350 Remap - - component: ARM::Native Driver:DMA350 Remap:SSE-310 Remap@1.0.0 - condition: SSE-310-MPS3 DMA350 - from-pack: ARM::V2M_MPS3_SSE_310_BSP@1.1.0 - selected-by: ARM::Native Driver:DMA350 Remap:SSE-310 - files: - - file: ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0/Device/Source/dma350_address_remap.c - category: source - - component: ARM::Native Driver:DMA350@1.1.0 - condition: DMA350 - from-pack: ARM::DMA350@1.0.0 - selected-by: ARM::Native Driver:DMA350 - files: - - file: ${CMSIS_PACK_ROOT}/ARM/DMA350/1.0.0/Native_Driver/dma350_ch_drv.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/DMA350/1.0.0/Native_Driver/dma350_drv.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/DMA350/1.0.0/Native_Driver/dma350_lib.c - category: source - - component: ARM::Native Driver:SysCounter@1.0.0 - condition: SSE-310-MPS3 Device - from-pack: ARM::V2M_MPS3_SSE_310_BSP@1.1.0 - selected-by: ARM::Native Driver:SysCounter - files: - - file: ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0/Native_Driver/syscounter_armv8-m_cntrl_drv.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0/Native_Driver/syscounter_armv8-m_read_drv.c - category: source - - component: ARM::Native Driver:SysTimer@1.0.0 - condition: SSE-310-MPS3 Device - from-pack: ARM::V2M_MPS3_SSE_310_BSP@1.1.0 - selected-by: ARM::Native Driver:SysTimer - files: - - file: ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0/Native_Driver/systimer_armv8-m_drv.c - category: source - - component: ARM::Native Driver:Timeout@1.0.0 - condition: SSE-310-MPS3 Systimer Syscounter - from-pack: ARM::V2M_MPS3_SSE_310_BSP@1.1.0 - selected-by: ARM::Native Driver:Timeout - files: - - file: ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0/Native_Driver/systimer_armv8-m_timeout.c - category: source - - component: GorgonMeducer::Utilities&Performance Counter:perf_counter:Core&Library@1.9.11 - condition: CMSIS-CORE - from-pack: GorgonMeducer::perf_counter@1.9.11 - selected-by: perf_counter:Core - misc: - C: - - -DARM_DSP_CONFIG_TABLES - - -DARM_FAST_ALLOW_TABLES - - -DARM_FFT_ALLOW_TABLES - - -DARM_ALL_FAST_TABLES - - -DARM_MATH_LOOPUNROLL - - -DARM_TABLE_BITREVIDX_FXT_128 - - -DARM_TABLE_BITREVIDX_FXT_256 - - -DARM_TABLE_BITREVIDX_FXT_512 - - -DARM_TABLE_TWIDDLECOEF_F32_128 -DARM_TABLE_BITREVIDX_FLT_128 - - -DARM_TABLE_TWIDDLECOEF_F32_256 -DARM_TABLE_BITREVIDX_FLT_256 - - -DARM_TABLE_TWIDDLECOEF_F32_512 -DARM_TABLE_BITREVIDX_FLT_512 - - -DARM_TABLE_TWIDDLECOEF_RFFT_F32_128 - - -DARM_TABLE_TWIDDLECOEF_RFFT_F32_256 - - -DARM_TABLE_TWIDDLECOEF_RFFT_F32_512 - - -DARM_TABLE_TWIDDLECOEF_RFFT_F32_1024 - files: - - file: ${CMSIS_PACK_ROOT}/GorgonMeducer/perf_counter/1.9.11/lib/perf_counter.lib - category: library - groups: - - group: App - files: - - file: ../../tests/test_kws.c - category: sourceC - - file: ../../tests/data/kws_input.c - category: sourceC - - file: ../../tests/data/kws_expected.c - category: sourceC - - file: ../../src/ee_nn_tables.c - category: sourceC - - file: ../../src/ee_abf_f32_tables.c - category: sourceC - - file: platform_init.c - category: sourceC - - group: AudioMarkCore - misc: - C: - - -DFLOATING_POINT - files: - - file: ../../src/ee_abf_f32.c - category: sourceC - - file: ../../src/ee_abf_f32_tables.c - category: sourceC - - file: ../../src/ee_aec_f32.c - category: sourceC - - file: ../../src/ee_anr_f32.c - category: sourceC - - file: ../../src/ee_kws.c - category: sourceC - - file: ../../src/ee_mfcc_f32.c - category: sourceC - - file: ../../src/ee_mfcc_f32_tables.c - category: sourceC - - file: ../../src/ee_nn_tables.c - category: sourceC - - file: ../../ports/arm/th_api.c - category: sourceC - - group: Libspeex - misc: - C: - - -DUSE_CMSIS_DSP - - -DFLOATING_POINT - - -DOVERRIDE_FB_COMPUTE_BANK32 - - -DOVERRIDE_FB_COMPUTE_PSD16 - - -DOVERRIDE_ANR_VEC_MUL - - -DOVERRIDE_ANR_UPDATE_NOISE_ESTIMATE - - -DOVERRIDE_ANR_APOSTERIORI_SNR - - -DOVERRIDE_ANR_POWER_SPECTRUM - - -DOVERRIDE_ANR_COMPUTE_GAIN_FLOOR - - -DOVERRIDE_ANR_UPDATE_ZETA - - -DOVERRIDE_ANR_UPDATE_GAINS_CRITICAL_BANDS - - -DOVERRIDE_ANR_UPDATE_GAINS_LINEAR - - -DOVERRIDE_ANR_APPLY_SPEC_GAIN - - -DOVERRIDE_ANR_OLA - - -DOVERRIDE_ANR_UPDATE_NOISE_PROB - - -DOVERRIDE_MDF_DC_NOTCH - - -DOVERRIDE_MDF_INNER_PROD - - -DOVERRIDE_MDF_POWER_SPECTRUM - - -DOVERRIDE_MDF_POWER_SPECTRUM_ACCUM - - -DOVERRIDE_MDF_SPECTRAL_MUL_ACCUM - - -DOVERRIDE_MDF_WEIGHT_SPECT_MUL_CONJ - - -DOVERRIDE_MDF_ADJUST_PROP - - -DOVERRIDE_MDF_PREEMPH_FLT - - -DOVERRIDE_MDF_STRIDED_PREEMPH_FLT - - -DOVERRIDE_MDF_VEC_SUB - - -DOVERRIDE_MDF_VEC_SUB16 - - -DOVERRIDE_MDF_VEC_ADD - - -DOVERRIDE_MDF_SMOOTHED_ADD - - -DOVERRIDE_MDF_DEEMPH - - -DOVERRIDE_MDF_SMOOTH_FE_NRG - - -DOVERRIDE_MDF_FILTERED_SPEC_AD_XCORR - - -DOVERRIDE_MDF_NORM_LEARN_RATE_CALC - - -DOVERRIDE_MDF_CONVERG_LEARN_RATE_CALC - - -DOVERRIDE_MDF_VEC_SCALE - - -DEXPORT=/**/ - files: - - file: ../../lib/speexdsp/libspeexdsp/buffer.c - category: sourceC - - file: ../../lib/speexdsp/libspeexdsp/fftwrap.c - category: sourceC - - file: ../../lib/speexdsp/libspeexdsp/filterbank.c - category: sourceC - - file: ../../lib/speexdsp/libspeexdsp/jitter.c - category: sourceC - - file: ../../lib/speexdsp/libspeexdsp/kiss_fft.c - category: sourceC - - file: ../../lib/speexdsp/libspeexdsp/kiss_fftr.c - category: sourceC - - file: ../../lib/speexdsp/libspeexdsp/mdf.c - category: sourceC - - file: ../../lib/speexdsp/libspeexdsp/preprocess.c - category: sourceC - - file: ../../lib/speexdsp/libspeexdsp/resample.c - category: sourceC - - file: ../../lib/speexdsp/libspeexdsp/scal.c - category: sourceC - - file: ../../lib/speexdsp/libspeexdsp/smallft.c - category: sourceC - constructed-files: - - file: RTE/_Release_MPS3-Corstone-310/Pre_Include_Global.h - category: preIncludeGlobal - - file: RTE/_Release_MPS3-Corstone-310/RTE_Components.h - category: header diff --git a/platform/cmsis/testkws.Release+MPS3-Corstone-310.cprj b/platform/cmsis/testkws.Release+MPS3-Corstone-310.cprj index 0af5d70..547d258 100644 --- a/platform/cmsis/testkws.Release+MPS3-Corstone-310.cprj +++ b/platform/cmsis/testkws.Release+MPS3-Corstone-310.cprj @@ -1,6 +1,6 @@ - + Automatically generated project @@ -13,6 +13,7 @@ + @@ -31,6 +32,7 @@ + @@ -55,9 +57,11 @@ + + @@ -81,6 +85,9 @@ + + + diff --git a/platform/cmsis/testkws.Release+VHT-Corstone-300.cprj b/platform/cmsis/testkws.Release+VHT-Corstone-300.cprj index b1a3b96..18dddca 100644 --- a/platform/cmsis/testkws.Release+VHT-Corstone-300.cprj +++ b/platform/cmsis/testkws.Release+VHT-Corstone-300.cprj @@ -1,6 +1,6 @@ - + Automatically generated project diff --git a/platform/cmsis/testkws.Release+VHT-Corstone-310.cprj b/platform/cmsis/testkws.Release+VHT-Corstone-310.cprj index 271e295..f94a2eb 100644 --- a/platform/cmsis/testkws.Release+VHT-Corstone-310.cprj +++ b/platform/cmsis/testkws.Release+VHT-Corstone-310.cprj @@ -1,6 +1,6 @@ - + Automatically generated project diff --git a/platform/cmsis/testkws.Release+VHT_M85.cprj b/platform/cmsis/testkws.Release+VHT_M85.cprj index db6b85d..e760503 100644 --- a/platform/cmsis/testkws.Release+VHT_M85.cprj +++ b/platform/cmsis/testkws.Release+VHT_M85.cprj @@ -1,6 +1,6 @@ - + Automatically generated project diff --git a/platform/cmsis/testkws.cproject.yml b/platform/cmsis/testkws.cproject.yml index 61a9ae5..74d32f8 100755 --- a/platform/cmsis/testkws.cproject.yml +++ b/platform/cmsis/testkws.cproject.yml @@ -43,6 +43,8 @@ project: - layer: boot.clayer.yml - layer: speex.clayer.yml - layer: audiomark_core.clayer.yml - - layer: printf_mps3.clayer.yml - for-type: - - +MPS3-Corstone-300 + - layer: printf_mpsx.clayer.yml + not-for-context: + - +VHT-Corstone-300 + - +VHT-Corstone-310 + - +VHT_M85 diff --git a/platform/cmsis/testmfcc.Release+MPS2-CMSDK_CM4_FP.cprj b/platform/cmsis/testmfcc.Release+MPS2-CMSDK_CM4_FP.cprj new file mode 100644 index 0000000..22849e8 --- /dev/null +++ b/platform/cmsis/testmfcc.Release+MPS2-CMSDK_CM4_FP.cprj @@ -0,0 +1,88 @@ + + + + + + Automatically generated project + + + + + + + + + + + + + + + + + + + + + + + OS_SUPPORT_CUSTOM;GENERIC_ARCH + .;../../lib/speexdsp/include;../../lib/speexdsp/libspeexdsp;../../ports/arm/;../../ports/arm/libs/CMSIS-NN/Include;../../src/;../../lib/speexdsp/include/speex/;../../lib/speexdsp/ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/platform/cmsis/testmfcc.Release+MPS2-CMSDK_CM7_SP.cprj b/platform/cmsis/testmfcc.Release+MPS2-CMSDK_CM7_SP.cprj new file mode 100644 index 0000000..8992a06 --- /dev/null +++ b/platform/cmsis/testmfcc.Release+MPS2-CMSDK_CM7_SP.cprj @@ -0,0 +1,88 @@ + + + + + + Automatically generated project + + + + + + + + + + + + + + + + + + + + + + + OS_SUPPORT_CUSTOM;GENERIC_ARCH + .;../../lib/speexdsp/include;../../lib/speexdsp/libspeexdsp;../../ports/arm/;../../ports/arm/libs/CMSIS-NN/Include;../../src/;../../lib/speexdsp/include/speex/;../../lib/speexdsp/ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/platform/cmsis/testmfcc.Release+MPS2-IOTKit-CM33.cprj b/platform/cmsis/testmfcc.Release+MPS2-IOTKit-CM33.cprj new file mode 100644 index 0000000..5790079 --- /dev/null +++ b/platform/cmsis/testmfcc.Release+MPS2-IOTKit-CM33.cprj @@ -0,0 +1,89 @@ + + + + + + Automatically generated project + + + + + + + + + + + + + + + + + + + + + + + OS_SUPPORT_CUSTOM;GENERIC_ARCH + .;../../lib/speexdsp/include;../../lib/speexdsp/libspeexdsp;../../ports/arm/;../../ports/arm/libs/CMSIS-NN/Include;../../src/;../../lib/speexdsp/include/speex/;../../lib/speexdsp/ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/platform/cmsis/testmfcc.Release+MPS3-Corstone-300.cprj b/platform/cmsis/testmfcc.Release+MPS3-Corstone-300.cprj index be74ed3..e49ff76 100644 --- a/platform/cmsis/testmfcc.Release+MPS3-Corstone-300.cprj +++ b/platform/cmsis/testmfcc.Release+MPS3-Corstone-300.cprj @@ -1,6 +1,6 @@ - + Automatically generated project diff --git a/platform/cmsis/testmfcc.Release+MPS3-Corstone-310.cbuild.yml b/platform/cmsis/testmfcc.Release+MPS3-Corstone-310.cbuild.yml deleted file mode 100644 index ce54959..0000000 --- a/platform/cmsis/testmfcc.Release+MPS3-Corstone-310.cbuild.yml +++ /dev/null @@ -1,496 +0,0 @@ -build: - solution: audiomark.csolution.yml - project: testmfcc.cproject.yml - context: testmfcc.Release+MPS3-Corstone-310 - compiler: AC6 - device: ARM::SSE-310-MPS3 - processor: - fpu: on - trustzone: non-secure - packs: - - pack: ARM::CMSIS-DSP@1.14.2 - path: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2 - - pack: ARM::CMSIS-NN@4.0.0 - path: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0 - - pack: ARM::CMSIS@5.9.0 - path: ${CMSIS_PACK_ROOT}/ARM/CMSIS/5.9.0 - - pack: ARM::DMA350@1.0.0 - path: ${CMSIS_PACK_ROOT}/ARM/DMA350/1.0.0 - - pack: ARM::V2M_MPS3_SSE_310_BSP@1.1.0 - path: ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0 - - pack: GorgonMeducer::perf_counter@1.9.11 - path: ${CMSIS_PACK_ROOT}/GorgonMeducer/perf_counter/1.9.11 - debug: on - misc: - ASM: - - -masm=auto - C: - - -std=gnu11 - - -fshort-enums -fshort-wchar - - -Ofast - - -ffast-math - CPP: - - -std=c++11 - - -fno-rtti - - -Ofast - - -ffast-math - Link: - - --info=summarysizes - - --info=sizes - - --info=totals - - --info=unused - - --info=veneers - define: - - OS_SUPPORT_CUSTOM - - _RTE_ - add-path: - - . - - ../../lib/speexdsp/include - - ../../lib/speexdsp/libspeexdsp - - ../../ports/arm/ - - ../../ports/arm/libs/CMSIS-NN/Include - - ../../src/ - - ../../lib/speexdsp/include/speex/ - - ../../lib/speexdsp/ - - RTE/Device/SSE-310-MPS3 - - RTE/_Release_MPS3-Corstone-310 - - ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Include - - ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/PrivateInclude - - ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Include - - ${CMSIS_PACK_ROOT}/ARM/CMSIS/5.9.0/CMSIS/Core/Include - - ${CMSIS_PACK_ROOT}/ARM/DMA350/1.0.0/MDH_API - - ${CMSIS_PACK_ROOT}/ARM/DMA350/1.0.0/Native_Driver - - ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0/Board/Device_Definition - - ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0/Board/Platform - - ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0/Device/Include - - ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0/MDH_Driver - - ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0/Native_Driver - - ${CMSIS_PACK_ROOT}/GorgonMeducer/perf_counter/1.9.11/lib - output-type: exe - output-dirs: - intdir: tmp/testmfcc/MPS3-Corstone-310/Release - outdir: out/testmfcc/MPS3-Corstone-310/Release - rtedir: RTE - components: - - component: ARM::CMSIS:CORE@5.6.0 - condition: ARMv6_7_8-M Device - from-pack: ARM::CMSIS@5.9.0 - selected-by: ARM::CMSIS:CORE - - component: ARM::CMSIS:DSP&Source@1.14.2 - condition: CMSISCORE - from-pack: ARM::CMSIS-DSP@1.14.2 - selected-by: ARM::CMSIS:DSP&Source@1.14.2 - files: - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/BasicMathFunctions/BasicMathFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/BasicMathFunctions/BasicMathFunctionsF16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/BayesFunctions/BayesFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/BayesFunctions/BayesFunctionsF16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/CommonTables/CommonTables.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/CommonTables/CommonTablesF16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/ComplexMathFunctions/ComplexMathFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/ComplexMathFunctions/ComplexMathFunctionsF16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/ControllerFunctions/ControllerFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/DistanceFunctions/DistanceFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/DistanceFunctions/DistanceFunctionsF16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/FastMathFunctions/FastMathFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/FastMathFunctions/FastMathFunctionsF16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/FilteringFunctions/FilteringFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/FilteringFunctions/FilteringFunctionsF16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/InterpolationFunctions/InterpolationFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/InterpolationFunctions/InterpolationFunctionsF16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/MatrixFunctions/MatrixFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/MatrixFunctions/MatrixFunctionsF16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/QuaternionMathFunctions/QuaternionMathFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/SVMFunctions/SVMFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/SVMFunctions/SVMFunctionsF16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/StatisticsFunctions/StatisticsFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/StatisticsFunctions/StatisticsFunctionsF16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/SupportFunctions/SupportFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/SupportFunctions/SupportFunctionsF16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/TransformFunctions/TransformFunctions.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-DSP/1.14.2/Source/TransformFunctions/TransformFunctionsF16.c - category: source - - component: ARM::CMSIS:NN Lib@4.0.0 - condition: CMSIS-NN - from-pack: ARM::CMSIS-NN@4.0.0 - selected-by: ARM::CMSIS:NN@4.0.0 - files: - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ActivationFunctions/arm_nn_activation_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ActivationFunctions/arm_relu6_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ActivationFunctions/arm_relu_q15.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ActivationFunctions/arm_relu_q7.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/BasicMathFunctions/arm_elementwise_add_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/BasicMathFunctions/arm_elementwise_add_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/BasicMathFunctions/arm_elementwise_mul_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/BasicMathFunctions/arm_elementwise_mul_s16_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/BasicMathFunctions/arm_elementwise_mul_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConcatenationFunctions/arm_concatenation_s8_w.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConcatenationFunctions/arm_concatenation_s8_x.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConcatenationFunctions/arm_concatenation_s8_y.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConcatenationFunctions/arm_concatenation_s8_z.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_convolve_1_x_n_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_convolve_1x1_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_convolve_1x1_s8_fast.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_convolve_fast_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_convolve_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_convolve_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_convolve_wrapper_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_convolve_wrapper_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_depthwise_conv_3x3_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_depthwise_conv_fast_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_depthwise_conv_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_depthwise_conv_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_depthwise_conv_s8_opt.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_depthwise_conv_wrapper_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_depthwise_conv_wrapper_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_nn_depthwise_conv_s8_core.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_s8_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ConvolutionFunctions/arm_nn_mat_mult_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/FullyConnectedFunctions/arm_fully_connected_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/FullyConnectedFunctions/arm_fully_connected_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/LSTMFunctions/arm_lstm_unidirectional_s8_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_depthwise_conv_nt_t_padded_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_depthwise_conv_nt_t_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_depthwise_conv_nt_t_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_lstm_calculate_gate_s8_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_lstm_step_s8_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_lstm_update_cell_state_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_lstm_update_output_s8_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_mat_mul_core_1x_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_mat_mul_core_4x_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_mat_mul_kernel_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_mat_mult_nt_t_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_vec_mat_mul_result_acc_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nn_vec_mat_mult_t_svdf_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_nntables.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/NNSupportFunctions/arm_q7_to_q15_with_offset.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/PoolingFunctions/arm_avgpool_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/PoolingFunctions/arm_avgpool_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/PoolingFunctions/arm_max_pool_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/PoolingFunctions/arm_max_pool_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/ReshapeFunctions/arm_reshape_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/SVDFunctions/arm_svdf_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/SVDFunctions/arm_svdf_state_s16_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/SoftmaxFunctions/arm_nn_softmax_common_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/SoftmaxFunctions/arm_softmax_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/SoftmaxFunctions/arm_softmax_s8.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/SoftmaxFunctions/arm_softmax_s8_s16.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/CMSIS-NN/4.0.0/Source/SoftmaxFunctions/arm_softmax_u8.c - category: source - - component: ARM::Device:Definition@1.1.0 - condition: SSE-310-MPS3 Device - from-pack: ARM::V2M_MPS3_SSE_310_BSP@1.1.0 - selected-by: ARM::Device:Definition - files: - - file: ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0/Board/Device_Definition/device_definition.c - category: source - - file: RTE/Device/SSE-310-MPS3/platform_base_address.h - category: header - attr: config - version: 1.0.0 - - component: ARM::Device:Startup&Baremetal@1.0.1 - condition: SSE-310-MPS3 Device - from-pack: ARM::V2M_MPS3_SSE_310_BSP@1.1.0 - selected-by: ARM::Device:Startup&Baremetal - files: - - file: RTE/Device/SSE-310-MPS3/cmsis_driver_config.h - category: header - attr: config - version: 1.0.0 - - file: RTE/Device/SSE-310-MPS3/RTE_Device.h - category: header - attr: config - version: 1.0.0 - - file: RTE/Device/SSE-310-MPS3/device_cfg.h - category: header - attr: config - version: 1.0.0 - - file: RTE/Device/SSE-310-MPS3/region_defs.h - category: header - attr: config - version: 1.0.0 - - file: RTE/Device/SSE-310-MPS3/region_limits.h - category: header - attr: config - version: 1.0.0 - - file: RTE/Device/SSE-310-MPS3/system_SSE310MPS3.h - category: header - attr: config - version: 1.0.0 - - file: RTE/Device/SSE-310-MPS3/corstone310_mps3_s.sct - category: linkerScript - attr: config - version: 1.0.0 - - file: RTE/Device/SSE-310-MPS3/startup_SSE310MPS3.c - category: source - attr: config - version: 1.0.0 - - file: RTE/Device/SSE-310-MPS3/system_SSE310MPS3.c - category: source - attr: config - version: 1.0.0 - - component: ARM::MCU Driver HAL:DMA350@1.0.0 - condition: SSE-310-MPS3 MDH DMA350 - from-pack: ARM::V2M_MPS3_SSE_310_BSP@1.1.0 - selected-by: ARM::MCU Driver HAL:DMA350 - files: - - file: ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0/MDH_Driver/mps3_dma.c - category: source - - component: ARM::Native Driver:DMA350 Remap:Custom@1.0.0 - condition: DMA350 Remap - from-pack: ARM::DMA350@1.0.0 - selected-by: ARM::Native Driver:DMA350 Remap - - component: ARM::Native Driver:DMA350 Remap:SSE-310 Remap@1.0.0 - condition: SSE-310-MPS3 DMA350 - from-pack: ARM::V2M_MPS3_SSE_310_BSP@1.1.0 - selected-by: ARM::Native Driver:DMA350 Remap:SSE-310 - files: - - file: ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0/Device/Source/dma350_address_remap.c - category: source - - component: ARM::Native Driver:DMA350@1.1.0 - condition: DMA350 - from-pack: ARM::DMA350@1.0.0 - selected-by: ARM::Native Driver:DMA350 - files: - - file: ${CMSIS_PACK_ROOT}/ARM/DMA350/1.0.0/Native_Driver/dma350_ch_drv.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/DMA350/1.0.0/Native_Driver/dma350_drv.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/DMA350/1.0.0/Native_Driver/dma350_lib.c - category: source - - component: ARM::Native Driver:SysCounter@1.0.0 - condition: SSE-310-MPS3 Device - from-pack: ARM::V2M_MPS3_SSE_310_BSP@1.1.0 - selected-by: ARM::Native Driver:SysCounter - files: - - file: ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0/Native_Driver/syscounter_armv8-m_cntrl_drv.c - category: source - - file: ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0/Native_Driver/syscounter_armv8-m_read_drv.c - category: source - - component: ARM::Native Driver:SysTimer@1.0.0 - condition: SSE-310-MPS3 Device - from-pack: ARM::V2M_MPS3_SSE_310_BSP@1.1.0 - selected-by: ARM::Native Driver:SysTimer - files: - - file: ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0/Native_Driver/systimer_armv8-m_drv.c - category: source - - component: ARM::Native Driver:Timeout@1.0.0 - condition: SSE-310-MPS3 Systimer Syscounter - from-pack: ARM::V2M_MPS3_SSE_310_BSP@1.1.0 - selected-by: ARM::Native Driver:Timeout - files: - - file: ${CMSIS_PACK_ROOT}/ARM/V2M_MPS3_SSE_310_BSP/1.1.0/Native_Driver/systimer_armv8-m_timeout.c - category: source - - component: GorgonMeducer::Utilities&Performance Counter:perf_counter:Core&Library@1.9.11 - condition: CMSIS-CORE - from-pack: GorgonMeducer::perf_counter@1.9.11 - selected-by: perf_counter:Core - misc: - C: - - -DARM_DSP_CONFIG_TABLES - - -DARM_FAST_ALLOW_TABLES - - -DARM_FFT_ALLOW_TABLES - - -DARM_ALL_FAST_TABLES - - -DARM_MATH_LOOPUNROLL - - -DARM_TABLE_BITREVIDX_FXT_128 - - -DARM_TABLE_BITREVIDX_FXT_256 - - -DARM_TABLE_BITREVIDX_FXT_512 - - -DARM_TABLE_TWIDDLECOEF_F32_128 -DARM_TABLE_BITREVIDX_FLT_128 - - -DARM_TABLE_TWIDDLECOEF_F32_256 -DARM_TABLE_BITREVIDX_FLT_256 - - -DARM_TABLE_TWIDDLECOEF_F32_512 -DARM_TABLE_BITREVIDX_FLT_512 - - -DARM_TABLE_TWIDDLECOEF_RFFT_F32_128 - - -DARM_TABLE_TWIDDLECOEF_RFFT_F32_256 - - -DARM_TABLE_TWIDDLECOEF_RFFT_F32_512 - - -DARM_TABLE_TWIDDLECOEF_RFFT_F32_1024 - files: - - file: ${CMSIS_PACK_ROOT}/GorgonMeducer/perf_counter/1.9.11/lib/perf_counter.lib - category: library - groups: - - group: App - files: - - file: ../../tests/test_mfcc_f32.c - category: sourceC - - file: ../../tests/data/mfcc_f32_all.c - category: sourceC - - file: platform_init.c - category: sourceC - - group: AudioMarkCore - misc: - C: - - -DFLOATING_POINT - files: - - file: ../../src/ee_abf_f32.c - category: sourceC - - file: ../../src/ee_abf_f32_tables.c - category: sourceC - - file: ../../src/ee_aec_f32.c - category: sourceC - - file: ../../src/ee_anr_f32.c - category: sourceC - - file: ../../src/ee_kws.c - category: sourceC - - file: ../../src/ee_mfcc_f32.c - category: sourceC - - file: ../../src/ee_mfcc_f32_tables.c - category: sourceC - - file: ../../src/ee_nn_tables.c - category: sourceC - - file: ../../ports/arm/th_api.c - category: sourceC - - group: Libspeex - misc: - C: - - -DUSE_CMSIS_DSP - - -DFLOATING_POINT - - -DOVERRIDE_FB_COMPUTE_BANK32 - - -DOVERRIDE_FB_COMPUTE_PSD16 - - -DOVERRIDE_ANR_VEC_MUL - - -DOVERRIDE_ANR_UPDATE_NOISE_ESTIMATE - - -DOVERRIDE_ANR_APOSTERIORI_SNR - - -DOVERRIDE_ANR_POWER_SPECTRUM - - -DOVERRIDE_ANR_COMPUTE_GAIN_FLOOR - - -DOVERRIDE_ANR_UPDATE_ZETA - - -DOVERRIDE_ANR_UPDATE_GAINS_CRITICAL_BANDS - - -DOVERRIDE_ANR_UPDATE_GAINS_LINEAR - - -DOVERRIDE_ANR_APPLY_SPEC_GAIN - - -DOVERRIDE_ANR_OLA - - -DOVERRIDE_ANR_UPDATE_NOISE_PROB - - -DOVERRIDE_MDF_DC_NOTCH - - -DOVERRIDE_MDF_INNER_PROD - - -DOVERRIDE_MDF_POWER_SPECTRUM - - -DOVERRIDE_MDF_POWER_SPECTRUM_ACCUM - - -DOVERRIDE_MDF_SPECTRAL_MUL_ACCUM - - -DOVERRIDE_MDF_WEIGHT_SPECT_MUL_CONJ - - -DOVERRIDE_MDF_ADJUST_PROP - - -DOVERRIDE_MDF_PREEMPH_FLT - - -DOVERRIDE_MDF_STRIDED_PREEMPH_FLT - - -DOVERRIDE_MDF_VEC_SUB - - -DOVERRIDE_MDF_VEC_SUB16 - - -DOVERRIDE_MDF_VEC_ADD - - -DOVERRIDE_MDF_SMOOTHED_ADD - - -DOVERRIDE_MDF_DEEMPH - - -DOVERRIDE_MDF_SMOOTH_FE_NRG - - -DOVERRIDE_MDF_FILTERED_SPEC_AD_XCORR - - -DOVERRIDE_MDF_NORM_LEARN_RATE_CALC - - -DOVERRIDE_MDF_CONVERG_LEARN_RATE_CALC - - -DOVERRIDE_MDF_VEC_SCALE - - -DEXPORT=/**/ - files: - - file: ../../lib/speexdsp/libspeexdsp/buffer.c - category: sourceC - - file: ../../lib/speexdsp/libspeexdsp/fftwrap.c - category: sourceC - - file: ../../lib/speexdsp/libspeexdsp/filterbank.c - category: sourceC - - file: ../../lib/speexdsp/libspeexdsp/jitter.c - category: sourceC - - file: ../../lib/speexdsp/libspeexdsp/kiss_fft.c - category: sourceC - - file: ../../lib/speexdsp/libspeexdsp/kiss_fftr.c - category: sourceC - - file: ../../lib/speexdsp/libspeexdsp/mdf.c - category: sourceC - - file: ../../lib/speexdsp/libspeexdsp/preprocess.c - category: sourceC - - file: ../../lib/speexdsp/libspeexdsp/resample.c - category: sourceC - - file: ../../lib/speexdsp/libspeexdsp/scal.c - category: sourceC - - file: ../../lib/speexdsp/libspeexdsp/smallft.c - category: sourceC - constructed-files: - - file: RTE/_Release_MPS3-Corstone-310/Pre_Include_Global.h - category: preIncludeGlobal - - file: RTE/_Release_MPS3-Corstone-310/RTE_Components.h - category: header diff --git a/platform/cmsis/testmfcc.Release+MPS3-Corstone-310.cprj b/platform/cmsis/testmfcc.Release+MPS3-Corstone-310.cprj index d696fdf..a01b5a4 100644 --- a/platform/cmsis/testmfcc.Release+MPS3-Corstone-310.cprj +++ b/platform/cmsis/testmfcc.Release+MPS3-Corstone-310.cprj @@ -1,6 +1,6 @@ - + Automatically generated project @@ -13,6 +13,7 @@ + @@ -31,6 +32,7 @@ + @@ -55,9 +57,11 @@ + + @@ -78,6 +82,9 @@ + + + diff --git a/platform/cmsis/testmfcc.Release+VHT-Corstone-300.cprj b/platform/cmsis/testmfcc.Release+VHT-Corstone-300.cprj index 3d786c6..9777ee8 100644 --- a/platform/cmsis/testmfcc.Release+VHT-Corstone-300.cprj +++ b/platform/cmsis/testmfcc.Release+VHT-Corstone-300.cprj @@ -1,6 +1,6 @@ - + Automatically generated project diff --git a/platform/cmsis/testmfcc.Release+VHT-Corstone-310.cprj b/platform/cmsis/testmfcc.Release+VHT-Corstone-310.cprj index a467db0..84971ba 100644 --- a/platform/cmsis/testmfcc.Release+VHT-Corstone-310.cprj +++ b/platform/cmsis/testmfcc.Release+VHT-Corstone-310.cprj @@ -1,6 +1,6 @@ - + Automatically generated project diff --git a/platform/cmsis/testmfcc.Release+VHT_M85.cprj b/platform/cmsis/testmfcc.Release+VHT_M85.cprj index 808cb70..427b7c8 100644 --- a/platform/cmsis/testmfcc.Release+VHT_M85.cprj +++ b/platform/cmsis/testmfcc.Release+VHT_M85.cprj @@ -1,6 +1,6 @@ - + Automatically generated project diff --git a/platform/cmsis/testmfcc.cproject.yml b/platform/cmsis/testmfcc.cproject.yml index fa0de4a..287c024 100644 --- a/platform/cmsis/testmfcc.cproject.yml +++ b/platform/cmsis/testmfcc.cproject.yml @@ -40,6 +40,8 @@ project: - layer: boot.clayer.yml - layer: speex.clayer.yml - layer: audiomark_core.clayer.yml - - layer: printf_mps3.clayer.yml - for-type: - - +MPS3-Corstone-300 + - layer: printf_mpsx.clayer.yml + not-for-context: + - +VHT-Corstone-300 + - +VHT-Corstone-310 + - +VHT_M85