From 8279139320d6f14db36dd61253e677bcaadc491b Mon Sep 17 00:00:00 2001 From: burgholzer Date: Mon, 10 Mar 2025 20:46:56 +0100 Subject: [PATCH] =?UTF-8?q?=E2=9C=85=20adjust=20tests?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: burgholzer --- test/python/plugins/test_qiskit.py | 375 +++++++++++++++++++++++++---- 1 file changed, 327 insertions(+), 48 deletions(-) diff --git a/test/python/plugins/test_qiskit.py b/test/python/plugins/test_qiskit.py index eeb9c1a9c..f28b81837 100644 --- a/test/python/plugins/test_qiskit.py +++ b/test/python/plugins/test_qiskit.py @@ -17,62 +17,165 @@ from qiskit.circuit.library import U2Gate, XXMinusYYGate, XXPlusYYGate from qiskit.providers.fake_provider import GenericBackendV2 -from mqt.core.ir.operations import CompoundOperation, SymbolicOperation +from mqt.core.ir.operations import CompoundOperation, StandardOperation, SymbolicOperation from mqt.core.ir.symbolic import Expression -from mqt.core.plugins.qiskit import qiskit_to_mqt +from mqt.core.plugins.qiskit import mqt_to_qiskit, qiskit_to_mqt def test_empty_circuit() -> None: - """Test import of empty circuit.""" - q = QuantumCircuit() + """Test roundtrip of empty circuit.""" + qc = QuantumCircuit() + print(qc) - mqt_qc = qiskit_to_mqt(q) + mqt_qc = qiskit_to_mqt(qc) print(mqt_qc) - assert mqt_qc.num_qubits == 0 assert mqt_qc.num_ops == 0 + qiskit_qc = mqt_to_qiskit(mqt_qc) + print(qiskit_qc) + assert qiskit_qc.num_qubits == 0 + assert len(qiskit_qc) == 0 + assert qc == qiskit_qc + + +def test_multiple_quantum_registers() -> None: + """Test roundtrip of circuit with multiple quantum registers.""" + p = QuantumRegister(2, "p") + q = QuantumRegister(2, "q") + qc = QuantumCircuit(p, q) + print(qc) + + mqt_qc = qiskit_to_mqt(qc) + print(mqt_qc) + assert mqt_qc.num_qubits == 4 + assert mqt_qc.num_ops == 0 + assert len(mqt_qc.qregs) == 2 + assert "p" in mqt_qc.qregs + assert "q" in mqt_qc.qregs + assert mqt_qc.qregs["p"].size == 2 + assert mqt_qc.qregs["p"].start == 0 + assert mqt_qc.qregs["q"].size == 2 + assert mqt_qc.qregs["q"].start == 2 + + qiskit_qc = mqt_to_qiskit(mqt_qc) + print(qiskit_qc) + assert qiskit_qc.num_qubits == 4 + assert len(qiskit_qc.qregs) == 2 + assert qc == qiskit_qc + + +def test_quantum_and_ancillary_registers() -> None: + """Test roundtrip of circuit with quantum and ancillary registers.""" + q = QuantumRegister(2, "q") + a = AncillaRegister(1, "a") + qc = QuantumCircuit(q, a) + print(qc) + + mqt_qc = qiskit_to_mqt(qc) + print(mqt_qc) + assert mqt_qc.num_qubits == 3 + assert mqt_qc.num_ops == 0 + assert mqt_qc.num_ancilla_qubits == 1 + assert mqt_qc.is_circuit_qubit_ancillary(2) + + qiskit_qc = mqt_to_qiskit(mqt_qc) + print(qiskit_qc) + assert qiskit_qc.num_qubits == 3 + assert qiskit_qc.num_ancillas == 1 + assert qc == qiskit_qc + + +def test_multiple_classical_registers() -> None: + """Test roundtrip of circuit with multiple classical registers.""" + c = ClassicalRegister(2, "c") + d = ClassicalRegister(2, "d") + qc = QuantumCircuit(c, d) + print(qc) + + mqt_qc = qiskit_to_mqt(qc) + print(mqt_qc) + assert mqt_qc.num_classical_bits == 4 + assert len(mqt_qc.cregs) == 2 + assert "c" in mqt_qc.cregs + assert "d" in mqt_qc.cregs + assert mqt_qc.cregs["c"].size == 2 + assert mqt_qc.cregs["c"].start == 0 + assert mqt_qc.cregs["d"].size == 2 + assert mqt_qc.cregs["d"].start == 2 + + qiskit_qc = mqt_to_qiskit(mqt_qc) + print(qiskit_qc) + assert qiskit_qc.num_clbits == 4 + assert qc == qiskit_qc + def test_single_gate() -> None: - """Test import of single-gate circuit.""" - q = QuantumCircuit(1) - q.h(0) - mqt_qc = qiskit_to_mqt(q) + """Test roundtrip of single-gate circuit.""" + qc = QuantumCircuit(1) + qc.h(0) + print(qc) + + mqt_qc = qiskit_to_mqt(qc) print(mqt_qc) assert mqt_qc.num_qubits == 1 assert mqt_qc.num_ops == 1 assert mqt_qc[0].name.strip() == "h" + qiskit_qc = mqt_to_qiskit(mqt_qc) + print(qiskit_qc) + assert qiskit_qc.num_qubits == 1 + assert len(qiskit_qc) == 1 + assert qc == qiskit_qc + def test_two_qubit_gate() -> None: - """Test import of two qubit gate.""" - q = QuantumCircuit(2) - q.cx(0, 1) - mqt_qc = qiskit_to_mqt(q) + """Test roundtrip of two-qubit gate.""" + qc = QuantumCircuit(2) + qc.cx(0, 1) + print(qc) + + mqt_qc = qiskit_to_mqt(qc) print(mqt_qc) assert mqt_qc.num_qubits == 2 assert mqt_qc.num_ops == 1 assert mqt_qc[0].name.strip() == "x" assert {control.qubit for control in mqt_qc[0].controls} == {0} + qiskit_qc = mqt_to_qiskit(mqt_qc) + print(qiskit_qc) + assert qiskit_qc.num_qubits == 2 + assert len(qiskit_qc) == 1 + assert qc == qiskit_qc + def test_mcx() -> None: - """Test import of mcx gate.""" - q = QuantumCircuit(3) - q.mcx([0, 1], 2) - mqt_qc = qiskit_to_mqt(q) + """Test roundtrip of ccx gate.""" + qc = QuantumCircuit(3) + qc.ccx(0, 1, 2) + print(qc) + + mqt_qc = qiskit_to_mqt(qc) print(mqt_qc) assert mqt_qc.num_qubits == 3 assert mqt_qc.num_ops == 1 assert mqt_qc[0].name.strip() == "x" assert {control.qubit for control in mqt_qc[0].controls} == {0, 1} + qiskit_qc = mqt_to_qiskit(mqt_qc) + print(qiskit_qc) + assert qiskit_qc.num_qubits == 3 + assert len(qiskit_qc) == 1 + assert qiskit_qc[0].name == "ccx" + def test_mcx_recursive() -> None: - """Test import of large mcx gate.""" - q = QuantumCircuit(9) - q.mcx(control_qubits=list(range(7)), target_qubit=7, ancilla_qubits=list(range(8, 9)), mode="recursion") - mqt_qc = qiskit_to_mqt(q) + """Test roundtrip of large mcx gate.""" + qc = QuantumCircuit(9) + qc.mcx(control_qubits=list(range(7)), target_qubit=7, ancilla_qubits=list(range(8, 9)), mode="recursion") + print(qc) + + mqt_qc = qiskit_to_mqt(qc) print(mqt_qc) assert mqt_qc.num_qubits == 9 assert mqt_qc.num_ops == 1 @@ -80,24 +183,40 @@ def test_mcx_recursive() -> None: assert {control.qubit for control in mqt_qc[0].controls} == {0, 1, 2, 3, 4, 5, 6} assert not mqt_qc[0].acts_on(8) + qiskit_qc = mqt_to_qiskit(mqt_qc) + print(qiskit_qc) + assert qiskit_qc.num_qubits == 9 + assert len(qiskit_qc) == 1 + assert qiskit_qc[0].name == "mcx" + def test_small_mcx_recursive() -> None: - """Test import of small mcx_recursive gate.""" - q = QuantumCircuit(5) - q.mcx(target_qubit=4, control_qubits=list(range(4)), mode="recursion") - mqt_qc = qiskit_to_mqt(q) + """Test roundtrip of small mcx_recursive gate.""" + qc = QuantumCircuit(5) + qc.mcx(target_qubit=4, control_qubits=list(range(4)), mode="recursion") + print(qc) + + mqt_qc = qiskit_to_mqt(qc) print(mqt_qc) assert mqt_qc.num_qubits == 5 assert mqt_qc.num_ops == 1 assert mqt_qc[0].name.strip() == "x" assert {control.qubit for control in mqt_qc[0].controls} == {0, 1, 2, 3} + qiskit_qc = mqt_to_qiskit(mqt_qc) + print(qiskit_qc) + assert qiskit_qc.num_qubits == 5 + assert len(qiskit_qc) == 1 + assert qiskit_qc[0].name == "mcx" + def test_mcx_vchain() -> None: - """Test import of mcx gate with v-chain.""" - q = QuantumCircuit(9) - q.mcx(target_qubit=5, control_qubits=list(range(5)), ancilla_qubits=list(range(6, 9)), mode="v-chain") - mqt_qc = qiskit_to_mqt(q) + """Test roundtrip of mcx gate with v-chain.""" + qc = QuantumCircuit(9) + qc.mcx(target_qubit=5, control_qubits=list(range(5)), ancilla_qubits=list(range(6, 9)), mode="v-chain") + print(qc) + + mqt_qc = qiskit_to_mqt(qc) print(mqt_qc) assert mqt_qc.num_qubits == 9 assert mqt_qc.num_ops == 1 @@ -106,9 +225,15 @@ def test_mcx_vchain() -> None: for i in range(6, 9): assert not mqt_qc[0].acts_on(i) + qiskit_qc = mqt_to_qiskit(mqt_qc) + print(qiskit_qc) + assert qiskit_qc.num_qubits == 9 + assert len(qiskit_qc) == 1 + assert qiskit_qc[0].name == "mcx" + def test_custom_gate() -> None: - """Test import of custom gate.""" + """Test roundtrip of custom gate.""" custom_instr = QuantumCircuit(3, 1) custom_instr.h(0) custom_instr.cx(0, 1) @@ -117,6 +242,8 @@ def test_custom_gate() -> None: custom_instr = custom_instr.to_instruction() qc = QuantumCircuit(3, 1) qc.append(custom_instr, range(3), range(1)) + print(qc.draw(cregbundle=False)) + mqt_qc = qiskit_to_mqt(qc) print(mqt_qc) assert mqt_qc.num_qubits == 3 @@ -129,22 +256,35 @@ def test_custom_gate() -> None: assert {control.qubit for control in mqt_qc[0][1].controls} == {0} assert {control.qubit for control in mqt_qc[0][2].controls} == {0} + qiskit_qc = mqt_to_qiskit(mqt_qc) + print(qiskit_qc.draw(cregbundle=False)) + assert qiskit_qc.num_qubits == 3 + assert len(qiskit_qc) == 1 + def test_ancilla() -> None: - """Test import of ancilla register.""" + """Test roundtrip of ancilla register.""" anc_reg = AncillaRegister(1, "anc") q_reg = QuantumRegister(1, "q") qc = QuantumCircuit(q_reg, anc_reg) qc.h(anc_reg[0]) qc.cx(anc_reg[0], q_reg[0]) + print(qc) + mqt_qc = qiskit_to_mqt(qc) print(mqt_qc) assert mqt_qc.num_data_qubits == 1 assert mqt_qc.num_ancilla_qubits == 1 + qiskit_qc = mqt_to_qiskit(mqt_qc) + print(qiskit_qc) + assert qiskit_qc.num_qubits == 2 + assert len(qiskit_qc) == 2 + assert qc == qiskit_qc + def test_classical() -> None: - """Test import of classical register.""" + """Test roundtrip of classical register.""" c_reg = ClassicalRegister(1, "c") q_reg = QuantumRegister(1, "q") qc = QuantumCircuit(q_reg, c_reg) @@ -152,45 +292,74 @@ def test_classical() -> None: qc.barrier(q_reg[0]) qc.measure(q_reg[0], c_reg[0]) qc.reset(q_reg[0]) + print(qc) + mqt_qc = qiskit_to_mqt(qc) print(mqt_qc) assert mqt_qc.num_qubits == 1 assert mqt_qc.num_classical_bits == 1 + qiskit_qc = mqt_to_qiskit(mqt_qc) + print(qiskit_qc) + assert qiskit_qc.num_qubits == 1 + assert qiskit_qc.num_clbits == 1 + assert qc == qiskit_qc + def test_operations() -> None: - """Test import of operations.""" + """Test roundtrip of operations.""" qc = QuantumCircuit(3) qc.id(0) + qc.x(0) + qc.cx(0, 1) + qc.mcx([0, 1], 2) + qc.y(0) qc.cy(0, 1) - qc.z(2) - qc.s(2) - qc.sdg(2) - qc.t(2) - qc.tdg(1) - qc.u(0.5, 0.5, 0.5, 0) - qc.crx(0.5, 2, 0) + qc.z(0) + qc.cz(0, 1) + qc.h(0) + qc.ch(0, 1) + qc.s(0) + qc.cs(0, 1) + qc.sdg(0) + qc.csdg(0, 1) + qc.t(0) + qc.tdg(0) + qc.rx(0.5, 0) + qc.crx(0.5, 0, 1) qc.ry(0.5, 0) - qc.rz(0.5, 1) + qc.cry(0.5, 0, 1) + qc.rz(0.5, 0) + qc.crz(0.5, 0, 1) + qc.p(0.5, 0) + qc.cp(0.5, 0, 1) qc.mcp(0.5, [0, 1], 2) - qc.sx(0) + qc.u(0.5, 0.5, 0.5, 0) qc.swap(0, 1) qc.iswap(0, 1) qc.dcx(0, 1) qc.ecr(0, 1) qc.rxx(0.5, 0, 1) - qc.rzz(0.5, 0, 1) qc.ryy(0.5, 0, 1) + qc.rzz(0.5, 0, 1) qc.rzx(0.5, 0, 1) qc.append(U2Gate(0.5, 0.5), [0]) - qc.append(XXMinusYYGate(0.1, 0.0), [0, 1]) - qc.append(XXPlusYYGate(0.1, 0.0), [0, 1]) + qc.append(XXMinusYYGate(0.5, 0.5), [0, 1]) + qc.append(XXPlusYYGate(0.5, 0.5), [0, 1]) + print(qc) mqt_qc = qiskit_to_mqt(qc) print(mqt_qc) assert mqt_qc.num_qubits == 3 - assert mqt_qc.num_ops == 24 + assert mqt_qc.num_ops == len(qc) assert mqt_qc.is_variable_free() + for op in mqt_qc: + assert isinstance(op, StandardOperation) + + qiskit_qc = mqt_to_qiskit(mqt_qc) + print(qiskit_qc) + assert qiskit_qc.num_qubits == 3 + assert len(qiskit_qc) == len(qc) def test_symbolic() -> None: @@ -200,6 +369,8 @@ def test_symbolic() -> None: phi = Parameter("phi") theta = Parameter("theta") qc.rx(2 * theta + phi / 2 - lambda_ + 2, 0) + print(qc) + mqt_qc = qiskit_to_mqt(qc) print(mqt_qc) @@ -220,17 +391,26 @@ def test_symbolic() -> None: assert expr.constant == 2 assert not mqt_qc.is_variable_free() + with pytest.raises(NotImplementedError): + mqt_to_qiskit(mqt_qc) + qc = qc.assign_parameters({lambda_: 0, phi: 0, theta: 0}) mqt_qc = qiskit_to_mqt(qc) assert mqt_qc.is_variable_free() assert mqt_qc[0].parameter[0] == 2 + qiskit_qc = mqt_to_qiskit(mqt_qc) + print(qiskit_qc) + assert qiskit_qc[0].params[0] == 2 + def test_symbolic_two_qubit() -> None: """Test import of symbolic two-qubit gate.""" qc = QuantumCircuit(2) theta = Parameter("theta") qc.rxx(theta, 0, 1) + print(qc) + mqt_qc = qiskit_to_mqt(qc) print(mqt_qc) @@ -244,6 +424,9 @@ def test_symbolic_two_qubit() -> None: assert expr.constant == 0 assert not mqt_qc.is_variable_free() + with pytest.raises(NotImplementedError): + mqt_to_qiskit(mqt_qc) + def test_trivial_initial_layout_multiple_registers() -> None: """Test that trivial initial layout import works with multiple registers. @@ -256,46 +439,87 @@ def test_trivial_initial_layout_multiple_registers() -> None: a = QuantumRegister(2, "a") b = QuantumRegister(2, "b") qc = QuantumCircuit(b, a) + print(qc) + initial_layout = [0, 1, 2, 3] qc_transpiled = transpile(qc, initial_layout=initial_layout) + print(qc_transpiled) + mqt_qc = qiskit_to_mqt(qc_transpiled) + print(mqt_qc) for k, v in [(0, 0), (1, 1), (2, 2), (3, 3)]: assert mqt_qc.initial_layout[k] == v + qiskit_qc = mqt_to_qiskit(mqt_qc, set_layout=True) + print(qiskit_qc) + mqt_qc_2 = qiskit_to_mqt(qiskit_qc) + print(mqt_qc_2) + assert mqt_qc.initial_layout == mqt_qc_2.initial_layout + assert mqt_qc.output_permutation == mqt_qc_2.output_permutation + def test_non_trivial_initial_layout_multiple_registers() -> None: """Test that non-trivial initial layout import works with multiple registers.""" a = QuantumRegister(2, "a") b = QuantumRegister(2, "b") qc = QuantumCircuit(b, a) + print(qc) + initial_layout = [3, 2, 1, 0] qc_transpiled = transpile(qc, initial_layout=initial_layout) + print(qc_transpiled) + mqt_qc = qiskit_to_mqt(qc_transpiled) - for k, v in [(0, 3), (1, 2), (2, 1), (3, 0)]: + print(mqt_qc) + for k, v in enumerate(initial_layout): assert mqt_qc.initial_layout[k] == v assert mqt_qc.output_permutation[k] == v + qiskit_qc = mqt_to_qiskit(mqt_qc, set_layout=True) + print(qiskit_qc) + mqt_qc_2 = qiskit_to_mqt(qiskit_qc) + print(mqt_qc_2) + assert mqt_qc.initial_layout == mqt_qc_2.initial_layout + assert mqt_qc.output_permutation == mqt_qc_2.output_permutation + def test_non_symmetric_initial_layout_multiple_registers() -> None: """Test that non-symmetric initial layout import works with multiple registers.""" a = QuantumRegister(2, "a") b = QuantumRegister(1, "b") qc = QuantumCircuit(b, a) + print(qc) + initial_layout = [1, 2, 0] qc_transpiled = transpile(qc, initial_layout=initial_layout) + print(qc_transpiled) + mqt_qc = qiskit_to_mqt(qc_transpiled) + print(mqt_qc) for k, v in [(0, 2), (1, 0), (2, 1)]: assert mqt_qc.initial_layout[k] == v assert mqt_qc.output_permutation[k] == v + qiskit_qc = mqt_to_qiskit(mqt_qc, set_layout=True) + print(qiskit_qc) + mqt_qc_2 = qiskit_to_mqt(qiskit_qc) + print(mqt_qc_2) + assert mqt_qc.initial_layout == mqt_qc_2.initial_layout + assert mqt_qc.output_permutation == mqt_qc_2.output_permutation + def test_initial_layout_with_ancilla_in_front() -> None: """Test that initial layout import works with ancilla in front.""" a = QuantumRegister(2, "a") b_anc = AncillaRegister(1, "b") qc = QuantumCircuit(b_anc, a) + qc.x(0) + print(qc) + initial_layout = [0, 1, 2] qc_transpiled = transpile(qc, initial_layout=initial_layout) + print(qc_transpiled) + mqt_qc = qiskit_to_mqt(qc_transpiled) print(mqt_qc) for k, v in [(0, 0), (1, 1), (2, 2)]: @@ -303,14 +527,26 @@ def test_initial_layout_with_ancilla_in_front() -> None: assert mqt_qc.num_ancilla_qubits == 1 assert mqt_qc.is_circuit_qubit_ancillary(0) + qiskit_qc = mqt_to_qiskit(mqt_qc, set_layout=True) + print(qiskit_qc) + mqt_qc_2 = qiskit_to_mqt(qiskit_qc) + print(mqt_qc_2) + assert mqt_qc.initial_layout == mqt_qc_2.initial_layout + assert mqt_qc.output_permutation == mqt_qc_2.output_permutation + def test_initial_layout_with_ancilla_in_back() -> None: """Test that initial layout import works with ancilla in back.""" a = QuantumRegister(2, "a") b_anc = AncillaRegister(1, "b") qc = QuantumCircuit(a, b_anc) + qc.x(2) + print(qc) + initial_layout = [0, 1, 2] qc_transpiled = transpile(qc, initial_layout=initial_layout) + print(qc_transpiled) + mqt_qc = qiskit_to_mqt(qc_transpiled) print(mqt_qc) for k, v in [(0, 0), (1, 1), (2, 2)]: @@ -318,6 +554,13 @@ def test_initial_layout_with_ancilla_in_back() -> None: assert mqt_qc.num_ancilla_qubits == 1 assert mqt_qc.is_circuit_qubit_ancillary(2) + qiskit_qc = mqt_to_qiskit(mqt_qc, set_layout=True) + print(qiskit_qc) + mqt_qc_2 = qiskit_to_mqt(qiskit_qc) + print(mqt_qc_2) + assert mqt_qc.initial_layout == mqt_qc_2.initial_layout + assert mqt_qc.output_permutation == mqt_qc_2.output_permutation + def test_symbolic_global_phase() -> None: """Test whether symbolic global phase works properly.""" @@ -337,13 +580,25 @@ def test_final_layout_without_permutation() -> None: qc.h(0) qc.cx(0, 1) qc.cx(0, 2) + print(qc) + initial_layout = [1, 2, 0] seed = 123 qc_transpiled = transpile(qc, initial_layout=initial_layout, seed_transpiler=seed) + print(qc_transpiled) + mqt_qc = qiskit_to_mqt(qc_transpiled) + print(mqt_qc) assert mqt_qc.initial_layout == {0: 2, 1: 0, 2: 1} assert mqt_qc.output_permutation == mqt_qc.initial_layout + qiskit_qc = mqt_to_qiskit(mqt_qc, set_layout=True) + print(qiskit_qc) + mqt_qc_2 = qiskit_to_mqt(qiskit_qc) + print(mqt_qc_2) + assert mqt_qc.initial_layout == mqt_qc_2.initial_layout + assert mqt_qc.output_permutation == mqt_qc_2.output_permutation + # test fixture for the backend using GenericBackendV2 @pytest.fixture @@ -367,16 +622,28 @@ def test_final_layout_with_permutation(backend: GenericBackendV2) -> None: qc.cx(1, 0) qc.cx(1, 2) qc.measure_all() + print(qc) + initial_layout = [1, 0, 3] seed = 123 qc_transpiled = transpile(qc, backend, initial_layout=initial_layout, seed_transpiler=seed) + print(qc_transpiled) + final_index_layout = qc_transpiled.layout.final_index_layout() mqt_qc = qiskit_to_mqt(qc_transpiled) + print(mqt_qc) # Check the initial layout is properly translated assert mqt_qc.initial_layout == {0: 1, 1: 0, 3: 2, 2: 3, 4: 4} # Check initialize_io_mapping doesn't change the final_layout assert mqt_qc.output_permutation == dict(enumerate(final_index_layout)) + qiskit_qc = mqt_to_qiskit(mqt_qc, set_layout=True) + print(qiskit_qc) + mqt_qc_2 = qiskit_to_mqt(qiskit_qc) + print(mqt_qc_2) + assert mqt_qc.initial_layout == mqt_qc_2.initial_layout + assert mqt_qc.output_permutation == mqt_qc_2.output_permutation + def test_final_layout_with_permutation_ancilla_in_front_and_back(backend: GenericBackendV2) -> None: """Test that permutation update is correct with multiple registers and ancilla qubits.""" @@ -388,16 +655,28 @@ def test_final_layout_with_permutation_ancilla_in_front_and_back(backend: Generi qc.cx(1, 0) qc.cx(1, 2) qc.measure_all() + print(qc) + initial_layout = [1, 0, 3, 2, 4] seed = 123 qc_transpiled = transpile(qc, backend, initial_layout=initial_layout, seed_transpiler=seed) + print(qc_transpiled) + routing_permutation = qc_transpiled.layout.routing_permutation() mqt_qc = qiskit_to_mqt(qc_transpiled) + print(mqt_qc) # Check the initial layout is properly translated assert mqt_qc.initial_layout == {0: 1, 1: 0, 3: 2, 2: 3, 4: 4} # Check that output_permutation matches the result of applying the routing permutation to input_layout assert mqt_qc.output_permutation == {idx: routing_permutation[key] for idx, key in enumerate(initial_layout)} + qiskit_qc = mqt_to_qiskit(mqt_qc, set_layout=True) + print(qiskit_qc) + mqt_qc_2 = qiskit_to_mqt(qiskit_qc) + print(mqt_qc_2) + assert mqt_qc.initial_layout == mqt_qc_2.initial_layout + assert mqt_qc.output_permutation == mqt_qc_2.output_permutation + def test_empty_quantum_register() -> None: """Test an empty quantum register (valid in Qiskit) is handled correctly."""